- linaro-toolchain - lists.linaro.org

[Activity] Week ending 7th Oct. 2011

by Ramana Radhakrishnan

==Progress=== * Out of office for a day. * Wrote a quick patch to do vcvt.f32.s32 with fractional bits where we can. Tested no regressions, need to commit this after review upstream. * Desk move and packing for that. * Looked at a bug report LP 836588 appears to go away with fno-gcse. Needs more digging. === Plans === * Look at LP 836588. * Finish auto-inc-dec pipeline scheduling work. * Clear out some of the old patches (POST_MODIFY_DISP for vfp, BRANCH_COST ) * Settle into new desk. * Again a short week as I'm away for 2 days for an internal training event. Meetings: * 1-1s * TCWG calls Absences. * 5th October - out of office. * 13th - 14th October - Out of Office - Internal training event. * 31st Oct - 4th Nov - Linaro Summit Orlando - Travel booked - * 08 Nov - 11 Nov - Tentatively booked * Dec 19 - 31st Dec - Tentatively booked

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[ACTIVITY] Weekly status

by Richard Sandiford

== Last week == * Patch review. * Backported second attempt to fix get_arm_condition_code ICE. * Worked on -fsched-pressure. Experimented with various combinations of ideas. This is giving some good results (e.g. a 2x improvement in libav's put_h264_qpel8_hv_lowpass_8) but needs a bit more work to fix some outliers. I'll be away from 18th Oct to 14th Nov. Richard

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Native build performance

by Michael Hope

Random data for the day: Dave Pigott has installed some new PandaBoard build machines in the validation lab. They're identical to mine except that root is on USB Flash instead of NFS, and they have a much faster flash drive for the build area. The time taken to bootstrap and test gcc-linaro-2011.09 with C, C++, Fortran, and LTO is: * ursa3, ursa4 (Toshiba USB stick): 301 minutes build / 369 test * ursa2 (no-name USB stick): 324 minutes build / 422 test * tcpanda (fast USB stick): 274 minutes build / 265 test So the new combo gives a 1.38 x faster build. I'm surprised as I though the build was CPU bound. I'd hate to see what building on an SD card is like. Note that /tmp is in RAM, /scratch is ext4, the new boards use noatime, and the kernel doesn't have the new USB performance fix. -- Michael

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[ACTIVITY] weekly status

by Revital Eres

Continue working on estimating register pressure with SMS: - Discussed current approach with Richard which gave useful leads. - Started to implement this approach. - Doing experiments on libav microbench.

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Re: Use of memcpy() in libpng

by jbowler＠acm.org

The unaligned accesses in libpng are, for the large copies, a bug. Our attempt to align the row buffer to a 16 byte boundary was off-by-one so we end up always mis-aligning it. I've posted a patch on the png-mng-implement list: http://sourceforge.net/mailarchive/message.php?msg_id=28194444 The time spent in memcpy() is probably an illusion. The data out of zlib gets copied to one row buffer where it is unfiltered (if necessary) then a copy is made in a separate buffer that is only used for the filter handling. If you test using images with large rows (I don't know what pngbench does) the copy buffer may well get flushed out of the second level cache between each row, then the memcpy will stall bringing it back in. If you have machine level profiling you may see this as a massive time spike on some probably unrelated instruction which just happens to be in the PC when the stall stops everything. Anyway, I have several ideas of how to avoid the copy when it isn't required. John Bowler <jbowler(a)acm.org> -----Original Message----- From: Glenn Randers-Pehrson [mailto:glennrp@gmail.com] Sent: Monday, October 03, 2011 1:15 PM To: PNG/MNG implementation discussion list Subject: [png-mng-implement] Use of memcpy() in libpng [Fwd from linaro-toolchain list] Re: Use of memcpy() in libpng David Gilbert Tue, 27 Sep 2011 06:20:14 -0700 On 27 September 2011 14:16, Christian Robottom Reis <k...(a)linaro.org> wrote: > On Tue, Sep 27, 2011 at 09:47:33AM +0100, Ramana Radhakrishnan wrote: >> On 26 September 2011 21:51, Michael Hope <michael.h...(a)linaro.org> wrote: >> > Saw this on the linaro-multimedia list: >> > >> > http://lists.linaro.org/pipermail/linaro-multimedia/2011-September/ >> > 000074.html >> > >> > libpng spends a significant amount of time in memcpy(). This might >> > tie in with Ramana's investigation or the unaligned access work by >> > allowing more memcpy()s to be inlined. >> >> It's the unaligned access and the change / improvements to the memcpy >> that *might* help in this case. But that ofcourse depends on the >> compiler knowing when it can do such a thing. Ofcourse what might be >> more interesting is the kind of workload analysis that Dave's done in >> the past with memcpy to know what the alignment and size of the >> buffer being copied is. > > If you guys could take a look at this there is a potential requirement > for the MMWG around libpng optimization; we could fit this in along > with other work (possible vectorizing, etc) on that component. It wouldn't take long to analyse the memcpy calls - life would be easier if we had the test program and some details on things like what size of images were used in these benchmarks. Dave

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[ACTIVITY] 3rd - 7th October

by Andrew Stubbs

Continued work on my constant reuse optimizations. Not too much this week though. I've now fixed some issues with the ARM size-costs code that was causing it to wildly over-estimate the cost of a MOVT instruction. I'll have to post this upstream sometime soon. Took another look at the shift-amount bug. Discussed the issue with Paul Brook. I've now fixed the original bug, and fixed the new bug introduced by Paul's original fix, and committed that upstream. I still need to backport it to Linaro GCC though, and the latent bug that Richard S spotted is still being analysed. Did a merge from FSF 4.5 & 4.6 to Linaro, and pushed them the Launchpad branches for testing. Begun work benchmarking different setups for the generic tuning patches. I had a lot of trouble trying to set up SPEC2000 though. Hopefully these issues are now resolved, with some help from Michael, and I have established some baseline figures on both A8 and A9 to work from. No progress on native tuning. I'm still waiting for upstream review. In other news: Mentor's contract with Linaro has now been extended for another 6 months. :)

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[ACTIVITY] 2011-10-07

by David Gilbert

== String Routines == * Built and tested a newlib with my memchr in - ready to go with a bit of tidy up. * Followed up on my eglibc patch submission by a comment suggesting the use of --with-cpu pointing back at the previous discussion. == 64 Bit atomics == * Updated gcc patch based on Ramana's comments, retested and posted new version - Lost half a day to a failing SD card in our panda. == QEMU == * Posted a patch that made one variable thread local using __thread that fixes multi threaded user mode ARM programs (e.g. firefox); this seems to have mutated on the list into a patch for more general thread local support. Dave

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[ACTIVITY] Oct 04 - Oct 07

by Ulrich Weigand

== GDB == * Reimplemented patch to disable address space randomization in gdbserver to respect the "set disable-randomization" command, and checked it in to mainline and Linaro GDB 7.3 * Worked on support for cross-platform core file generation. == GCC == * Checked in mainline fix for PR 50305. Mit freundlichen Gruessen / Best Regards Ulrich Weigand -- Dr. Ulrich Weigand | Phone: +49-7031/16-3727 STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E. IBM Deutschland Research & Development GmbH Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk Wittkopp Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht Stuttgart, HRB 243294

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[ACTIVITY] October 2-6

by Ira Rosen

Hi, - worked on the RTL part of the widen-shift patch - backported to linaro 2/3 of the SLP patches, and proposed the third one - worked on additional SLP improvements: - swap operands to make statements isomorphic - support load with offset 1 (after load from 0) - started working on presentation for NEON forum Upcoming holidays: Oct 12, Wed - half day Oct 13, Thu Oct 16-19, Sun-Wed - half day Oct 20, Thu Ira

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[RFC ARM] Use vcvt.f32.s32 with immediate bits to do fixed to floating point conversions.

by Ramana Radhakrishnan

Hi, So one of the things Michael pointed out in today's call was that the ARM backend doesn't generate vcvt.f32.s<type> where you have an idiom conversion from fixed to floating point as in the example below. I've chosen to implement this in the following manner in the backend using these interfaces from real.c . The reason I've chosen to not allow this transformation in case flag_rounding_math is true is because this instruction always ends up rounding using round-to-nearest rather than obeying whats in the FPSCR and thus is not safe for programs that want to dynamically set their rounding modes. The benefits are quite obvious in that we eliminate a load from the constant pool and a floating point multiply and thus essentially shaving off a floating point multiply + Load latency off these sequences. This instruction can only write the output into the same register as the input register which is why I've modelled it as below by tying op1 into op0. If there's a simpler way of using the interfaces into real.c then I'm all ears ? Thoughts ? I believe such idioms are used in libav from where the original report appears to have come and thus it's a worthwhile gain where we can have it. Any other places where folks might have noticed this. I will post upstream as well once I finish testing this patch. I'm posting this here to get some feedback as well to let anyone who is really really keen about trying this out have a go given I'm out tomorrow. ( I took a quick look at the short -> f32 case as well but the fact remains that loads either zero or sign extend anyway so there's probably not much gain in modelling that right away and the win really is in getting rid of that fp mul and the constant pool load. There's probably some gain in going from i64-> f64 as well so those patterns need to be written up at some point for completeness ) cheers Ramana 2011-10-04 Ramana Radhakrishnan <ramana.radhakrishnan(a)linaro.org> * config/arm/arm.c (vfp3_const_double_for_fract_bits): Define. * config/arm/arm-protos.h (vfp3_const_double_for_fract_bits): Declare. * config/arm/constraints.md ("Dt"): New constraint. * config/arm/predicates.md (const_double_vcvt_power_of_two_reciprocal): New. * config/arm/vfp.md (*arm_combine_vcvt_f32_s32): New. (*arm_combine_vcvt_f32_u32): New. For the following testcases I see the code as follows with -mfloat-abi=hard -mfpu=vfpv3 and -mcpu=cortex-a9 float foo (int i) { float v = (float)i / (1 << 11); return v; } float foa_unsigned (unsigned int i) { float v = (float)i / (1 << 5); return v; } After patch . foo: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. fmsr s0, r0 @ int vcvt.f32.s32 s0, s0, #11 bx lr .size foo, .-foo .align 2 .global foa_unsigned .type foa_unsigned, %function foa_unsigned: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. fmsr s0, r0 @ int vcvt.f32.u32 s0, s0, #5 bx lr .size foa_unsigned, .-foa_unsigned .align 2 .global foo1 .type foo1, %function rather than .type foo, %function foo: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. fmsr s15, r0 @ int fsitos s0, s15 flds s15, .L2 fmuls s0, s0, s15 bx lr .L3: .align 2 .L2: .word 973078528 .size foo, .-foo .align 2 .global foa_unsigned .type foa_unsigned, %function foa_unsigned: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. fmsr s15, r0 @ int fuitos s0, s15 flds s15, .L5 fmuls s0, s0, s15 bx lr .L6: .align 2 .L5: .word 1023410176

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[ACTIVITY] 26th - 30th September

by Andrew Stubbs

* Vacation Monday, Tuesday, and Wednesday. * GCC Continued work on my constant reuse optimizations. Disappointingly, I've found that there are very few optimization opportunities in EEMBC (ARM/Thumb V7-A), although it's not difficult to write testcases that the optimization could improve. I also discovered that the data-flow chains don't work exactly how I thought (with respect to if-then-else cases) so I need to do a little more work. Pinged the native tuning patches; they're still waiting for upstream review. Still can't get the generic tuning work done as the CodeSourcery panda boards appear to be still offline.

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[ACTIVITY] Weekly status

by Revital Eres

Committed to mainline the patch to support instructions with auto-inc operations in SMS after addressing Ayal's comments. The patch contains two parts; one of them fixes a bug revealed during bootstrapping with the patch and SMS flags. http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01988.html http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01987.html Looking at estimating register pressure with SMS: based on previous discussion with Richard the current approach is to try and use the register pressure estimation in loop invariant pass.

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undefined reference to __aeabi_unwind_cpp_pr0

by AJ ONeal

I'm compiling an application built with TI's DVSDK 3 *[0]. /home/user/ti/dvsdk/dvsdk_3_01_00_10/linuxutils_2_25_02_08/packages/ti/sdo/linuxutils/cmem/lib/cmem.a470MV(cmem.o470MV):(.ARM.exidx+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' arm-linux-gnueabi-gcc --version arm-linux-gnueabi-gcc (Ubuntu/Linaro 4.5.2-5ubuntu2~ppa1) 4.5.2 arm-linux-gnueabi-ld --version GNU ld (GNU Binutils for Ubuntu) 2.21.0.20110302 More full output is here (but it isn't particularly helpful due to TI's RTSC make system's black-magic) https://gist.github.com/925674 FYI: the MV in cmem.a470MV stands for MontaVista. This name is hard-coded somewhere even though it's not being linked against a MontaVista system. I believe the 470 means that it should work with ARMv4 through ARMv7, but I'm not positive. My googling suggest that this is a toolchain bug and that the best way around the issue is to create a file which defines the function as a void dummy and include it. http://www.codesourcery.com/archives/arm-gnu/msg03604.html http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/78649 http://www.cs.fsu.edu/~baker/devices/lxr/http/ident?i=__aeabi_unwind_cpp_pr0 I have a script that I'll post shortly with instructions as to how to setup TI's DVSDK with Linaro AJ ONeal [0] I'm not using the latest DVSDK version 4 because the paths and such are so hard-coded for the 2009q3 version of codesourcery on ubuntu 10.04 LTS that I don't know where to start fixing it.

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[ACTIVITY] Week ending 30th September 2011.

by Ramana Radhakrishnan

===Progress=== * Patch review week. * Looked at bootstrap issue for a while but Richard Sandiford picked it up and sorted it out (Thanks Richard). * Fun and games with some paperwork. * Some backporting and testing patches. (50099 and 50186) underway. === Plans === * Clear out some of the old patches (POST_MODIFY_DISP for vfp, BRANCH_COST ) and finish on auto-inc-dec patch from last week. * Away for 1 day next week. Meetings: * 1-1s * TCWG calls Absences. * 5th October -Out of Office. * 13th - 14th October - Internal training. * 31st Oct - 4th Nov - Linaro Summit Orlando. * 08 Nov - 11 Nov - Tentatively booked * Dec 19 - 31st Dec - Tentatively booked

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[ACTIVITY] report week 39

by Peter Maydell

(short week: 3 days) RAG: Red: Amber: Green: Current Milestones: || || Planned || Estimate || Actual || ||add-omap3-networking || 2011-10-13 || 2011-10-13 || || ||a15-systemmode-planning || 2011-10-13 || 2011-10-13 || 2011-09-22 || ||a15-usermode-support || 2011-11-10 || 2011-11-10 || || ||upstream-omap3-cleanup || 2011-11-10 || 2011-11-10 || || Historical Milestones: ||qemu-linaro 2011-04 || 2011-04-21 || 2011-04-21 || 2011-04-21 || ||qemu-linaro 2011-05 || 2011-05-19 || 2011-05-19 || n/a || ||close out 1105 blueprints || 2011-05-28 || 2011-05-28 || 2011-05-19 || ||complete 1111 planning || 2011-05-28 || 2011-05-28 || 2011-05-27 || ||qemu-linaro-2011-06 || 2011-06-16 || 2011-06-16 || 2011-06-16 || ||qemu-linaro-2011-07 || 2011-07-21 || 2011-07-21 || 2011-07-21 || ||qemu-linaro 2011-08 || 2011-08-18 || 2011-08-18 || 2011-08-18 || ||qemu-linaro 2011-09 || 2011-09-15 || 2011-09-15 || 2011-09-15 || == a15-usermode-support == * completed the implementation and testing of fused-mac instructions; posted patch series with these and udiv/sdiv == other == * lightning talk for pdsw doughnut session Current qemu patch status is tracked here: https://wiki.linaro.org/PeterMaydell/QemuPatchStatus

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[ACTIVITY] Weekly status

by Richard Sandiford

== This week == * Applied patch for doing NEON high/low extraction using subregs. Ramana pointed out that we do the same thing for insertion, so I wrote a patch to handle that too. Both now merged into Linaro sources. * Looked at ARM bootstrap problem on trunk. Turned out to be an aliasing problem. Submitted and applied patch. * Reworked part of my SMS register-scheduling patch after feedback from Ayal. Submitted new version upstream. * Got SPEC2006 running on the powerpc boxes and tested one part of my -fsched-pressure patch. Bit of a mixed bag. h264ref was one of the worst sufferers, which was a bit worrying. I think I'll need to make a third change too. To recap, there are two pieces now: 1) Make -fsched-pressure honour the DFA 2) Make -fsched-pressure allow values that are live across a loop to be spilled. I naively hoped that (1) would be OK on its own, but h264 shows that the current -fsched-pressure code is very conservative when it comes to large blocks. It only considers register deaths once there is a single remaining use; if there are two unscheduled uses, it assumes that the register remains live for the rest of the block. So the problem that (1) was fixing was that -fsched-pressure was too optimistic in terms of what it could schedule in a cycle. But with that fixed, we seem to have too many sources of pessimism... Richard

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[ACTIVITY] Sep 26 - Sep 30

by Ulrich Weigand

== GDB == * Worked on support for cross-platform core file generation. * Followed up on patch to support disabling address space randomization in gdbserver. == GCC == * Followed up on patch for PR 50305. Mit freundlichen Gruessen / Best Regards Ulrich Weigand -- Dr. Ulrich Weigand | Phone: +49-7031/16-3727 STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E. IBM Deutschland Research & Development GmbH Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk Wittkopp Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht Stuttgart, HRB 243294

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[ACTIVITY] w39

by Asa Sandahl

* Working on croos-compiling Firefox. Getting dependencies in place and setting up the configuration file (.mozconfig). I have had the strategy to fix one dependency at a time, picking prebuilt packages or building my self. Michael told me at yesterday's meeting about multistrap, that could possibly be used for fixing all dependencies at once. I will look into that next week. * During this process I have also spent some time reading up on cross compilation in general and also on autoconf and the GNU build system. Best Regards Åsa

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[ACTIVITY] 2011-09-28

by David Gilbert

== String routines == * Got eglibc testing setup happy at last - Note that -O3 builds generally seem to give a few more errors that are probably worth looking at - -march=armv6 -mthumb hit some non-thumb1 instructions (normally non-lo registers), again worth looking at - Cross testing to Qemu user mode often stalls, mostly on nptl tests that abort/fail when run in system/natively * Sent new version of eglibc/memchr patch upstream * Now have working newlib test setup and reference set - next step is to try adding my memchr there == Other == * Testing a QEmu patch with Peter * Looking at bug 861296 (difference in mmap layouts) * Adding a few suggestions to the set of cpu hotplug tests. * Dealing with the Manchester lab cold. Short week; back on Monday Dave

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[ACTIVITY] September 25-28

by Ira Rosen

Hi, * change default vector size patch - merged to linaro-gcc * SLP improvements committed upstream: - allow not affine accesses - auto-detect vector size - support multiple types and promotion/demotion operations Ira

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[ACTIVITY] Sep 19 - Sep 23

by Ulrich Weigand

== GDB == * Committed hardware watchpoint support for gdbserver to mainline, including two minor changes resulting from review comments; backported those fixes to Linaro GDB as well. * Implemented and tested support for disabling address space randomization in gdbserver; patch posted for review. * Investigated support for cross-platform core file generation. == GCC == * Patch review week. * Posted updated patch for PR 50305. Mit freundlichen Gruessen / Best Regards Ulrich Weigand -- Dr. Ulrich Weigand | Phone: +49-7031/16-3727 STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E. IBM Deutschland Research & Development GmbH Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk Wittkopp Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht Stuttgart, HRB 243294

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Re: try_to_freeze() called with IRQs disabled on ARM

by Ulrich Weigand

Arnd Bergmann <arnd(a)arndb.de> wrote on 08/26/2011 04:44:26 PM: > On Thursday 25 August 2011, Russell King - ARM Linux wrote: > > > > Arnd, can you test this to make sure your gdb test case still works, and > > Mark, can you test this to make sure it fixes your problem please? > > Hi Russell, > > The patch in question was not actually from me but from Ulrich Weigand, > so he's probably the right person to test your patch. > I'm forwarding it in full to Uli for reference. Hi Arnd, hi Russell, sorry for the late reply, I've just returned from vacation today ... I've not yet run the test, but just from reading through the patch it seems that this will at least partially re-introduce the problem my original patch was trying to fix. The situation here is about GDB performing an "inferior function call", e.g. via the GDB "call" command. To do so, GDB will: 0. [ Have gotten control of the target process via some ptrace intercept previously, and then ... ] 1. Save the register state 2. Create a dummy frame on the stack and set up registers (PC, SP, argument registers, ...) as appropriate for a function call 3. Restart via PTRACE_CONTINUE [ ... at this point, the target process runs the function until it returns to a breakpoint instruction and GDB gets control again via another ptrace intercept ... ] 4. Restore the register state saved in [1.] 5. At some later point, continue the target process [at its original location] with PTRACE_CONTINUE The problem now occurs if at point [0.] the target process just happened to be blocked in a restartable system call. For this sequence to then work as expected, two things have to happen: - at point [3.], the kernel must *not* attempt to restart a system call, even though it thinks we're stopped in a restartable system call - at point [5.], the kernel now *must* restart the originally interrupted system call, even though it thinks we're stopped at some breakpoint, and not within a system call My patch achieved both these goals, while it would seem your patch only solves the first issue, not the second one. In fact, since any interaction with ptrace will always cause the TIF_SYS_RESTART flag to be *reset*, and there is no way at all to *set* it, there doesn't appear to be any way for GDB to achive that second goal. [ With my patch, that second goal was implicitly achieved by the fact that at [1.] GDB would save a register state that already corresponds to the way things should be for restarting the system call. When that register set is then restored in [4.], restart just happens automatically without any further kernel intervention. ] One way to fix this might be to make the TIF_SYS_RESTART flag itself visible to ptrace, so the GDB could save/restore it along with the rest of the register set; this would be similar to how that problem is handled on other platforms. However, there doesn't appear to be an obvious place for the flag in the ptrace register set ... Bye, Ulrich

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Use of memcpy() in libpng

by Michael Hope

Saw this on the linaro-multimedia list: http://lists.linaro.org/pipermail/linaro-multimedia/2011-September/000074.h… libpng spends a significant amount of time in memcpy(). This might tie in with Ramana's investigation or the unaligned access work by allowing more memcpy()s to be inlined. -- Michael

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[ACTIVITY] Weekly status

by Revital Eres

Debugging the new version of the patch to support instructions with REG_INC_NOTE in SMS which caused bootstrap failure. (http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01216.html) A fix was tested and submitted: [PATCH, SMS 1/2] Avoid generating redundant reg-moves http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01549.html [PATCH, SMS 2/2] Support instructions with REG_INC_NOTE (second try) http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01550.html Continued looking at Richard's libav micro-bench wrt the register pressure. Richard pointed on some kernels that can serve as a testcases. Participated in non linaro activities.

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[ACTIVITY] 2011-09-23

by David Gilbert

== String routines == * Having got agreement on ignoring the triplet for picking the routine, I'm just testing a patch, but fighting a qemu setup. * Found the binfmt binding for armeb was wrong (runs the le version); filed bug with fix in Dave

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[Activity] Week ending 23/09/2011

by Ramana Radhakrishnan

==GCC== Combined report for last 2 weeks - ===Progress=== * Committed conditional compares patch to Linaro GCC 4.6 * Looking at modelling auto-inc-decs better . * Tried patch for PR19599 and that broke bootstrap with a segfault. Needs some re-engineering. * Looked at the latest bootstrap failure on trunk. Still narrowing down. * Some work on some administrative stuff * Bit of patch review. * Went for LLVM dev meeting. * Release week had a few issues and helped dry-run cbuild spawns of jobs and think I now know how to do that. === Plans === * finish looking at bootstrap failure. * Finish auto-inc-dec patch. * some more patch review. * Send out LLVM dev meeting report. Absences. * 5th October - Out of office. * 13th -14th October - Internal ARM training. * 31st Oct - 4th Nov - Linaro Summit Orlando * 08 Nov - 11 Nov - Tentatively booked * Dec 19 - 31st Dec - Tentatively booked

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[ACTIVITY] report week 38

by Peter Maydell

(short week: 4 days) RAG: Red: Amber: Green: Current Milestones: || || Planned || Estimate || Actual || ||add-omap3-networking || 2011-10-13 || 2011-10-13 || || ||a15-systemmode-planning || 2011-10-13 || 2011-10-13 || 2011-09-22 || ||a15-usermode-support || 2011-11-10 || 2011-11-10 || || ||upstream-omap3-cleanup || 2011-11-10 || 2011-11-10 || || Historical Milestones: ||qemu-linaro 2011-04 || 2011-04-21 || 2011-04-21 || 2011-04-21 || ||qemu-linaro 2011-05 || 2011-05-19 || 2011-05-19 || n/a || ||close out 1105 blueprints || 2011-05-28 || 2011-05-28 || 2011-05-19 || ||complete 1111 planning || 2011-05-28 || 2011-05-28 || 2011-05-27 || ||qemu-linaro-2011-06 || 2011-06-16 || 2011-06-16 || 2011-06-16 || ||qemu-linaro-2011-07 || 2011-07-21 || 2011-07-21 || 2011-07-21 || ||qemu-linaro 2011-08 || 2011-08-18 || 2011-08-18 || 2011-08-18 || ||qemu-linaro 2011-09 || 2011-09-15 || 2011-09-15 || 2011-09-15 || == a15-system-mode-planning == * now complete: we have generated blueprints/roadmap cards for the TSC for the various options == a15-usermode-support == * tested udiv/sdiv implementation * fused mac: rough idea of what needs to be done, need to get all the fiddly details right == omap3 upstreaming == * rebased and sent pullreq for various outstanding patches == other == * code/design walkthrough for upstream's new memoryregion API * working on lightning talk for pdsw doughnut session next week * investigated compile failure building QEMU in thumb mode with debug enabled (we're trying to use the Thumb framepointer register as a temporary...) * meetings: toolchain, standup, 1-2-1 Current qemu patch status is tracked here: https://wiki.linaro.org/PeterMaydell/QemuPatchStatus Absences (to end of year): Sep 29-Oct 07, Oct 17, Nov 21, Dec 15-Jan 03: leave Oct 30-Nov 04: Linaro Connect Q4.11

14 years, 7 months

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[ACTIVITY] Weekly status

by Richard Sandiford

== This week == * Submitted a fix for the performance regression caused by my arm_comparison_operator patch. Applied upstream after approval from Ramana (thanks). Will backport to Linaro towards the end of next week if there are no reported problems. * Went back to looking at -fsched-pressure. To recap, a colleague ran SPEC for s390 comparing: (a) normal -O3 based flags (b) (a) + -fsched-pressure without my patch (c) (a) + -fsched-pressure with my patch (c) got the best geomean result, but there were some individual tests for which (b) was significantly worse than (a), and for which (c) only partly closed the gap. Found one problem. It looks like -fsched-pressure only really operates on the issue rate and instruction latencies; it doesn't seem to use the DFA. This seems to be unintentional, and fixing it showed some nice results. Also, the -fsched-pressure patch that I wrote at Connect set the starting pressure based on the set of registers that are both live on entry to the block _and_ used within the enclosing loop, This still seems to be a bit too conservative, in that it makes the scheduler go out of its way to preserve loop invariants, even if there are too many of them. Experimented with changing "used" to "defined". This too seemed to be a win. * Got access to some PowerPC GNU/Linux machines that are suitable for running SPEC. Set up my account there and got SPEC building. The idea is to use this to get more cross-target evidence for the -fsched-pressure submission(s). * Discussion about the SMS register-scheduling patches after great feedback from Ayal. While drafting a still-unsent reply justifying the main part of the patch, I found I was also explaining why another part of the patch (specifically the prologue/epilogue part) was wrong. Thought about that a bit today. * Submitted fix for LP 641126. == Next week == * More SMS register scheduling. * More -fsched-pressure. * Hopefully remerge the arm_comparison_operator patch with this week's fix. Richard

14 years, 7 months

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[ACTIVITY] w38

by Asa Sandahl

* Working on getting everything in place for cross-compiling Firefox for ARM. Trying to understand how the configuration script and make file works. * Working on a test that will run Sunspider and extract the results. The challenging part is that results are only presented on the page, not e.g. written to stdout or to file. My approach to create an html file, embed the page with the test in an iframe, and read out the results when the test is done. * Running SPEC2K on the Snowball board. An updated kernel solved the issue with great variations in the test results. Some tests results look a bit strange, so I will look at what those tests do to see what part of the system is stressed. Best Regards Åsa

14 years, 7 months

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[ACTIVITY] September 18-22

by Ira Rosen

Hi, * widening shifts patch - submitted upstream * change default vector size patch - submitted to linaro-gcc * automatic choice of vector size for basic block vectorization - testing * vectorizer bug fixes Next week we have New Year holiday on Wednesday (half day) and Thursday. Ira

14 years, 7 months

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Linaro GCC 4.6 and 4.5 2011.09 released

by Michael Hope

The Linaro Toolchain Working Group is pleased to announce the 2011.09 release of both Linaro GCC 4.6 and Linaro GCC 4.5. Linaro GCC 4.6 2011.09-1 is the seventh release in the 4.6 series. Based off the latest GCC 4.6.1+svn178681, it contains a range of vectoriser and core performance improvements as well as fixing a number of bugs. Interesting changes include: * Updates to 4.6.1+svn178681 * Improves performance by making better use of conditional compares * Improves performance by properly scheduling widening multiplies * Improves size and speed by improving constant generation in Thumb-2 * Implements support for widening multiples in toe core * Improves vectorised code by reducing the over-promotion of intermediates * Improves performance by reducing redundant moves between VFP and ARM * Finishes off supporting the Android team in integrating Linaro GCC Fixes: * LP: #823548 Can't use -flto with skia * LP: #823711 libvirt version 0.9.2-4ubuntu8 failed to build on armel * LP: #827990 internal compiler error: in decode_addr_const, at varasm.c:2632 * LP: #836401 ICE on a | (b << negative-constant) * LP: #838994 ICE building perl w/ -marm * LP: #843775 ICE optimizing widening multiply-and-accumulate Linaro GCC 4.5 2011.09 is the fourteenth release in the 4.5 series. Based off the latest GCC 4.5.3+svn178560, this is a maintenance focused release. Interesting changes in 4.5 include: * Updates to 4.5.3+svn178560 Fixes: * LP: #823711 libvirt version 0.9.2-4ubuntu8 failed to build on armel The source tarballs are available from: https://launchpad.net/gcc-linaro/+milestone/4.6-2011.09 https://launchpad.net/gcc-linaro/+milestone/4.5-2011.09 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro More information on the features and issues are available from the release page: https://launchpad.net/gcc-linaro/4.6/4.6-2011.09 https://launchpad.net/gcc-linaro/4.5/4.5-2011.09 Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain Bugs: https://bugs.launchpad.net/gcc-linaro/ Questions? https://ask.linaro.org/ Interested in commercial support? inquire at support(a)linaro.org -- Michael

14 years, 7 months

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Bootstrapping GCC in PGO, LTO, and SMS modes

by Michael Hope

I tried to bootstrap current GCC trunk and our latest gcc-linaro-4.6 in profile guided, link time optimisation, and SMS modes. The results are here: https://wiki.linaro.org/MichaelHope/Sandbox/PGOLTOSMSStatus1 Short story: you can't bootstrap in LTO or PGO on ARM as they run out of memory. i686 LTO is broken on trunk and gcc-linaro-4.6. SMS is fine in general. I'll run these once a week and keep an eye on them. A -fwhopr instead of -flto may help on ARM. I don't know why the PGO build runs out of memory. -- Michael

14 years, 7 months

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libav IDCT speed tests

by Michael Hope

Måns pointed me at the IDCT throughput test that's included with libav. I've written up a page on how to build and run it at: https://wiki.linaro.org/MichaelHope/Sandbox/LibAvDCT Included are results with and without the vectoriser. In all cases the vectoriser improves things, including increasing the SIMPLE-C version by 11 % and the peak by 17 %. The coefficient of variance is low so the results are consistent. I haven't investigated the benchmark itself to see if its valid - we could be vectorising the loop overhead instead of the IDCT itself. -- Michael

14 years, 7 months

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Implicit-it upstream discussion.

by Andrew Stubbs

Hi Michael, Here's the gcc-patches@ discussion you asked for: http://gcc.gnu.org/ml/gcc-patches/2010-07/msg01339.html http://gcc.gnu.org/ml/gcc-patches/2010-07/msg01351.html http://gcc.gnu.org/ml/gcc-patches/2010-07/msg01353.html http://gcc.gnu.org/ml/gcc-patches/2010-07/msg01354.html http://gcc.gnu.org/ml/gcc-patches/2010-07/msg01355.html http://gcc.gnu.org/ml/gcc-patches/2010-07/msg01356.html http://gcc.gnu.org/ml/gcc-patches/2010-07/msg01357.html Andrew

14 years, 7 months

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Re: eglibc and fun with config.sub

by Michael K. Edwards

Please coordinate with Jon Masters at RedHat/Fedora and Adam Conrad at Ubuntu/Debian on this. (Cc'ing the cross-distro list, through which the recent ARM summit at Linux Plumbers was organized.) Cheers, - Michael On Sep 16, 2011 8:41 AM, "David Gilbert" <david.gilbert(a)linaro.org> wrote: > OK, so we seem to have agreement here that what we want is autodetect > for eglibc and > forget about the triplet; well technically that probably makes my life > easier, and I don't > think it's too hard a sell. > > Dave > > _______________________________________________ > linaro-toolchain mailing list > linaro-toolchain(a)lists.linaro.org > http://lists.linaro.org/mailman/listinfo/linaro-toolchain

14 years, 7 months

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[ACTIVITY] 12th - 17th September

by Andrew Stubbs

* Linaro GCC Spun 4.5 and 4.6 2011.09 GCC release tarballs. Uploaded them to Michael's server, and kicked off the tests. Continued work on my new constant optimization experiments. I now have it tracking all the constants and am looking at how to detect the optimization opportunities. So far it only calculates how exprensive it would be to generate a value by adding to an existing constant, which is a start at least. I'm having difficulties detecting whether changing an insn will make it's parent (dependency-wise) obsolete, or not (and therefore whether to count its costs - there's no problem for instructions that overwrite an entire register, but ones that write to portions of registers (such as MOVT) make more complex dependency chains, and the def-use chains don't seem to be sorted into the order of use. * Other Half day vacation on Thursday.

14 years, 7 months

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gcc segfaults when building v8 (nodejs)

by AJ ONeal

Using the Linaro prebuilt package from a few days ago I got a segfault in gcc that is not manifest in a version from a few months earlier. Details are here: https://gist.github.com/1223209 A small snippet: g++ -o obj/release/jsregexp.o -c -fno-rtti -fno-exceptions -Wall -W -Wno-unused-parameter -Wnon-virtual-dtor -Wno-abi -pedantic -mfloat-abi=softfp -O3 -fomit-frame-pointer -fdata-sections -ffunction-sections -ansi -fno-strict-aliasing -DCAN_USE_VFP_INSTRUCTIONS -DUSE_EABI_HARDFLOAT=0 -DV8_TARGET_ARCH_ARM -DENABLE_DEBUGGER_SUPPORT -I/home/user/Code/node/deps/v8/src /home/user/Code/node/deps/v8/src/jsregexp.cc g++: Internal error: Segmentation fault (program as) Please submit a full bug report. See <file:///usr/share/doc/gcc-4.5/README.Bugs> for instructions. scons: *** [obj/release/jsregexp.o] Error 1 scons: building terminated because of errors. Waf: Leaving directory `/home/user/Code/node/out' Build failed: -> task failed (err #2): {task: libv8.a SConstruct -> libv8.a} make: *** [program] Error 1 user@linaro-developer:~/Code/node$ uname -a Linux linaro-developer 3.0.0-1004-linaro-omap #5~ppa~natty-Ubuntu SMP PREEMPT Mon Aug 22 08:44:20 UTC 2011 armv7l armv7l armv7l GNU/Linux user@linaro-developer:~/Code/node$ gcc -v Using built-in specs. COLLECT_GCC=gcc COLLECT_LTO_WRAPPER=/usr/lib/arm-linux-gnueabi/gcc/arm-linux-gnueabi/4.5.2/lto-wrapper Target: arm-linux-gnueabi Configured with: ../src/configure -v --with-pkgversion='Ubuntu/Linaro 4.5.2-8ubuntu4' --with-bugurl=file:///usr/share/doc/gcc-4.5/README.Bugs --enable-languages=c,c++,fortran,objc,obj-c++ --prefix=/usr --program-suffix=-4.5 --enable-shared --enable-multiarch --with-multiarch-defaults=arm-linux-gnueabi --enable-linker-build-id --with-system-zlib --libexecdir=/usr/lib/arm-linux-gnueabi --without-included-gettext --enable-threads=posix --with-gxx-include-dir=/usr/include/c++/4.5 --libdir=/usr/lib/arm-linux-gnueabi --enable-nls --with-sysroot=/ --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --enable-plugin --enable-gold --enable-ld=default --with-plugin-ld=ld.gold --enable-objc-gc --disable-sjlj-exceptions --with-arch=armv7-a --with-float=softfp --with-fpu=vfpv3-d16 --with-mode=thumb --disable-werror --enable-checking=release --build=arm-linux-gnueabi --host=arm-linux-gnueabi --target=arm-linux-gnueabi Thread model: posix gcc version 4.5.2 (Ubuntu/Linaro 4.5.2-8ubuntu4) AJ ONeal

14 years, 7 months

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[ACTIVITY] Weekly status

by Revital Eres

* Added testcases to Richard's micro benchmarks taken from libav. * Discussed with Ayal the new version of the patch to support instructions with REG_INC_NOTE in SMS which causes bootstrap failure. I intend to debug the bootstrap failure in order to find the cause for it. (http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01216.html)

14 years, 7 months

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[ACTIVITY] 2011-09-16

by David Gilbert

== String routines == * Tidying up bits of cortex strings for the release process * Nailing down the behaviour of config.sub and the config systems in gcc, binutils and eglibc == Other == * A discussion on synchronisation primitives on various CPUs that started on the gcc list - looking at http://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html - pointing out the 64bit instructions - asking why they used isb's when neither the kernel or gcc use them (answer the DMBs should be fine as well, but there is some debate over which is quicker, oh and DMBs are converted to slower dsb's on most A9s due to an errata). * Looking for docs on the non-core bits of current SoCs * Extracting some denbench stats from a few months back for Ramana About a day of non-Linaro IBM stuff. Dave

14 years, 7 months

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[ACTIVITY] report week 37

by Peter Maydell

RAG: Red: Amber: Green: NB: since qemu-linaro releases demonstrably go out on schedule every month I'm dropping them from the milestone tables in these reports, in favour of blueprint completion dates (usually they'll be planned for dates coinciding with a qemu-linaro release). Current Milestones: || || Planned || Estimate || Actual || ||add-omap3-networking || 2011-10-13 || 2011-10-13 || || ||a15-systemmode-planning || 2011-10-13 || 2011-10-13 || || ||a15-usermode-support || 2011-11-10 || 2011-11-10 || || ||upstream-omap3-cleanup || 2011-11-10 || 2011-11-10 || || Historical Milestones: ||qemu-linaro 2011-04 || 2011-04-21 || 2011-04-21 || 2011-04-21 || ||qemu-linaro 2011-05 || 2011-05-19 || 2011-05-19 || n/a || ||close out 1105 blueprints || 2011-05-28 || 2011-05-28 || 2011-05-19 || ||complete 1111 planning || 2011-05-28 || 2011-05-28 || 2011-05-27 || ||qemu-linaro-2011-06 || 2011-06-16 || 2011-06-16 || 2011-06-16 || ||qemu-linaro-2011-07 || 2011-07-21 || 2011-07-21 || 2011-07-21 || ||qemu-linaro 2011-08 || 2011-08-18 || 2011-08-18 || 2011-08-18 || ||qemu-linaro 2011-09 || 2011-09-15 || 2011-09-15 || 2011-09-15 || == linaro-qemu-11.11 == * completed this month's release == add-omap3-networking == * investigated why qemu's usb-net model didn't work on the beagle; this was due to a bug in the usb-ohci controller model; patches sent upstream. Fix will go into qemu-linaro 2011-10. == a15-system-mode-planning == * wrote up options and my suggestion on the wiki: https://wiki.linaro.org/PeterMaydell/QemuA15 * just need to discuss with Michael and turn this into a roadmap entry == a15-usermode-support == * complete but untested implementation of UDIV and SDIV * fused multiply-accumulate: implemented decode, and the special-cases parts of the softfloat implementation (NaN, inf, etc); the difficult bit of actually implementing the operation remains == other == * meetings: toolchain, pdsw doughnuts, AFDS Current qemu patch status is tracked here: https://wiki.linaro.org/PeterMaydell/QemuPatchStatus Absences (to end of year): Sep 19, Sep 29-Oct 07, Oct 17, Nov 21, Dec 15-Jan 03: leave Oct 30-Nov 04: Linaro Connect Q4.11

14 years, 7 months

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eglibc and fun with config.sub

by David Gilbert

As mentioned on the standup call this morning, I've been trying to get my head around the way different parts of the toolchain using the config scripts and the triplets. I'd appreciate some thoughts on what the right thing to do is, especially since there was some unease at some of the ideas. My aim here is to add an armv7 specific set of routines to the eglibc ports and get this picked up only when eglibc is built for armv7; but it's getting a bit tricky. eglibc shares with gcc and binutils a script called config.sub (that lives in a separate repository) which munges the triplet into a $basic_machine and validates it for a set of known triplets. So for example it has the (shell) pattern: arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] to recognise triplets of the form arm- armbe- armle- armel- armbe- armv5- armv5l- or armv5b- It also knows more obscure things such as if you're configuring for a netwinder it's an armv4l- system running linux - but frankly most of that type of thing are a decade or two out of date. Note it doesn't yet know about armv6 or armv7. eglibc builds a search path that at the moment includes a path under the 'ports' directory of the form arm/eabi/$machine where $machine is typically the first part of your triplet; however at the moment eglibc doesn't have any ARM version specific subdirectories. If I just added an ports/sysdeps/arm/eabi/armv7 directory it wouldn't use it because it searches in arm/eabi/arm if configured with the triplet arm-linux-gnueabi or --with-cpu sets $submachine (NOT $machine) - so if you pass --with-cpu=armv7 it ends up searching arm/eabi/arm/armv7 if you used the triplet arm-linux-gnueabi. If you had a triplet like armel then I think it would be searching arm/eabi/armel/armv7 So my original patch ( http://old.nabble.com/-ARM--architecture-specific-subdirectories,-optimised… ) did the following: * Modified the paths searched to be arm/eabi (rather than arm/eabi/$machine) * If $submachine hadn't been set by --with-cpu then autodetect it from gcc's #defines which meant that it ignored the start of the triplet and let you specify --with-cpu=armv7 After some discussion with Joseph Myers, he's convinced me that isn't what eglibc is expecting (see later in the thread linked above); what it should be doing is that $machine should be armv7 and $submachine should be used if we wanted say a cortex-a8 or cortext-a9 specific version. My current patch: * adds armv6 and armv7 to config.sub * adds arm/eabi/armv7 and arm/eabi/armv6t2 and one assembler routine in there. * If $machine is just 'arm' then it autodetects from gcc's #defines * else if $machine is armv.... then that's still $machine So if you use: a triplet like arm-linux-gnueabi it looks at gcc and if that's configured for armv7-a it searches arm/eabi/armv7 a triplet like armv7-linux-gnueabi then it searches arm/eabi/armv7 irrespective of what gcc was configured for a triplet like armv7-linux-gnueabi and --with-cpu=cortex-a9 then it searches arm/eabi/armv7/cortex-a9 then arm/eabi/armv7 As far as I can tell gcc ignores the first part of the triplet, other than noting it's arm and spotting if it ends with b for big endian; (i.e. configuring gcc with armv4-linux-gnueabi and armv7-linux-gnueabi ends up with the same compiler). binutils also mostly ignores the 1st part of the triple - although is a bit of a mess with different parts parsing it differently (it seems to spot arm9e for some odd reason); as far as I can tell gold will accept armbe* for big endian where as ld takes arm*b ! If you're still reading, then the questions are: 1) Does the approach I've suggested make sense - in particular that the machine directory chosen is based either on the triplet or where the triplet doesn't specify the configuration of gcc; that's my interpretation of what Joseph is suggesting. 2) Doing (1) would seem to suggest I should give config.sub armv6t2 and some of the other complex names. Dave

14 years, 7 months

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[ACTIVITY] Weekly status

by Richard Sandiford

== This week == * Reviewed patches for the release. * ...then broke the release. Tried to spin a new one. * Worked on a "real" fix for bug 850099. Now in testing. * Looked more at auto-inc-dec stuff. Saw a case that didn't behave as I expected on the A9. The A9 TRM doesn't describe what happens for post-indexed addressing, so I asked Ramana. Apparently the behaviour is expected. Once I have more info, I'll try to update the patches. * Worked on neon-highlow-extract and neon-strided-load-extract. Posted the three patches upstream. Nicely, the one I thought was going to be the most controversial actually got positive feedback from Paolo (who wrote the affected code). Richard

14 years, 7 months

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[ACTIVITY] Sep 12 - Sep 16

by Ulrich Weigand

== GDB == * Completed hardware watchpoint support for gdbserver. * Tracked down watchpoint resource accounting regression on GDB mainline (not present in 7.3). * Created and published Linaro GDB 7.3-2011.09 release. Mit freundlichen Gruessen / Best Regards Ulrich Weigand -- Dr. Ulrich Weigand | Phone: +49-7031/16-3727 STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E. IBM Deutschland Research & Development GmbH Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk Wittkopp Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht Stuttgart, HRB 243294

14 years, 7 months

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[ACTIVITY] w37

by Asa Sandahl

* Running SPEC2K on the Snowball board. A fresh kernel with HIGHMEM enabled made it possible to run the tests. Great variations in the results indicates that something strange is going on. Turning off one of the CPU:s gives stable result (but slow), so my current guess is that the variations are caused by a known bug that makes one cpu run slower. http://igloocommunity.org/bugzilla3/show_bug.cgi?id=1 The patch for this bug was not included in my kernel. Will have another go with a kernel where the patch is included, as a background activity. * Planned and started working on the "Adding browsing benchmarks to our current set of tests"-activity. I will try to keep documentation up to date here: https://wiki.linaro.org/AsaSandahl/Sandbox/BrowsingBenchmarks Experimenting with building Firefox in different ways, so far for x86. Best Regards Åsa

14 years, 7 months

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Re: [Linaro-toolchain-benchmarks] Using u-boot for perf measurements.

by Michael Hope

(bouncing to linaro-dev as it's generally interesting) On Fri, Sep 16, 2011 at 8:17 AM, Ramana Radhakrishnan <ramana.radhakrishnan(a)linaro.org> wrote: > Hi, > > I've been looking at some of the perf regressions we've been seeing > these days in an attempt to understand what's going on in these cases. > While I can use perf and get more statistics and do other things to > figure out why there are perf regressions between 2 binaries along > with perf record and report, I wonder if it is possible to use u-boot > to accurately measure what's going on. I would like to try and get the > values of the performance counters between 2 program points . > > I am aware that there are patches that are floating around that allow > users to set and reset the PMU counters by allowing user level access > to it in the kernel : while that maybe useful to some I'm not sure if > I want to take a chance with some other process getting scheduled that > ends up getting scheduled. Even if there are parts of the kernel that > save and restore PMU counters associated per process with across > context switches . I'm looking for as accurate measurements as > possible in this case and I wonder if u-boot is the best bet for this > ( in the absence of any dedicated hardware debug / trace unit) given > not all of us have one. > > > At the minimum to do this I believe we require u-boot or some start-up code to: > > * Turn on i-cache and d-cache. ( The current u-boot for panda that I > get from the linaro-uboot git repo > git://git.linaro.org/boot/u-boot-linaro-stable.git says "Warning > Caches turned off" when starting up ). Googling around I find a few > patches floating around that turn on the d-cache in August from Aneesh > at TI . We should consider getting these in at some point. > > * Looking in $(UBOOT_TOP)/examples/api I see that there are simple > printf routines and simple stand-alone applications that exist which > could be used for this purpose. The one problem with this is the fact > that u-boot appears to require use of -ffixed-r8 for it's purposes > which *might* mean we need these if we were to use API calls into > standard u-boot functions . I wonder if R8 is used in the current ARM version? There's no reason we can't cherry pick parts such as the serial I/O out into a library and make the app completely self contained. Skip all of the initialisation stuff and assume the boot loader has done it for you. > * Turn on / off speculative prefetching - I believe the kernel does > this already for a few boards, but could this be done in u-boot just > before it launches a test application ? > > * Turn on the VFP and Neon units. > > * Turn on unaligned access so that unaligned accesses are allowed in > the test applications. GCC will now move towards generating unaligned > accesses on versions of the architecture that support it, the patches > upstream have now been approved. > > * Memory map / linker scripts to make sure we are putting things in > the right places (sigh, has to be per-board). But everything goes in RAM so you have one generic linker script and a per board MEMORY definition. Similar to: http://bazaar.launchpad.net/~stm32f-dev/stm32f-dev/stm32f-startup/view/head… ...but even lighter. > We then write a set of library functions that could then look at what > performance counters are of interest to us and track them by resetting > them to 0 and making sure they haven't overflown. > > Has anyone else in the group played with u-boot before or has any > thoughts in this direction ? I am not suggesting that we do this work > right now but it sounds like an interesting thought of where we can > get to with this. My worry is that we miss turning on a feature and get results that aren't representative. That should be easy enough to check by baselineing against a Linux hosted run. We can use NFS or kermit to load the programs. u-boot has a network console which is nice when you don't have serial. This combined with an expect script (or LAVA? Paul?) should automate the whole process. -- Michael

14 years, 7 months

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[ACTIVITY] weekly status

by Ken Werner

Hi, * put the sources of the libunwind android port, the patches for debuggerd and the Android test app online * documented things at: https://wiki.linaro.org/WorkingGroups/ToolChain/Outputs/LibunwindDebuggerd * noticed differences between the old (debuggerd) and the new (debuggerd+libunwind) backtraces * I'm still not sure what's going on (maybe they are adding offsets or something) * however, the backtrace that libunwind does looks sane to me Note: I'll be on vacation till October 7th. Regards Ken

14 years, 7 months

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[ACTIVITY] September 11-15

by Ira Rosen

Hi, * testing widen-shifts patch on ARM * SLP improvements: - submitted a patch to allow not simple ivs in SLP - committed a patch to allow read-after-read dependencies in SLP Ira

14 years, 7 months

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Linaro QEMU 2011.09 released

by Peter Maydell

The Linaro Toolchain Working Group is pleased to announce the release of Linaro QEMU 2011.09. Linaro QEMU 2011.09 is the latest monthly release of qemu-linaro. Based off upstream (trunk) QEMU, it includes a number of ARM-focused bug fixes and enhancements. New in this month's release: - linux-user mode now supports the 64 bit cmpxchg kernel helpers (only needed for applications compiled for ARMv6 or lower) - PL111 display controller now supported; this fixes a problem where BGR was interpreted as RGB on recent versatilepb kernels Plus a few other minor bug fixes and the usual round of upstream fixes and improvements. Known issues: - The beagle and beaglexm models still do not support USB networking; we intend to fix this for the 2011.10 release - There may be some problems with running multithreaded programs in linux-user mode (LP:823902) The source tarball is available at: https://launchpad.net/qemu-linaro/+milestone/2011.09 Binary builds of this qemu-linaro release are being prepared and will be available shortly for users of Ubuntu. Packages will be in the linaro-maintainers tools ppa: https://launchpad.net/~linaro-maintainers/+archive/tools/ More information on Linaro QEMU is available at: https://launchpad.net/qemu-linaro

14 years, 7 months

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Linaro GDB 7.3 2011-09 released

by Ulrich Weigand

The Linaro Toolchain Working Group is pleased to announce the release of Linaro GDB 7.3. Linaro GDB 7.3 2011.09 is the second release in the 7.3 series. Based off the latest GDB 7.3, it includes a number of ARM-focused bug fixes and enhancements. This release contains: * Support for hardware breakpoints and watchpoints in gdbserver The source tarball is available at: https://launchpad.net/gdb-linaro/+milestone/7.3-2011.09 More information on Linaro GDB is available at: https://launchpad.net/gdb-linaro

14 years, 7 months

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Branch is open

by Michael Hope

Hi there. The 2011.09 release has been spun and is testing up well. The 4.5 and 4.6 branches are now open so feel free to commit any approved patches. -- Michael

14 years, 7 months

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