- linaro-toolchain - lists.linaro.org

Linaro GCC 4.5 and 4.6 2011-04 released

by Michael Hope

The Linaro Toolchain Working Group is pleased to announce the release of both Linaro GCC 4.5 and Linaro GCC 4.6. Linaro GCC 4.5 2011.04 is the ninth release in the 4.5 series. Based off the latest GCC 4.5.2+svn171921, it adds new optimisations, support for Android, and fixes for many of the issues found in the last month. Linaro GCC 4.6 2011.04 is the second release in the 4.6 series. Based off the latest GCC 4.6.0+svn171921, it is the first supported release of the new series and includes a significant number of mainstreamed patches from 4.5. Interesting changes in 4.6 include: * Updates to 4.6.0+r171921 * Adds conditional store sinking to the vectoriser * Brings in a significant number of the Linaro GCC 4.5 patches that are in mainline Interesting changes in 4.5 include: * Updates to 4.5.2+r172013 * Disables the shrink wrap optimisation by default * Adds support for swing-modulo scheduling (SMS) on ARM * Adds support for Android and the Bionic C library * Optimises -fvar-tracking, greatly reducing memory used when compiling large files (seen in QEMU) Fixes: * 'volatile' being ignored on volatile struct members * A potential register clobber in arm_negdi2 * An error in libgcc that prevented it being built with -Os * Multiple shrink wrap bugs (LP: #731665, 721023, 736081, 758082, 730860, 736439, 721023) * LP: #730440 incorrect immediate for movt (seen in Firebird) * LP: #728315 extension elimination pass mishandles subregs of promoted variables (seen on MIPS) * LP: #675347 volatile int causes inline assembly build failure (seen in Qt) SMS is an optimisation that works on innermost loops and reorders the instructions by overlapping different locations. An example is that the values for the next loop may be loaded during the current loop, making the values already ready when the next loop starts. SMS is disabled by default. To try it, add the options '-fmodulo-sched -fmodulo-sched-allow-regmoves'. The source tarball is available from: https://launchpad.net/gcc-linaro/+milestone/4.5-2011.04-0 https://launchpad.net/gcc-linaro/+milestone/4.6-2011.04-0 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro -- Michael

14 years, 1 month

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[OT] ti-omap-tools - script for setting up DVSDK 3 with various toolchains

by AJ ONeal

Here's a script for installing TI's DVSDK 3: https://bitbucket.org/thayne/ti-omap-tools/src Works with - CodeSourcery - OpenEmbedded - Linaro It will download the bazillion dependencies scattered across TI's site and makes it easier to gut the DVSDK's hard-coded paths to work for your setup. The DVSDK 4 isn't used because it is completely different from the DVSDK 3 and is much more difficult to root the hard paths and checks out of. AJ ONeal

14 years, 1 month

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Question on compressed vmlinux .got and .bss sections

by Shawn Guo

Hi toolchain, kernel folks, I'm seeing an interesting thing on .got and .bss sections of arch/arm/boot/compressed/vmlinux, and really need your expertise to shed some lights. I have an uninitialized variable 'uart_base' defined in misc.c. static unsigned long uart_base; $ arm-linux-gnueabi-objdump -D arch/arm/boot/compressed/misc.o Disassembly of section .bss: 00000000 <uart_base>: 0: 00000000 andeq r0, r0, r0 00000004 <__machine_arch_type>: 4: 00000000 andeq r0, r0, r0 [...] And section layout looks like the following. $ arm-linux-gnueabi-objdump -h arch/arm/boot/compressed/vmlinux SECTIOINS { ... _etext = .; _got_start = .; .got : { *(.got) } _got_end = .; .got.plt : { *(.got.plt) } _edata = .; . = ALIGN(4); __bss_start = .; .bss : { *(.bss) } _end = .; ... } $ arm-linux-gnueabi-objdump -h arch/arm/boot/compressed/vmlinux arch/arm/boot/compressed/vmlinux: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .text 001c474c 00000000 00000000 00008000 2**5 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .got 00000028 001c474c 001c474c 001cc74c 2**2 CONTENTS, ALLOC, LOAD, DATA 2 .got.plt 0000000c 001c4774 001c4774 001cc774 2**2 CONTENTS, ALLOC, LOAD, DATA 3 .bss 00000020 001c4780 001c4780 001cc780 2**2 ALLOC 4 .stack 00001000 001c47a0 001c47a0 001cc780 2**0 ALLOC 5 .comment 0000002a 00000000 00000000 001cc780 2**0 CONTENTS, READONLY 6 .ARM.attributes 00000031 00000000 00000000 001cc7aa 2**0 CONTENTS, READONLY I'm able to see uart_base in vmlinux objdump ... $ arm-linux-gnueabi-objdump -t arch/arm/boot/compressed/vmlinux [relevant only, and sorted] 00000000 l d .text 00000000 .text 001c474c l d .got 00000000 .got 001c4774 l d .got.plt 00000000 .got.plt 001c4780 l d .bss 00000000 .bss 003968e4 g *ABS* 00000000 _image_size 001c474c g *ABS* 00000000 _got_start 001c4774 g *ABS* 00000000 _got_end 001c4780 g *ABS* 00000000 _edata 001c4780 g *ABS* 00000000 __bss_start 001c4780 l O .bss 00000004 uart_base 001c4798 g O .bss 00000004 malloc_ptr 001c478c g O .bss 00000004 output_ptr 001c479c g O .bss 00000004 malloc_count 001c4794 g O .bss 00000004 free_mem_end_ptr 001c4788 g O .bss 00000004 output_data 001c4784 g O .bss 00000004 __machine_arch_type 001c4790 g O .bss 00000004 free_mem_ptr 001c47a0 g *ABS* 00000000 _end ... but I can not see it in the zImage (all others in .bss seem still there). $ xxd arch/arm/boot/zImage | tail 01c4740: 3ef1 1400 be52 9f58 e468 3900 4c47 1c00 >....R.X.h9.LG.. ^_got_start (why is it?) 01c4750: 9847 1c00 1043 0000 8c47 1c00 9c47 1c00 .G...C...G...G.. ^malloc_ptr ^output_ptr 01c4760: 9447 1c00 080a 0000 8847 1c00 8447 1c00 .G.......G...G.. ^free_mem_end_ptr ^__machine_arch_type 01c4770: 9047 1c00 0000 0000 0000 0000 0000 0000 .G.............. ^free_mem_ptr The following is a run-time memdump at _got_start. Before recalculation: 9056304C: 001C474C 001C4798 00004310 001C478C 001C479C 001C4794 00000A08 001C4788 ^_got_start (why is it?) 9056306C: 001C4784 001C4790 00000000 00000000 00000000 EDFE0DD0 4C010000 38000000 After recalculation (for .bss entries, the delta is 9039EA50, for others in .got, delta is 9039E900): 9056304C: 9056304C 905631E8 903A2C10 905631DC 905631EC 905631E4 9039F308 905631D8 9056306C: 905631D4 905631E0 00000000 00000000 00000000 73FBC000 4C010000 38000000 QUESTION: Where is the .bss section of uart_base? Now, I remove the 'static' to have 'unsigned long uart_base', and dump the same stuff to compare. $ arm-linux-gnueabi-objdump -D arch/arm/boot/compressed/misc.o Disassembly of section .bss: 00000000 <__machine_arch_type>: 0: 00000000 andeq r0, r0, r0 00000004 <uart_base>: 4: 00000000 andeq r0, r0, r0 I'm able to see uart_base in vmlinux objdump ... $ arm-linux-gnueabi-objdump -t arch/arm/boot/compressed/vmlinux [relevant only, and sorted] 00000000 l d .text 00000000 .text 001c4720 l d .got 00000000 .got 001c474c l d .got.plt 00000000 .got.plt 001c4758 l d .bss 00000000 .bss 003968e4 g *ABS* 00000000 _image_size 001c4720 g *ABS* 00000000 _got_start 001c474c g *ABS* 00000000 _got_end 001c4758 g *ABS* 00000000 _edata 001c4758 g *ABS* 00000000 __bss_start 001c475c g O .bss 00000004 uart_base 001c4770 g O .bss 00000004 malloc_ptr 001c4764 g O .bss 00000004 output_ptr 001c4774 g O .bss 00000004 malloc_count 001c476c g O .bss 00000004 free_mem_end_ptr 001c4760 g O .bss 00000004 output_data 001c4758 g O .bss 00000004 __machine_arch_type 001c4768 g O .bss 00000004 free_mem_ptr 001c4778 g *ABS* 00000000 _end ... and I can also see it in the final zImage. $ xxd arch/arm/boot/zImage | tail 01c4710: 221f f1b3 3ef1 1400 be52 9f58 e468 3900 "...>....R.X.h9. 01c4720: 5c47 1c00 2047 1c00 7047 1c00 e442 0000 \G.. G..pG...B.. ^uart_base 01c4730: 6447 1c00 7447 1c00 6c47 1c00 140a 0000 dG..tG..lG...... 01c4740: 6047 1c00 5847 1c00 6847 1c00 0000 0000 `G..XG..hG...... 01c4750: 0000 0000 0000 0000 ........ Surely, it's in the run-time memdump. Before recalculation: 90563020: 001C475C 001C4720 001C4770 000042E4 001C4764 001C4774 001C476C 00000A14 ^uart_base 90563040: 001C4760 001C4758 001C4768 00000000 00000000 00000000 EDFE0DD0 4C010000 After recalculation: 90563020: 905631AC 90563020 905631C0 903A2BE4 905631B4 905631C4 905631BC 9039F314 90563040: 905631B0 905631A8 905631B8 00000000 00000000 00000000 EDFE0DD0 4C010000 So it looks the non-static ('g') uninitialized variable sits in .bss sections well, while static ('l') one is not there. Is this expected? How the static one is being addressed? Or ask where the offset for static one is stored? Any info or comments are appreciated. -- Regards, Shawn

14 years, 1 month

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[0/5] Improvements to vldN and vstN intrinsics

by Richard Sandiford

I've just submitted a merge request for the vldN and vstN intrinsic improvements. There are five related patches, so I thought it might be easier to review the merge if I posted the individual changes here. See: http://www.mail-archive.com/linaro-toolchain@lists.linaro.org/msg00969.html for an example of how this helps. Richard

14 years, 1 month

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Test log comparison

by Michael Hope

I've fixed up the testcompare pages on ex.seabright.co.nz. It was getting confused by parallel testsuite runs and couldn't handle the results jumping about. I've also added a filter to buildlog that does a prefix match. Going to: http://ex.seabright.co.nz/helpers/buildlog/gcc-linaro shows just gcc-linaro results and: http://ex.seabright.co.nz/helpers/buildlog/gcc-linaro-4.5 for just 4.5 results. The bzr build results are looking good so far: armv7: http://ex.seabright.co.nz/helpers/testcompare/gcc-linaro-4.5+bzr99498/logs/… No changes except PCH. 99499 is still building. i686: http://ex.seabright.co.nz/helpers/testcompare/gcc-linaro-4.5+bzr99499/logs/… No changes. Note that the guality failures happen in 4.5.2 as well x86_64: http://ex.seabright.co.nz/helpers/testcompare/gcc-linaro-4.5+bzr99499/logs/… No changes. 4.6 related: x86_64: http://ex.seabright.co.nz/helpers/testcompare/gcc-linaro-4.6+bzr106734/logs… i686: http://ex.seabright.co.nz/helpers/testcompare/gcc-linaro-4.6+bzr106734/logs… armv7 is still building. -- Michael

14 years, 1 month

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smc #0 unsuppored (bug 669912) gcc-4.5 linux-2.6.38

by AJ ONeal

I just did `git checkout` for linaro/linux-2.6.38 and tried compiling with CROSS_COMPILE=arm-linux-gnueabi- and I get this smc #0 error. The bug filed here is marked as fixed, but it's still broken for me: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/669912 I ran into this error once before, but I can't find my notes for it. I think the solution was to append something like $(sec) on a line in the Makefile. Any ideas? AJ ONeal

14 years, 1 month

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Changing how we make changes

by Michael Hope

Hi there. I'd like to change and clarify how we make changes inside Linaro toolchain projects. The write-up is here: https://wiki.linaro.org/WorkingGroups/ToolChain/MakingChanges The short story is that now, just like mainline, the developers themselves do the final commit or merge into bzr. I've volunteered three of you on a review roster so that someone has the responsibility for reviewing patches each week. The roster is: * Ramana week 15, 17, 20, ... starting the 11th of April 2011 * Richard week 16, 18, 21, ... starting the 18th of April 2011 * Ulrich week 17, 19, 22, ... starting the 25th of April 2011 Anyone is welcome to review patches. The more eyes the better. Thoughts? -- Michael

14 years, 1 month

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What is __aeabi_unwind_cpp_pr0?

by AJ ONeal

I'm just curious as to what "__aeabi_unwind_cpp_pr0" is or means. I can't find any explanation by googling. I'm about to post a separate e-mail with my problem concerning it. AJ ONeal

14 years, 1 month

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[ACTIVITY] 11th -15th April

by Andrew Stubbs

Reviewed and approved Revital's do-loop patch, and Ira's store sinking patch. More precisely, I reviewed the test results from Michael's test system, and cast my eye over the patch to look for anything obvious. I don't pretend to know exactly what they do. Attended Ramana's thumb2 optimization discussion. Continued work on merging useful patches from CodeSourcery. Pushed the new patch set to Launchpad for testing in Michael's system. Pointed Bernd at lp:758082 - another probable shrink-wrap failure. Bernd responded with a new patch, and asked me to test it. I've pushed it to Launchpad and created a merge request. Posted an old patch of Dan's upstream: http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03144.html Pinged my thumb2 constants patch upstream. Richard E responded with some issues to address. I'll need to change the names of the constraints, at least. At Ramana's request, tested the NEON scheduling patch with SPEC2000. Encountered trouble with time-outs. Fixed those and retested. Posted an updated version of my EABI half-precision patch: http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03210.html Merged my backport of Julian's -fstrict-volatile-bitfields bug fix into Linaro GCC. The testing of the Android patches came back with a few test differences, but they appear to be unrelated to the patch, so are probably environmental. I've merged the changes to Linaro GCC. [Also spent most of Friday working on internal CS tasks.] ---- Upstream patched requiring review: * NEON scheduling patch http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01431.html * NEON test cases http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03144.html * ARM EABI half-precision functions (reposted) http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03210.html

14 years, 1 month

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[ACTIVITY] Apr.11 -- 17

by Chung-Lin Tang

== Last week == * CoreMark regressions: pushed a merge of my two upstream patches to Linaro 4.5, some current numbers are here: http://lists.linaro.org/pipermail/linaro-toolchain/2011-April/001087.html. * Continued working on another combine patch for improving CoreMark, hopefully ready to submit this week. * Committed fix for PR48325 (NEON POST_INC/PRE_DEC load/stores for struct modes) upstream. * Committed fix for PR48250 / Launchpad #723185 upstream. * Launchpad #689887, ICE in get_arm_condition_code(). My prior patch was tested to cause native bootstrap failure on Linaro 4.5, though retesting on upstream trunk worked fine. Still investigating. * Booked travel for Linaro-Budapest event. == This week == * Current combine patch. * Some unresolved patches, like PR46888. * Launchpad #689887, hope to figure this out.

14 years, 1 month

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First session ideas for the summit

by Michael Hope

I've started up a page with ideas for sessions at next month's summit: https://wiki.linaro.org/MichaelHope/Sandbox/1111Blueprints They're a pretty direct map to the TSC technical topics so far which is nice to see. Feel free to add other ideas to the page. Each session is around 45 minutes, needs to be fairly well understood by the drafter beforehand, and should have concrete actions coming out of it. It's fine to have a few future/blue sky sessions but not too many. We'll discuss these at tonights meeting and assign drafters. -- Michael

14 years, 1 month

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Some initial notes on the effects of vldN and vstN vectorisation

by Richard Sandiford

I've now submitted the initial vldN and vstN work, so I thought I'd see how often it triggers for natty's libav package. I've put some initial results here: https://wiki.linaro.org/RichardSandiford/Sandbox/NeonLibAv There are more files to go through, so this isn't complete. I've also left out cases that were very similar to the ones given. Some of the code is reasonable, while others are obviously not as good as they could be. I don't think the problems are really to do with the vldN and vstN work itself though. They seem to be due to the underlying interleaved load/store detection, or in the handling of widening operations. Richard

14 years, 1 month

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[ACTIVITY] 2011-04-15

by David Gilbert

== Bug triaging == * Bug 745843 (vtk ftbfs) got it down to a bad arm/thumb transition - identified as a linker error and handed off to RichardS * Bug 758082 (augeas ftbfs) tracked it down to overwrite of a parameter in a variadic function before it got stacked; identified by Ramana as another instance of the shrink-wrap bug. * Bug 745861 (petsc ftbfs) isolated the collection of different mpi related problems this is hitting; really need to find an mpi expert on this * Bug 745863 & bug 745891 (ftbfs's) - both were compilations that timed out; verified this was due to using lots of RAM and also using lots of RAM on x86 (> ~500MB) - marked as invalid until the build farm grows more RAM * Bug 757427 gconf seg fault - failed to reproduce under various tests (although Michael has now managed to catch it in the act) == Optimisation == * neon memcpy tweeking; added prefetches and unrolled the core loop - now comparable perf to bionic memcpy in most cases (slower on misaligned destination, faster in other cases) * tweaked latrace to print address/length of argument strings so I can get some stats on routine usage. Dave

14 years, 1 month

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[ACTIVITY] Weekly status

by Richard Sandiford

== This week == * Worked on a fix for https://bugs.launchpad.net/gcc-linaro/+bug/758082 Submitted the patch upstream. * Finished first cut of vldN and vstN vectorisation. Send the patches upstream. Most of the patches have been approved, but I'll wait for the others before committing. * Looked at how the vectoriser handles natty's libav. Found some nice loops, some OK-but-could-do-better, and some really atrocious. Wrote up the results here: https://wiki.linaro.org/RichardSandiford/Sandbox/NeonLibAv * Started writing micro benchmarks for each loop on that page. I'm about half way through now (starting from the bottom). * Started looking at whether the changes affect DENbench. * Patch review. * Wrote a small follow-up to the fix for LP 758082. * Some patch pinging. == Next week == * More micro benchmarks. * More DENbench. * Submit a merge request for the intrinsics improvements, if the remaining patches are approved. * Look at the poorer libav loops in more detail. Richard

14 years, 1 month

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[ACTIVITY] report week 15

by Peter Maydell

RAG: Red: Amber: Green: now only 6 "core ARM emulation" patches in qemu-linaro not yet upstreamed (still lots of omap3 patches, though) Current Milestones: | Planned | Estimate | Actual | qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | | Historical Milestones: finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off | first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 | qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 | == maintain-beagle-models == * some early prep for next week's qemu-linaro release == merge-correctness-fixes == * patch to fix Neon UNDEFs sent upstream and committed * patch fixing an overflow in signed VABAL.s32 upstreamed, committed * investigated a bug report which turns out to be that if you try to single step over an instruction which UNDEFs using qemu's gdb stub we execute the insn at the UNDEF vector and stop after it rather than stopping at the UNDEF vector * some investigation of qemu mishandling of FP exception flag setting; putting this on hold though, as it really isn't very high priority * reviewed patches from Aurelien doing some general softfloat cleanup == other == * trying to nail down proposed QEMU work for next cycle; work-in-progress: https://wiki.linaro.org/PeterMaydell/Qemu1111 * two IRC interviews for QEMU Google Summer of Code student to do some work on upstreaming of the Android emulator device models * meetings: toolchain, standup, architecture Q&A, divisional update Current qemu patch status is tracked here: https://wiki.linaro.org/PeterMaydell/QemuPatchStatus Absences: Holiday: 22 Apr - 2 May 9-13 May: UDS, Budapest (maybe) 15-16 August: QEMU/KVM strand at LinuxCon NA, Vancouver [LinuxCon proper follows on 17-19th]

14 years, 1 month

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CoreMark Status

by Chung-Lin Tang

Hi, I've just pushed a merge of the current upstream patches for resolving the CoreMark regressions. (https://code.launchpad.net/~cltang/gcc-linaro/coremark-part1) To give a quick benchmark of the current status, testing Linaro 4.5 before/after the merge of those two patches: Optimization options used were just plain '-O2 -mtune=cortex-a9', tested on one of our Pandaboards running Maverick; all numbers are Iterations/Sec averaged from 3 runs. r99492 r9942+patches improve % -march=armv5te 2786.87 2848.12 2.20 % -march=armv7-a 2474.50 2775.92 12.18 % -march=armv7-a -mthumb 2297.86 2356.59 2.56 % I'll have to re-test to be sure, but the numbers/improvements obtained using upstream trunk should not be too far off, at least the ARM mode ones. As we discussed in prior meetings, there's still one point of regression identified that's in solving, which hopefully will finally bring the ARMv7-A numbers above ARMv5TE. Chung-Lin

14 years, 1 month

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[Activity] 10th - 14th April

by Revital Eres

Hello, - Tracking down bugs exposed while testing a patch for SMS to avoid using -fauto-inc-dec flag and preparing fixes for them. Also, prepared a fix for PR47013. - Continue looking into DENbench and updating https://wiki.linaro.org/Internal/ToolChain/Benchmarks. Thanks, Revital

14 years, 1 month

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[Activity] 11th - 14th April

by Ramana Radhakrishnan

== GCC == Progress: * Spent some time digging into binutils issue for Neon but still not sure why I see the problem when this is fixed in 2.21 branch and no one else see this. * Fixed PR 48090 upstream. * Some patch review. * T2 performance meeting. Plans when I'm back: * Continue looking at divmodsi4 improvements. * Continue looking at excessive VFP moves. * Backport the fix for the initialization of cgraph into FSF 4.5 branch. Meetings: * 1-1s * Linaro toolchain meeting * T2 performance. * Linaro@UDS meeting. Absences: * April 15 – 26 -> Booked. * May 9-14 - LDS Budapest

14 years, 1 month

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Issue with noreturn static function with unused arg

by Loïc Minier

hey This problem with busybox: http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=621137 seems to be a toolchain issue. It occurs with FSF GCC 4.5.2 but not 4.6, and it doesn't occur with Linaro GCC 4.5 but it does with Debian gcc-4.5. I'm trying to identify the fix which Linaro applied to solve this! :-) Michael Hope told me he remembers we fixed something similar for Qt, but he couldn't find the patch and suggested I post here to get feedback. I've pushed ash.i and .s at: http://people.linaro.org/~lool/ash.i which you can build with: gcc -save-temps -std=gnu99 -Wall -Wshadow -Wwrite-strings -Wundef -Wstrict-prototypes -Wunused -Wunused-parameter -Wunused-function -Wunused-value -Wmissing-prototypes -Wmissing-declarations -Wdeclaration-after-statement -Wold-style-definition -fno-builtin-strlen -finline-limit=0 -fomit-frame-pointer -ffunction-sections -fdata-sections -fno-guess-branch-probability -funsigned-char -static-libgcc -falign-functions=1 -falign-jumps=1 -falign-labels=1 -falign-loops=1 -g -Os -c -o ash2.o ash.i the interesting part is that ash.s has tryexec as not returning, when it does return: grep ^tryexec ash.s -A5 | grep return this seems to be due to the combination of tryexec being static, its parent being noreturn, and one argument of tryexec being unused. Any idea of which Linaro patch solved this? :-) Does it make sense to raise this to FSF GCC 4.5? Thanks! -- Loïc Minier

14 years, 1 month

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First toolchain estimate for the next cycle

by Michael Hope

Hi there. Mounir and I have been looking at the work for next cycle. A summary spreadsheet with notes is available here: https://spreadsheets0.google.com/ccc?key=ty1c-H56f0GxnL1Hk9LCmRg I'm very interested in feedback, especially on the time estimates and extra topics we should suggest to the TSC. See the notes at the top and feel free to add items or estimates straight into the sheet - anyone can view and anyone at Linaro should be able to edit. -- Michael

14 years, 1 month

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Differences in build hosts

by Michael Hope

Hi there. I ran a build of gcc-linaro-4.5+bzr99491 on ursa1 through 4 to see if there was any difference in build machines. The following tests had different results: * gcc.c-torture/compile/limits-structnest.c * gcc.dg/graphite/block-4.c * largefile.c * obj-c++.dg/template-5.mm * obj-c++.dg/template-5.mm * obj-c++.dg/template-6.mm * obj-c++.dg/template-6.mm * objc/execute/class-4.m I suspect that they're all caused by running the testsuite in parallel and the host running out of memory. limits-structnest takes around 850 MB of RAM and passes on the machine with swap (ursa1) and fails on the others. block-4.c takes 2:35 to run and timed out on ursa1 and passed on the others which may be due to ursa1 swapping heavily while running a limit test in parallel. The obj-c tests show various forms of killed, and suggest that they were killed due to another process taking all the memory. I'll change the machines to use the full 1 G of memory, run the test suite in sequential mode, and see how things go. I haven't investigated largefile.c - it's a PCH test and these fail randomly. Regarding block-4.c, it takes 155 s to run which is too close to the default 300 s for my taste. Should we add a dg-timeout-factor 4.0 to it similar to block-3.c? -- Michael

14 years, 1 month

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[Activity] April 4th - 8th

by Ramana Radhakrishnan

Missed sending this out earlier this week. == GCC == Progress: * Sync'd with Andrew about T2 performance stuff. * Spent some time investigating what could be done for divmodsi4 improvements . Working through the various phases. Not done tree level stuff for a while so my knowledge of the API is a a bit rusty. * Some upstream bugzilla duty. Plans: * Continue looking at divmodsi4 improvements. * Continue looking at excessive VFP moves. * Look at binutils + neon issue. * Performance kick-off meeting Meetings: * 1-1s * Linaro toolchain meeting * Andrew Stubbs meeting for 1 hour about T2 performance. Absences: * April 13th - Internal ARM conference. Not at desk all day. * April 15 – 26 -> Booked. * May 9-14 - LDS Budapest

14 years, 1 month

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[ACTIVITY] weekly status

by Ken Werner

Hi, libunwind: * started to look on how to resume from a given stack frame: * other platforms use setcontext * setcontext is not implemented on ARM (glibc) * the *context functions have been marked obsolescent in Posix * http://pubs.opengroup.org/onlinepubs/009695399/functions/makecontext.html pandaboard: * gdb doesn't find separate debug info of libraries that have been put into a multiarch directory (#758619) Note: I'll be out of office to attend a class till (including) Friday. Regards Ken

14 years, 1 month

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Today's T2 perf call.

by Ramana Radhakrishnan

A rough agenda for today's call. I'll put this on the wiki after the call. 1. Go over what we are all doing today - roughly Areas of investigation that we are looking at for near term. a. divmodsi4 work. b. Unnecessary VFP to integer register moves because of addressing modes availability. c. Thumb2 constants work d. Additional areas for headroom in DENBENCH. e. Coremark regressions fix up f. Revisions causing major regressions in coremark 2. Find a way of replicating the benchmarking results and make sure we get similar results to Michael and we are doing roughly the same thing. 3. Regular bi-weekly call following the Toolchain WG meeting ? Or do we organize another call ?

14 years, 1 month

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[Bug 758082] [NEW] [armel] segfaults in make check pass when built with optimization

by Jani Monoses

Public bug reported: FTBFS on armel https://launchpadlibrarian.net/68239668/buildlog_ubuntu-natty-armel.augeas_… not apparent from the log but the failing of test-interpreter.sh is due to a core dump. Starting program: /home/jani/work/ftbfs/aug/augeas-0.8.0/src/.libs/lt- augparse --nostdinc -I . fail_let_no_exp.aug Program received signal SIGSEGV, Segmentation fault. strlen () at ../ports/sysdeps/arm/strlen.S:29 29 ../ports/sysdeps/arm/strlen.S: No such file or directory. in ../ports/sysdeps/arm/strlen.S (gdb) bt #0 strlen () at ../ports/sysdeps/arm/strlen.S:29 #1 0x4016c050 in _IO_vfprintf_internal (s=<value optimized out>, format=<value optimized out>, ap=<value optimized out>) at vfprintf.c:1620 #2 0x401d7b66 in __vasprintf_chk (result_ptr=0xbee5097c, flags=1, format=0x400d961c "%s", args=...) at vasprintf_chk.c:68 #3 0x400bfad6 in vasprintf (info=<value optimized out>, code=<value optimized out>, format=0x400d961c "%s", ap=...) at /usr/include/bits/stdio2.h:199 #4 format_error (info=<value optimized out>, code=<value optimized out>, format=0x400d961c "%s", ap=...) at syntax.c:96 #5 0x400bfd98 in syntax_error (info=0x1, format=0x400d961c "%s") at syntax.c:124 #6 0x400c3e96 in augl_error (locp=<value optimized out>, term=<value optimized out>, scanner=<value optimized out>, s=0x400d7abc "syntax error") at parser.y:628 #7 0x400c54f8 in augl_parse_file (aug=0x1ef1878, name=<value optimized out>, term=0xbee50a64) at parser.y:362 #8 0x400c153a in load_module_file (aug=0x1ef1878, filename=0xbee50ddb "fail_let_no_exp.aug") at syntax.c:1951 #9 0x400bbf0a in __aug_load_module_file (aug=0x1ef1878, filename=0xbee50ddb "fail_let_no_exp.aug") at augeas.c:1447 #10 0x00008b04 in main (argc=<value optimized out>, argv=0xbee50c84) at augparse.c:131 ** Affects: gcc-linaro Importance: Undecided Status: New ** Affects: augeas (Ubuntu) Importance: Undecided Status: New ** Tags: arm-porting-queue ** Also affects: gcc-linaro Importance: Undecided Status: New ** Summary changed: - segfaults in make check pass when built with optimization + [armel] segfaults in make check pass when built with optimization ** Tags added: arm-porting-queue -- You received this bug notification because you are a member of Linaro Toolchain Developers, which is subscribed to Linaro GCC. https://bugs.launchpad.net/bugs/758082 Title: [armel] segfaults in make check pass when built with optimization Status in Linaro GCC: New Status in “augeas” package in Ubuntu: New Bug description: FTBFS on armel https://launchpadlibrarian.net/68239668/buildlog_ubuntu-natty-armel.augeas_… not apparent from the log but the failing of test-interpreter.sh is due to a core dump. Starting program: /home/jani/work/ftbfs/aug/augeas-0.8.0/src/.libs/lt- augparse --nostdinc -I . fail_let_no_exp.aug Program received signal SIGSEGV, Segmentation fault. strlen () at ../ports/sysdeps/arm/strlen.S:29 29 ../ports/sysdeps/arm/strlen.S: No such file or directory. in ../ports/sysdeps/arm/strlen.S (gdb) bt #0 strlen () at ../ports/sysdeps/arm/strlen.S:29 #1 0x4016c050 in _IO_vfprintf_internal (s=<value optimized out>, format=<value optimized out>, ap=<value optimized out>) at vfprintf.c:1620 #2 0x401d7b66 in __vasprintf_chk (result_ptr=0xbee5097c, flags=1, format=0x400d961c "%s", args=...) at vasprintf_chk.c:68 #3 0x400bfad6 in vasprintf (info=<value optimized out>, code=<value optimized out>, format=0x400d961c "%s", ap=...) at /usr/include/bits/stdio2.h:199 #4 format_error (info=<value optimized out>, code=<value optimized out>, format=0x400d961c "%s", ap=...) at syntax.c:96 #5 0x400bfd98 in syntax_error (info=0x1, format=0x400d961c "%s") at syntax.c:124 #6 0x400c3e96 in augl_error (locp=<value optimized out>, term=<value optimized out>, scanner=<value optimized out>, s=0x400d7abc "syntax error") at parser.y:628 #7 0x400c54f8 in augl_parse_file (aug=0x1ef1878, name=<value optimized out>, term=0xbee50a64) at parser.y:362 #8 0x400c153a in load_module_file (aug=0x1ef1878, filename=0xbee50ddb "fail_let_no_exp.aug") at syntax.c:1951 #9 0x400bbf0a in __aug_load_module_file (aug=0x1ef1878, filename=0xbee50ddb "fail_let_no_exp.aug") at augeas.c:1447 #10 0x00008b04 in main (argc=<value optimized out>, argv=0xbee50c84) at augparse.c:131

14 years, 1 month

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Conference code for today's Thumb-2 kick off call

by Michael Hope

Hi everyone. The conference code for today's call is 5238686884. The dial in numbers are the same as the weekly meeting. See: http://wiki.linaro.org/WorkingGroups/ToolChain/Meetings -- Michael

14 years, 1 month

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[Bug 757427] [NEW] gconftool-2 segfaults on arm

by Jani Monoses

Public bug reported: The 2.32.2 upload of gconf is likely miscompiled and segfaults. This leads to other armel FTBFSs in the archive when calling gconftool-2 as part of the install phase. ** Affects: gcc-linaro Importance: Undecided Status: New ** Affects: gconf (Ubuntu) Importance: Undecided Status: New ** Tags: arm-porting-queue ** Package changed: ubuntu => gconf (Ubuntu) ** Also affects: gcc-linaro Importance: Undecided Status: New -- You received this bug notification because you are a member of Linaro Toolchain Developers, which is subscribed to Linaro GCC. https://bugs.launchpad.net/bugs/757427 Title: gconftool-2 segfaults on arm Status in Linaro GCC: New Status in “gconf” package in Ubuntu: New Bug description: The 2.32.2 upload of gconf is likely miscompiled and segfaults. This leads to other armel FTBFSs in the archive when calling gconftool-2 as part of the install phase.

14 years, 1 month

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[ACTIVITY] Weekly status

by Richard Sandiford

== Last week == * Sent a fix for PR target/46329 upstream. * Discussed with Richard Guenther how to represent the interleaved load/store "functions" that we're adding to gimple. Sent a patch upstream for comments. Richard confirmed on IRC that he was happy with it, and no-one else has objected. * Spent most of the week on the vectorisation itself, and on the testsuite. == This week == * Finish work on vectorisation testsuite and submit. Richard

14 years, 1 month

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[ACTIVITY] Apr.04 -- Apr.10

by Chung-Lin Tang

== Last week == * Mon/Tue (Apr.4--5): Tomb-sweeping Day, public holiday. * PR48250 / CS Issue #9845 / Launchpad #723185. Unaligned DImode reload under NEON. Worked on new patch, submitted to gcc-patches after testing on Friday. Awaiting review. == This week == * CoreMark ARMv6/v7 regressions: working on new combine patch.

14 years, 1 month

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[ACTIVITY] 4th - 9th April

by Andrew Stubbs

The test results for the patch for lp:675347 on GCC 4.6 came back clean, so I merged it to Linaro GCC 4.6. The test results for lp:675347 on 4.5 had problems though, but they might be unrelated to the patch. The test results for the "discourage NEON on A8" patch had similar failures, and that's a 4.6 testsuite. Richard Earnshaw approved the Thumb register allocation patch. I've committed it upstream, and updated the patch trackers. It was already on the Linaro 4.6 branch. Now that GCC 4.6 is released, switched all the Linaro tracking tickets from 'Fix committed' to 'Fix released'. Merged from FSF 4.5 to Linaro 4.5 and submitted the patch for test. The tests came back clean, so I pushed it to the 4.5 branch. (Yay for Michael's new test service!) Merged more patches from SG++ to Linaro. Or, at least considered them for merge. Mostly I decided that they were not appropriate for Linaro, at least, not just yet. I have yet to push these patches to Launchpad. Reviewed Richard Sandiford's patch for LP:714921. Retried the Android build with a view to integrating Android support in Linaro GCC 4.5 (4.6 should already support it). Eventually, after downloading many different git repositories and branches, and maxing out the memory on my machine a few times, I managed a successful build using the toolchain the Android team are using. I then backported Maxim's patches to Linaro GCC 4.5, and built and tested that, and got another successful Android build. I've pushed the patched toolchain to Launchpad at lp:~ams-codesourcery/gcc-linaro/android for testing. All being well, I'll merge Android support into the 4.5 trunk in time for the next release. ---- Upstream patched requiring review: * Thumb2 constants: http://gcc.gnu.org/ml/gcc-patches/2010-12/msg00652.html * ARM EABI half-precision functions http://gcc.gnu.org/ml/gcc-patches/2011-02/msg00874.html * NEON scheduling patch http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01431.html

14 years, 1 month

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[ACTIVITY] 2011-04-08

by David Gilbert

- Back from holiday, short week. == Porting jam == * We seem to have picked up a lot of ftbfs in the last couple of weeks - which is unfortunate because it may well be too close to the Natty release to do anything about them * Bug 745843 is a repeatable segfault in part of the build process of a package called vtk that is used by a few other things ; I've got this down to a particular call of one function - although gdb is getting rather confused (r0 & r1 changing as I single step across a branch) * Bug 745861 petsc build failure; I'm getting one of two different link errors depending which mood it is in - mpi related? * Bug 745873 - a meta package that just didn't have a list of packages to build with for armel; easy to do a simple fix (provided branch that built) for but the maintainer says it's too late for natty anyway and some more thought is needed. == Other == * Reading over some optimisation documents * Tested weekly release on Beagle-c4 (still no OTG usb and hence no networking for me) * Also simple boot test on panda; not much time for more thorough test. (seems to work) Dave

14 years, 2 months

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[ACTIVITY] weekly status

by Ken Werner

Hi, == libunwind == * created a generic and local variant of the extbl parser * continued to look into testsuite failures * down to 12 failures: https://wiki.linaro.org/KenWerner/Sandbox/libunwind * continue to post patches upsteam Note: I'll be out of office to attend a class starting from Wednesday till Friday next week. Regards Ken

14 years, 2 months

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[ACTIVITY] report week 14

by Peter Maydell

RAG: Red: Amber: Green: Current Milestones: | Planned | Estimate | Actual | qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | | Historical Milestones: finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off | first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 | qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 | == maintain-beagle-models == * I spent a couple of days on initial cleanup of the omap3 patchstack in qemu-linaro. It's still some way from being upstreamable but at least now every patch in the stack compiles; this should make rebasing on upstream a bit less painful. * the board-ram-limits patchset is still stalled with upstream :-( == merge-correctness-fixes == * Aurelien applied lots of patches so the pipeline has drained again * cleaning up/reworking patches which fix handling of Neon UNDEF cases. Not very exciting but it will get a large set of patches out of the qemu-linaro patchstack. == other == * meetings: toolchain, standup Current qemu patch status is tracked here: https://wiki.linaro.org/PeterMaydell/QemuPatchStatus Absences: Holiday: 22 Apr - 2 May 9-13 May: UDS, Budapest (maybe) 15-16 August: QEMU/KVM strand at LinuxCon NA, Vancouver [LinuxCon proper follows on 17-19th]

14 years, 2 months

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[Merge] lp:~rsandifo/gcc-linaro/lp-714921-4.5 into lp:gcc-linaro

by noreply＠launchpad.net

The proposal to merge lp:~rsandifo/gcc-linaro/lp-714921-4.5 into lp:gcc-linaro has been updated. Status: Needs review => Merged For more details, see: https://code.launchpad.net/~rsandifo/gcc-linaro/lp-714921-4.5/+merge/56525 -- https://code.launchpad.net/~rsandifo/gcc-linaro/lp-714921-4.5/+merge/56525 Your team Linaro Toolchain Developers is subscribed to branch lp:gcc-linaro.

14 years, 2 months

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Launchpad: Validate your team's contact email address

by Launchpad Email Validator

Hello The Launchpad user named 'Michael Hope (michaelh1)' requested the registration of 'linaro-toolchain(a)lists.linaro.org' as the contact email address of team 'Linaro Toolchain Developers'. This request can only be made by a team owner/administrator, so if this change request was unexpected or was not requested by one of the team's administrators, please contact system-error(a)launchpad.net. If you want to make this email address the contact email of 'Linaro Toolchain Developers', please click on the link below and follow the instructions. https://launchpad.net/token/6sQQKQ6kx3XP9MlWMwmX Thanks, The Launchpad Team

14 years, 2 months

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New porter boxes

by Michael Hope

Hi there. The new porter boxes are now available for use. See: https://wiki.linaro.org/WorkingGroups/ToolChain/Hardware for details. These are PandaBoards with 768 MB of memory, a USB HDD, and a good internet connection. They can be used for day to day jobs like building programs, triaging bugs, and running benchmarks. Use dchroot natty to switch into the chroot. Use sudo apt-get install yyy to install packages. The build dependences for GCC, GDB, and binutils should already be installed. -- Michael

14 years, 2 months

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[ACTIVITY] April 3-7

by Ira Rosen

Hi, * continued bringing patches upstream - changing default vector size to 128 - resubmitted with changes according to comments, awaiting review - if-conversion improvement - committed * PR 48252 - bug in vzip/vuzp/vtrn implementation - patch submitted * opened PR 48454 - a test failure with -mvectorize-with-neon-quad Next week - vacation. April 18-27 - Passover Holiday, I'll only work half days on April 18 and April 24. And possibly half days on April 20 and 21. Ira

14 years, 2 months

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Tegra2 errata bug

by David Gilbert

https://bugs.launchpad.net/ubuntu/+source/eglibc/+bug/739374 is the bug relating to the Tegra errata mentioned today. Dave

14 years, 2 months

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[ACTIVITY] Apr 04 - Apr 06

by Ulrich Weigand

== GDB == * Ongoing work to fix single-stepping over signal handlers (bug #615978). * Posted patch to support NEON registers in core files (bug #615972). * Failure to disable address space randomization (bug #616001) is shown to be a kernel problem; created stand-alone test case and opened bug against kernel team. == Schedule == * On vacation 04/07 - 04/15. Mit freundlichen Gruessen / Best Regards Ulrich Weigand -- Dr. Ulrich Weigand | Phone: +49-7031/16-3727 STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E. IBM Deutschland Research & Development GmbH Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk Wittkopp Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht Stuttgart, HRB 243294

14 years, 2 months

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Re: Linaro 4.5.2 v. CodeSourcery 4.5.1

by Andrew Stubbs

On 25/03/11 21:48, Diane Holt wrote: > I hope you don't mind me sending you mail, but I'm a bit stuck...I've > been told I need the Linaro 4.5.2 toolchain because it has some "neon > optimizations" that the CS 4.5.1 doesn't have. In general, you'd be better addressing these questions on the Linaro Toolchain mailing list: linaro-toolchain(a)lists.linaro.org (I've copied it in). Not least because I'm on vacation for the next week. :) > Unfortunately, the Linaro > 4.5.2 that's available for download (already built) won't work in my > Scratchbox environment, since it was compiled against a glibc that's too > new. The CS 4.5.1 works fine -- but I'm not allowed to use it, because > of the neon stuff. The CS and Linaro compilers are really very similar, but CodeSourcery has not made a release since the autumn, so Linaro will have some extra features. > Do you know whether CS actually does have (or will have) the same neon > optimizations Linaro has? It depends which optimizations you are referring to? The existing CS release had the latest improvements at the time it was released, and I believe that the upcoming release will probably be very similar to Linaro (at least, with respect to ARMv7 - there'll be many differences for other architecture variants), but I'm not promising that. Sorry if that's a bit vague, but I the contents of the next CS release is still not finalised. > If it doesn't (and won't), then I'm going to have to build the Linaro > one from source. Unfortunately, I've not been able to find any detailed > information on how to go about doing that. Do you know if that's > documented anywhere? Are you talking about building native compiler, or a cross-compiler? The former is very simple (provided you have all the dependencies), while the latter is more involved. Here's the recipe to build a native compiler: tar xf gcc-linaro.....tar.bz2 mkdir objdir cd objdir ../gcc-linaro....../configure --prefix=<your-install-path> <opts> make bootstrap make install You can copy the configure <opts> from another compiler using 'gcc -v' and './configure --help' in the source tree should tell you what they mean. If you want to build a cross compiler, I suggest you look at crosstool or crosstool-ng, or OpenEmbedded. Building cross-toolchains is non-trivial. Hope that helps. Andrew

14 years, 2 months

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CoreMark over releases

by Michael Hope

Here's some pretty pictures of the relative CoreMark performance on a Cortex-A9. Note that in accordance with the CoreMark rules, all results are estimates. Linaro GCC 4.5 and mainline GCC vs 4.5.2: http://people.linaro.org/~michaelh/incoming/all-o3-vs-gcc-4.5.2.png Linaro GCC 4.5 releases vs our first: http://people.linaro.org/~michaelh/incoming/releases-o3-vs-gcc-linaro-4.5-2… Linaro GCC 4.5 builds between 2010.08 and 2010.10: http://people.linaro.org/~michaelh/incoming/releases-o3-vs-gcc-linaro-4.5-2… The 2.5 % drop in performance for 2010.09 is probably due to r99379. The further 2 % drop in 2010.10 is due to re-syncing with mainline 4.5.2. Performance has been moving solidly upwards but it has to start from the -4.5 % from these two updates. Chung Lin's unsigned extension changes should be interesting... -- Michael

14 years, 2 months

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Linaro toolchain integration with ChromiumOS build

by PANKAJ KUMAR DUBEY

14 years, 2 months

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[ACTIVITY] Weekly status

by Richard Sandiford

== Last week == * Finished the patch that I was working on last week to use memory operands rather than register operands in neon.md. Submitted upstream: http://gcc.gnu.org/ml/gcc-patches/2011-03/msg01996.html Among other things, this allows the intrinsics to use post-modified addresses. * Submitted patches to make the number of rtl generator arguments (as opposed to insn operands) available to the expand-time code: http://gcc.gnu.org/ml/gcc-patches/2011-03/msg02227.html http://gcc.gnu.org/ml/gcc-patches/2011-03/msg02228.html http://gcc.gnu.org/ml/gcc-patches/2011-03/msg02229.html This is part of the tree-rtl expansion "cleanups" that I've been doing in preparation for the vectoriser work. * More discussion about the handling of type modes vs. per-function target switching. I've think we've agreed what the right approach is, although it's probably outside the scope of this project. The discussion was still useful because it meant I could submit & defend the next patch. * Submitted a patch to use non-BLK modes for arrays of vectors (like uint32x2x2_t & co. in arm_neon.h); http://gcc.gnu.org/ml/gcc-patches/2011-03/msg02192.html This avoids that stack spilling that was discussed during the week. Richard Guenther seemed happy with the patch in principle, but understandably wanted to see how the optabs stuff worked out first. Also, the testcase he asked me to try exposed another instance of: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46329 so that needs to be fixed first. * Started writing & testing a fix for that PR (46329). == This week == * Finish fix for PR46329. * More vld & vst stuff. Richard

14 years, 2 months

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[ACTIVITY] Mar.28 -- Apr.03

by Chung-Lin Tang

== Last week == * PR48250 / CS Issue #9845 / Launchpad #723185. Unaligned DImode reload under NEON. Went back and forth with Richard Earnshaw on gcc-patches for most of the week. The issues should finally be clear, and I think it would be better to modify the significant parts of arm_legitimize_reload_address() to do the right thing rather than just fixing the bug. I have a new patch done over the weekend, though it still shows a few regressions after some testing. I hope this gets done by this week... * PR48325 / Launchpad #744754, another NEON ICE in postreload. This appears to be the IA/DB modes for VLDM/VSTM for NEON struct modes were not enabled. This ICE actually does not happen currently on upstream trunk, but sent patch anyways. Pending review. * Spent some time on Launchpad #736661 (C++ ICE in expr.c), and looked at upstream testsuite regressions of gcc.dg/pr17957.c and gcc.dg/torture/pr47975.c under -mfpu=neon (ICE on OImode const0_rtx assignment). * Call with Ramana on ARM optimization work. == This week == * Get PR48250/Launchpad #723185 nailed. * Other pending GCC issues. * TW Public Holiday, Mon. and Tue. (Apr.4-5)

14 years, 2 months

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Improvements to bzr

by Michael Hope

The Bazaar team have been working on improving the performance of bzr on the gcc-linaro tree. Here's how long the steps take on my machine with the current 2.4 development version: Update tip before branching: bzr pull 20.4 s (no revisions) Make the branch: bzr branch --hardlink 4.5 optspace 26.8 s Do some work and commit it: ...change two files bzr status 1:05 (again) bzr status 1.7 s bzr commit . 3.6 s Push the changes up: bzr push lp:~michaelh1/gcc-linaro/optspace 3:47 ~9 MB (~40 kB/s which is saturating my uplink) Later, the merge master pulls the branch down and merges: bzr branch --no-tree lp:~michaelh1/gcc-linaro/optspace 36 s ~900 k bzr merge ../optspace 3:26 The bzr status and bzr commit are quite good. I've asked them to look into bzr merge. -- Michael

14 years, 2 months

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can linaro toolchain compile ARM earlier than Cortex A8?

by Barry Song

Hi All, After downloading linaro toolchain by apt-get in ubuntu, I compiled the uboot for ARM1136 SoC with -march=armv5 option. And it can compile successfully. Then I let the uboot run on target boards and system failed due to "undefined instructions". Checked linaro toolchain options, it is: #arm-linux-gnueabi-gcc -v Using built-in specs. COLLECT_GCC=arm-linux-gnueabi-gcc COLLECT_LTO_WRAPPER=/usr/lib/gcc/arm-linux-gnueabi/4.5.2/lto-wrapper Target: arm-linux-gnueabi Configured with: ../src/configure -v --with-pkgversion='Ubuntu/Linaro 4.5.2-5ubuntu2~ppa1' --with-bugurl=file:///usr/share/doc/gcc-4.5/README.Bugs --enable-languages=c,c++,fortran,objc,obj-c++ --prefix=/usr --program-suffix=-4.5 --enable-shared --enable-multiarch --enable-linker-build-id --with-system-zlib --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --with-gxx-include-dir=/usr/arm-linux-gnueabi/include/c++/4.5.2 --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --enable-plugin --enable-gold --enable-ld=default --with-plugin-ld=ld.gold --enable-objc-gc --disable-sjlj-exceptions --with-arch=armv7-a --with-float=softfp --with-fpu=vfpv3-d16 --with-mode=thumb --disable-werror --enable-checking=release --program-prefix=arm-linux-gnueabi- --includedir=/usr/arm-linux-gnueabi/include --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=arm-linux-gnueabi --with-headers=/usr/arm-linux-gnueabi/include --with-libs=/usr/arm-linux-gnueabi/lib Thread model: posix gcc version 4.5.2 (Ubuntu/Linaro 4.5.2-5ubuntu2~ppa1) The imporant options are "--with-arch=armv7-a --with-float=softfp --with-fpu=vfpv3-d16". I just want to ask whether these options stop arm-linux-gnueabi-gcc to support old arch? If so, according to gcc documents at http://gcc.gnu.org/install/configure.html, " --with-cpu=cpu --with-cpu-32=cpu --with-cpu-64=cpu Specify which cpu variant the compiler should generate code for by default. cpu will be used as the default value of the -mcpu= switch. This option is only supported on some targets, including ARM, i386, M68k, PowerPC, and SPARC. The --with-cpu-32 and --with-cpu-64 options specify separate default CPUs for 32-bit and 64-bit modes; these options are only supported for i386, x86-64 and PowerPC. --with-schedule=cpu --with-arch=cpu --with-arch-32=cpu --with-arch-64=cpu --with-tune=cpu --with-tune-32=cpu --with-tune-64=cpu --with-abi=abi --with-fpu=type --with-float=type These configure options provide default values for the -mschedule=, -march=, -mtune=, -mabi=, and -mfpu= options and for -mhard-float or -msoft-float. As with --with-cpu, which switches will be accepted and acceptable values of the arguments depend on the target. " There are only default values for later compiling. Users should be able to swith to other values by setting other options. But why did arm-linux-gnueabi-gcc still build "undefined instructions" to arm1136 with "arch=armv5"? In fact arm1136 is armv6. Then i compiled a toolchain for linaro gcc-linaro-4.4-2011.02-0 codes by myself, the options are simple: #arm-none-linux-gnueabi-gcc -v Using built-in specs. Target: arm-none-linux-gnueabi Configured with: ../gcc-linaro-4.4-2011.02-0/configure --target=arm-none-linux-gnueabi --prefix=/home/vmuser/development/toolchain/build-toolchain/tools --enable-languages=c,c++ --disable-libgomp Thread model: posix gcc version 4.4.5 (Linaro GCC 4.4-2011.02-0) Then I compiled uboot by this toolchain again, the uboot can work. Then why can the toolchain compiled by myself support more arch? And what performance is lost in my compiling? Thanks Barry

14 years, 2 months

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[Activity] March 28 - April 1

by Ramana Radhakrishnan

== GCC == Progress: * Investigated excessive VFP moves . Partially investigating ways forward. * Polished up my divmodsi4 patch. Discussed it during the call. Looking for ways to do it properly at the tree level. * Got Panda board on Friday. * Off on Wednesday. * Conversations with Revital and Chung-Lin. Need to sync up with Andrew next week. * Found an issue with binutils and Neon and this is now LP:747837 Plans: * Continue looking at excessive VFP moves. * Finish working through Thumb2 speed tickets. * Set up new Panda board. * Conversation with Andrew sometime this week. Meetings: * 1-1s * Linaro toolchain meeting Absences: * April 15 – 26 -> Booked Holiday. * May 9-14 - LDS Budapest

14 years, 2 months

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[ACTIVITY] Mar 28 - Apr 01

by Ulrich Weigand

== GDB == * Committed patch to fix single-stepping across bad ARM/Thumb boundary (bug #667309) to mainline and Linaro GDB. * Committed patch to fix accessing "fpscr" register to mainline. * Ongoing work to fix single-stepping over signal handlers (bug #615978). Posted yet another updated patch to gdb-patches for comments. * Implemented patch to support NEON registers in core files (bug #615972). * Investigated failure to disable address space randomization (bug #616001). Mit freundlichen Gruessen / Best Regards Ulrich Weigand -- Dr. Ulrich Weigand | Phone: +49-7031/16-3727 STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E. IBM Deutschland Research & Development GmbH Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk Wittkopp Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht Stuttgart, HRB 243294

14 years, 2 months

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[ACTIVITY] weekly status

by Ken Werner

Hi, == pandaboard == * noticed that hw perf events are not working on 2.6.38-1001-linaro-omap * it seems that the omap kernel has not configured its PMU properly * perf_event_open syscall returns ENODEV * started discussion with agreen (#744458) * noticed that natty puts its glibc into a multilib path * prevents linaro gcc (and upstream) from being built == libunwind == * created a generic and local variant of the extbl parser * ran the test suite a few times using different unwind methods * started to look into the test suite failures * started to fix a couple of the failures on ARM Regards Ken

14 years, 2 months

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[ACTIVITY] report week 13

by Peter Maydell

RAG: Red: Amber: Green: the aircon has been fixed; blessed quiet again Current Milestones: | Planned | Estimate | Actual | qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | | Historical Milestones: finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off | first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 | qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 | == maintain-beagle-models == * the board-ram-limits patchset has been expanded significantly to address upstream suggestions; it now includes a lot of refactoring of sun4m (sparc) board code to use the new generic max-ram functionality instead of a sun4m-specific bit of code. Unfortunately there is still some pushback upstream on the grounds that a simple max-ram limit doesn't cater for complicated NUMA situations :-( == merge-correctness-fixes == * working on moving implementation of VLD/VST "multiple structures" forms into qemu helper functions; the current implementation is correct but can expand to hundreds of TCG ops which is well beyond the maximum permitted value, so could potentially overrun a TCG buffer == other == * wrote up some technical/engineering input into what we ought to be doing with qemu next cycle * review of a patch by Dmitry Eremin-Solenikov adding ARMv4/v4T support * some review of s390 TCG patches (not because we have a direct interest in s390 but as part of being a good citizen upstream) * sent a pull request for some neon patches that had been on the list a few weeks; hopefully this will help drain the patch pipeline * meetings: toolchain, standup, pdsw-tools Current qemu patch status is tracked here: https://wiki.linaro.org/PeterMaydell/QemuPatchStatus Absences: Holiday: 22 Apr - 2 May 9-13 May: UDS, Budapest (maybe) ~17-19 August: QEMU/KVM strand at LinuxCon NA, Vancouver

14 years, 2 months

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