Hi,
I am trying add usb gadget mass storage to uboot , and got
run-time abortion on usbmsd.c with the default u-boot Os option. I
use linaro 2011.03 4.5.3 version, and my trials as following:
1) During debugging , I found the abort exception in
usbmsd_init_strings(). if declaring it with noinline function, like
static void usbmsd_init_strings (void) __attribute__((noinline));
it works, however, next steps still failed.
2) compling uboot with O0, everyhing is ok.
3) try other toolchain. It works with codesourcery's 2011.03-41
and ubuntu 4.5 version, while failed with 2011.04 4.5 linaro version.
4) I have dumped the obj files, seeming some funcs optimized ,
analysing the details is out of my knowledge, :( . please check the
attached three files.
toolchain:
ypluo@ypluo-dt:~/work/Current/L38EVB/Main/out/prima2cb$
arm-none-linux-gnueabi-gcc --v
Using built-in specs.
COLLECT_GCC=arm-none-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/home/ypluo/work/Current/Tools/toolchain/linaro-201103-csr-build-armv7-vfpv3_x86_32/bin/../libexec/gcc/arm-none-linux-gnueabi/4.5.3/lto-wrapper
Target: arm-none-linux-gnueabi
Configured with:
/media/8ccb10fd-862c-47d2-99fb-144e7188e1fb/home/vmuser/development/toolchain/build-toolchain/gcc-linaro-4.5-2011.03-0/configure
--target=arm-none-linux-gnueabi
--prefix=/media/8ccb10fd-862c-47d2-99fb-144e7188e1fb/home/vmuser/development/toolchain/build-toolchain/tools
--enable-languages=c,c++ --with-arch=armv7-a --with-float=softfp
--with-fpu=vfpv3-d16 --with-mode=thumb --enable-shared
--enable-multiarch --enable-threads=posix --enable-nls
--enable-clocale=gnu --enable-libstdcxx-debug
--enable-libstdcxx-time=yes --disable-werror
--with-pkgversion='Ubuntu/Linaro 4.5-2011.3-csr-build'
--enable-poison-system-directories
Thread model: posix
gcc version 4.5.3 20110221 (prerelease) (Ubuntu/Linaro 4.5-2011.3-csr-build)
ypluo@ypluo-dt:~/work/Current/L38EVB/Main/out/prima2cb$
/home/ypluo/mywork/toolchain/arm-2011.03/bin/arm-none-linux-gnueabi-gcc
--v
Using built-in specs.
COLLECT_GCC=/home/ypluo/mywork/toolchain/arm-2011.03/bin/arm-none-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/mywork/toolchain/arm-2011.03/bin/../libexec/gcc/arm-none-linux-gnueabi/4.5.2/lto-wrapper
Target: arm-none-linux-gnueabi
Configured with:
/scratch/janisjo/arm-linux-lite/src/gcc-4.5-2011.03/configure
--build=i686-pc-linux-gnu --host=i686-pc-linux-gnu
--target=arm-none-linux-gnueabi --enable-threads --disable-libmudflap
--disable-libssp --disable-libstdcxx-pch
--enable-extra-sgxxlite-multilibs --with-arch=armv5te --with-gnu-as
--with-gnu-ld --with-specs='%{save-temps: -fverbose-asm}
%{funwind-tables|fno-unwind-tables|mabi=*|ffreestanding|nostdlib:;:-funwind-tables}
-D__CS_SOURCERYGXX_MAJ__=2011 -D__CS_SOURCERYGXX_MIN__=3
-D__CS_SOURCERYGXX_REV__=41 %{O2:%{!fno-remove-local-statics:
-fremove-local-statics}}
%{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics:
-fremove-local-statics}}}' --enable-languages=c,c++ --enable-shared
--enable-lto --enable-symvers=gnu --enable-__cxa_atexit
--with-pkgversion='Sourcery G++ Lite 2011.03-41'
--with-bugurl=https://support.codesourcery.com/GNUToolchain/
--disable-nls --prefix=/opt/codesourcery
--with-sysroot=/opt/codesourcery/arm-none-linux-gnueabi/libc
--with-build-sysroot=/scratch/janisjo/arm-linux-lite/install/arm-none-linux-gnueabi/libc
--with-gmp=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-mpfr=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-mpc=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-ppl=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic
-lm' --with-cloog=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-libelf=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--disable-libgomp --enable-poison-system-directories
--with-build-time-tools=/scratch/janisjo/arm-linux-lite/install/arm-none-linux-gnueabi/bin
--with-build-time-tools=/scratch/janisjo/arm-linux-lite/install/arm-none-linux-gnueabi/bin
Thread model: posix
gcc version 4.5.2 (Sourcery G++ Lite 2011.03-41)
Please let me know if other info needed.
Many thanks.
Yuping
My MOVW patch from last week left an unused variable that killed -Werror
builds, so I posted a new patch to fix it.
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg04141.html
Ramana approved that in record time, so I've committed it.
Tom has committed Mark Shinwell's BRANCH_COST patch upstream, so I have
backported it to Linaro GCC 4.6.
Maxim has committed his compound conditionals patch upstream, so I've
backported that to Linaro GCC 4.6 also.
Reviewed what other patches are queued for forward porting to 4.6/7,
hoping that other's might have picked some of them off, and found no
other progress just yet.
Reduced the test case for GCC PR48783. For some reason it is retaining
".global" directives for symbols that have been optimized away, which
leads to link errors in the kernel build.
Tried to find out why the "discourage neon in A8" patch has caused test
failures. I'm still not sure - I've asked Michael Hope to rerun the
tests in case it's just random.
Reposted the EABI half-precision patch with the extra bits Joseph says
it needed in the version scripts.
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg04251.html
Looked at the linking problem reported by Barry Song on the
linaro-toolchain list.
* Other
Public holidays on Monday and Friday.
* Future
I will be attending UDS in Budapest from 8th - 14th May. I shall
continue to read my email, but will not be attending any calls.
----
Upstream patched requiring review:
* NEON scheduling patch
http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01431.html
* ARM Thumb2 addw/subw support.
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03783.html
* ARM Thumb2 Replicated constants
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03883.html
* ARM EABI half-precision function names (reposted 2011-04-27).
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg04251.html
== Last week ==
* CoreMark ARMv6/v7 regression patch set for combine: exchanged some
comments on upstream list with Jeff Law. Started some testing on
powerpc64, hit some issues with native bootstrap that I
don't think I completely overcome, but at least completed a 32-bit
bootstrap successfully. Unfortunately hit two regressions after running
tests, will work on fixing this week, and update the upstream submission.
* PR48783: unused reference to __aeabi_uldivmod. Investigated and found
this to be a case where during RTL expand, .global directives for the
__aeabi_* runtime symbols are directly inserted after some div optab
didn't have the insns, and a libfunc was to be used. However later
optimizations that removed the divisions left the .global symbols
dangling with no uses. We could probably just avoid adding the
directives completely for the EABI functions.
* PR42017: ARM LR register not used in leaf functions. This is a case
where DF takes EPILOGUE_USES as part of the initial live registers at
end of functionn, and liveness computations never get to kill it, since
there are no function calls to clobber in a leaf function. Submitted a
patch to remove LR from EPILOGUE_USES before reload, awaiting review.
* LP #689887: investigated more; not much progress, but found that the
bootstrap fail happens only under --with-mode=thumb (Thumb-2). Under ARM
mode the native bootstrap succeeds.
== This week ==
* Try to fix the problems with the CoreMark combine patches.
* Investigate more optimizations/bugs.
* Prepare for travel to Budapest on Saturday.
Hello,
- Continued analysing DENbench benchmarks.
- Discussed the SMS patched with Ayal Zaks (SMS maintainer).
- Booked the flights for Budapest summit.
Thanks,
Revital
Hi,
libunwind:
* the initial support for resuming at a certain stack frame went upsream
* learned about the various signal frame layouts on ARM
* RT frames, non-RT frames for present and pre 2.6.18 kernels
* implemented support for RT signal frame detection on ARM
* started to implement support for unw_resume if signal frames are involved
* attended a class on Friday
Note: Monday was a public holiday.
Regards
Ken
== GDB ==
* Committed series of patches to fix bug #615978 (Failure to software
single-step into signal handler) to mainline and Linaro GDB.
* Drafted blueprint linaro-toolchain-o-cross-debug
== GCC ==
* Split bug #771900 (Linaro GCC 4.5 switch optimization breaks profiled
bootstrap) off bug #759409 (Profiled bootstrap fails in GCC 4.5).
Tracked down root cause of bug #759409 / PR middle-end/43085, and
posted fix to gcc-patches.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Hi All,
I found Jie has committed a patch
"http://sourceware.org/ml/binutils/2010-05/msg00083.html".
I am using the newest binary utils(2.21) and encounted the following ASSERT in
arm_elf32.c:
+ if (out_attr[i].i == 0)
+ {
+ BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
My compiling options are as below,
ASM_FLAGS :=
\
-gdwarf-2 \
-mfpu=vfp \
-mfloat-abi=softfp \
-mthumb-interwork
C_FLAGS :=
\
$(ASM_FLAGS) \
-O3 -Wno-all \
-fno-optimize-sibling-calls \
-mlong-calls \
-ffunction-sections \
CPP_FLAGS :=
\
-fno-rtti \
-fno-exceptions \
LINK_FLAGS :=
\
--gc-sections -nostdlib \
-L ../stdlib \
-Wl,--as-needed \
-Wl,-no-enum-size-warning \
--cref \
ARFLAGS :=
\
rcs
Can anyone give me any tip about why the assert is triggered?
I have reported a bug here:
http://sourceware.org/bugzilla/show_bug.cgi?id=12700
But not sure whether it is a bug.
-barry
Hi All,
I am using 2011.3 4.5 linaro GCC(armv7-a vfpv3d16) to compile kernel
and modules. I select to compile all codecs as modules:
"config SND_SOC_ALL_CODECS
tristate "Build all ASoC CODEC drivers"
"
as M and I2C/SPI too.
Then in the kernel dir, run "make" to get both vmlinux and modules, I
found snd-soc-wm8974.ko, snd-soc-wm8940.ko and snd-soc-wm8510.ko will
fail due to "__aeabi_uldivmod undefined".
If i comment do_div() in these codec drivers, this issue will
disappear. But it is strange there are many codecs which use do_div()
too, for example:
sound/soc/codecs/max98088.c
sound/soc/codecs/max9850.c
sound/soc/codecs/wm8350.c
sound/soc/codecs/wm8400.c
sound/soc/codecs/wm8510.c
sound/soc/codecs/wm8580.c
sound/soc/codecs/wm8753.c
sound/soc/codecs/wm8804.c
sound/soc/codecs/wm8900.c
sound/soc/codecs/wm8904.c
sound/soc/codecs/wm8940.c
sound/soc/codecs/wm8955.c
sound/soc/codecs/wm8960.c
sound/soc/codecs/wm8974.c
sound/soc/codecs/wm8978.c
sound/soc/codecs/wm8985.c
sound/soc/codecs/wm8990.c
sound/soc/codecs/wm8991.c
sound/soc/codecs/wm8993.c
sound/soc/codecs/wm8994.c
sound/soc/codecs/wm8995.c
sound/soc/codecs/wm9081.c
but others can pass the compiling except those 3 modules. Is it due to
a wrong optimization by gcc?
Other information:
1. old tool-chains we are using can pass the compiling of the 3 modules.
2. If i built all codecs into kernel image, these 3 drivers don't
report error while compiling.
Thanks
Barry
2011/4/27 Mark Brown <broonie(a)opensource.wolfsonmicro.com>
>
> On Wed, Apr 27, 2011 at 04:50:12PM +0800, Barry Song wrote:
>
> > Marking pll_factors() as noinline or putting asm("" : "+r"(source)); before the
> > call to do_div() works around the problem.
>
> If we do have to do something in the callers rather than in do_div() the
> annotation seems substantially more taseful than inserting a random asm
> into the code.
I agree. for this patch which will not be applied, people can just get
information about how to workaround the gcc issue while they have the
same problem. google can find there are other people who failed to
compile wm8974 module too. eg.
http://irclogs.ubuntu.com/2010/03/30/%23ubuntu-arm.txt
Andrew Stubbs, Michael Hope in Linaro's toolchain team are working
hard on this gcc issue. there have been many update today:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48783
Hi All,
As i have frequently said, we are using 2011.3 4.5 linaro gcc. For the
following codes, if we compile it by -O2, it will crash with "segment
fault", if we just comment " if(unifi_debug >= level) {", all will be
ok.
If we don't compile it by -O2, all will be ok too.
#include <stdlib.h>
#include <stdio.h>
#include <stdarg.h>
#define DEBUG_BUFFER_SIZE 80
int unifi_debug = 5;
void
unifi_trace(void* ospriv, int level, const char *fmt, ...)
{
static char s[DEBUG_BUFFER_SIZE];
va_list args;
unsigned int len;
if(unifi_debug >= level) {
va_start(args, fmt);
len = vsnprintf(&(s)[0],
(DEBUG_BUFFER_SIZE),
fmt, args);
va_end(args);
if (len >= DEBUG_BUFFER_SIZE) {
(s)[DEBUG_BUFFER_SIZE - 2] = '\n';
(s)[DEBUG_BUFFER_SIZE - 1] = 0;
}
printf("%s", s);
}
}
int main(void)
{
char *prog = "/usr/sbin/unififw";
unifi_trace(NULL, 1, "start %s\n", prog);
return 0;
}
Thanks
Barry
Hi there. A first-pass list of summit sessions is up at:
https://wiki.linaro.org/MichaelHope/Sandbox/1111Blueprints
The next step is to investigate these areas and come up with a basic
plan that can be discussed during the summit.
I've put your names against the sessions as follows:
Andrew: Broad tuning
Dave: String routines everywhere
Dave: QEMU topic #2
Doug: STM support
Ira: Vectoriser and NEON performance
Ken: 64 bit sync primitives
Ken: Good backtracing
Ken: End-developer tools bluesky
Michael: Publish benchmarking of the toolchain
Michael: Binary builds
Michael: Deeper validation
Peter: QEMU bluesky
Ramana: Thumb-2 performance brainstorm
Ramana: GCC backend rework
Ulrich: GDB as a cross-debugger
Ira and Dave, I know you won't be at the summit but we'll see about
being able to call in.
Could you all please have a read of the outline, investigate these
topics, and draft up a blueprint-style list of work items to achieve
it? Record any notes in the sandbox page[5] or in a child page if
needed. Larger topics may warrant a specification[1].
I'd like these done by the end of next week. I'd expect to spend up
to a day on the topics you already understand and more on broad
topics.
For reference, the see the draft TRs[2] and spreadsheet [3]. I've
added some GDB topics to the spreadsheet that still need to go onto
the wiki page.
The outlines should touch each of these TRs in some way so let me know
if I've missed anything.
There's more good information on the process and style at:
https://wiki.linaro.org/Process/Blueprintshttps://wiki.linaro.org/Process/WorkItemsHowtohttps://wiki.linaro.org/Resources/FAQ
Questions? Need more detail? Let me know.
-- Michael
[1] https://wiki.linaro.org/Process/SpecTemplate
[2] https://wiki.linaro.org/Cycles/1111/TechnicalTopics/Toolchain
[3] https://spreadsheets.google.com/ccc?key=0Ap7fWLePADFVdHkxYy1INTZmMEd4bkwxSG…
[4] there is no 4...
[5] https://wiki.linaro.org/MichaelHope/Sandbox/1111Blueprints
Hi,
Agenda for today's performance call . Sorry about the last minute
posting and I'll put this in the wiki soon enough.
1. Sync-up on what's been happening around the group:
a. Coremark regressions.
b. Thumb2 constants patch.
c. divmodsi4 and vfp register moves.
d. DENBench investigations.
2. Planning for the summit and turning some of the ideas into blueprints.
3. AOB.
cheers
Ramana
== Last week ==
* PR48250, rehaul arm_legitimize_reload_address(). Richard Sandiford
caught a bug of mine where I overlooked the valid index range of NEON
quad-word load/stores. Quickly whipped up a fix, soon approved and
committed upstream.
* LP #744754, ICE in NEON struct-mode auto-inc-dec MEMs. Pushed upstream
patch for a merge to Linaro 4.5.
* PR46888, bit-field insert optimization patch. Resumed investigating,
mailed Andrew Pinski for more information on that REG_EQUAL note issue
he mentioned on gcc-patches; can't quite reproduce it myself.
* CoreMark ARMv6/v7 regressions: posted a patch set to gcc-patches.
Still waiting review.
* Reported to Bernd and AndrewS on an issue (LP #748138) which seems to
be related to the shrink-wrap patch. This ICE does not seem to be
avoided by doing -fno-shrink-wrap.
* A few tasks related to Linaro-Budapest event travel.
== This week ==
* Do the merge of the new combine patches to Linaro, and test.
* LP #689887 is still in progress.
* Hope to experiment with a few more optimization ideas.
Michael mentioned that some users reported seeing better preformance from
RVCT using arm_neon.h then they did when coding directly in assembler.
He suggested we try the same thing for GCC. Here's an experiment using
the example that Jim Huang posted to the dev list recently:
https://wiki.linaro.org/RichardSandiford/Sandbox/IntrinsicsPerformance
The summary is that the C version needs to borrow a trick from the
assembly code in order to be competitive. If it does that, though,
the C code can be faster. I think this is mostly down to scheduling,
although I haven't checked in detail yet.
Richard
== String and Memory routines ==
* Profiled denbench with perf and produced a set of stats to show
which programs spent how much time in libc and how
much time was spent in each routine. While some of the
benchmarks are good (like aes) and spend almost no time in libc
some of the others (MPEG codecs especially) seem to spend
significant times in libc.
* Ran all of denbench through latrace to generate sets of library
calls; post processed them to extract the section between the clock()
calls (and hence in the timed portion) and analysed the hot library
calls. I've looked at some of the output but not all of it yet; I
get output like:
Memcpy stats (dst align/src align/length/number of occurrences/total
size copied)
memcpy: 0,0,1 , 1588520, 1588520
memcpy: 16,28,4096 , 1, 4096
memcpy: 4,20,16384 , 855, 14008320
This shows that for a bunch of tests they do an inordinate number of 1
byte memcpy's, and a few hundred larger memcpy's with an address %32
which is 4
(and destination %32 is 20) - so not aligned but at least equally misaligned.
* Started writing up a report on some of the stats
* Also started to try and extract the same stuff from SPEC2k6
== QEMU ==
* Tested Peter's QEmu release earlier in the week (On Lucid so
didn't hit his natty bug)
* Wrote up a couple of specs (one for TrustZone and the other for
Device Tree integration)
== GDB ==
* Created Linaro GDB 7.2-2011.04-0 release.
* Committed patch to fix accessing "fpscr" register to Linaro GDB.
* Failure to disable address space randomization (bug #616001) has been
fixed in the kernel; closed the Linaro GDB bug.
== GCC ==
* Ongoing analysis of bug #759409 (Profiled bootstrap fails). Identified
two independent problems, one related to a new CodeSourcery feature,
and one a mis-optimization of final-stage cc1plus which is also present
in FSF GCC 4.5 (PR 43085). Ongoing investigation to track down the
root cause of the latter problem.
== Schedule ==
* Public holidays 04/22 - 04/25.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
RAG:
Red:
Amber:
Green: another monthly qemu-linaro release out on schedule
Current Milestones:
| Planned | Estimate | Actual |
qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | 2011-04-21 |
Historical Milestones:
finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off |
first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 |
qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 |
== maintain-beagle-models ==
* qemu-linaro 2011.04 tested and released
* had to do another last minute -1 respin to fix a problem caught by
ubuntu package builds; we need to come up with a process that lets
us do test package builds prior to release so we can fix this sort
of issue in a less last-minute fashion
== merge-correctness-fixes ==
* sent patch: fix semihosting SYS_HEAPINFO (seems to have issues though)
* sent patch: UNDEFs in Neon load/store space
* sent patches: fix build issues on sparc
* sent patch: bump the initrd load address to work with bigger kernels
* sent patch: set Invalid flag for float-to-int conversion of NaN
* sent patch: move vld/vst multiple to helper functions
* reviewed patches from Aurelien doing some general softfloat cleanup
* sent out a version of my performance counters patch which just does
a basic dummy implementation without the cycle counter (since the
cycle counter bits were going off down a blind alley rather and this
part is the last thing needed to be able to boot Linaro vexpress
images on stock upstream QEMU)
== other ==
* trying to nail down proposed QEMU work for next cycle; work-in-progress:
https://wiki.linaro.org/PeterMaydell/Qemu1111
* meetings: toolchain, standup
Current qemu patch status is tracked here:
https://wiki.linaro.org/PeterMaydell/QemuPatchStatus
Absences:
Holiday: 22 Apr - 2 May
9-13 May: UDS, Budapest
(maybe) 15-16 August: QEMU/KVM strand at LinuxCon NA, Vancouver
[LinuxCon proper follows on 17-19th]
Hi,
libunwind:
* added initial support for resuming at a certain stack frame
* posted unw_resume support plus some some testsuite fixes on the ml
* there are still some issues left if signal handlers/frames are involved
Note: Friday is a public holiday.
Regards
Ken
== This week ==
* Iterated with upstream on some of the vectorisation patches. I think
only half a patch (the ARM implementation of array_mode_supported_p)
is still pending review; everything else has been approved.
* Backported the vldN and vstN intrinsics to Linaro 4.5.
* Finished off the microbenchmarks for libav.
* One of the problems in the original libav output was that the
vectoriser didn't realise that a group of N accesses really did form
a group. It instead generated N separate interleave operations and took
1 vector from each.
Submitted a fix for that, which is now committed upstream. Updated the
libav wiki page with the new, improved output.
(This actually allowed more libav loops to be vectorised, as well
as improving the output from some of the existing ones. I haven't
looked at the new ones. I expect this comes from interleaved stores.)
* Wrote an arm_neon.h version of Android's scanline_t32cb16_neon and
compared it with the original.
* Started (and only started) seeing how the vectorisation stuff
affects DENbench.
* Backported the dwarf2out OOM fix to Linaro 4.6.
== Next week ==
* Do something useful on DENbench.
* If all goes well, commit the vectorisation work upstream and backport
it to Linaro 4.5 and 4.6.
...but it's only a three day week.
Richard
The Linaro Toolchain Working Group is pleased to announce the release
of Linaro QEMU 2011.04-1.
Linaro QEMU 2011.04-1 is the third release of qemu-linaro. Based
off upstream (trunk) qemu, it includes a number of ARM-focused
bug fixes and enhancements.
Interesting changes include:
- Compiling for an ARM host in Thumb mode now works
- As usual, various minor correctness fixes and other upstream changes
Known issues:
- The beagle and beaglexm models do not support USB, so there is no
keyboard, mouse or networking (#708703)
The only change over the shortlived 2011.04-0 is to fix a compilation
failure with gcc 4.5.
The source tarball is available at:
https://launchpad.net/qemu-linaro/+milestone/2011.04-1
Binary builds of this qemu-linaro release are being prepared and
will be available shortly for users of Ubuntu. Packages will be in
the linaro-maintainers tools ppa:
https://launchpad.net/~linaro-maintainers/+archive/tools/
More information on Linaro QEMU is available at:
https://launchpad.net/qemu-linaro
The Linaro Toolchain Working Group is pleased to announce the release
of Linaro GDB 7.2.
Linaro GDB 7.2 2011.04 is the fifth release in the 7.2 series. Based
off the latest GDB 7.2, it includes a number of ARM-focused bug fixes.
This release fixes:
* LP: #684218 Failure to backtrace out of glibc system call stubs
* LP: #667309 failed to single step over bad thumb->arm boundary
* Fix accessing "fpscr" register
The source tarball is available at:
https://launchpad.net/gdb-linaro/+milestone/7.2-2011.04-0
More information on Linaro GDB is available at:
https://launchpad.net/gdb-linaro
-- Michael
The Linaro Toolchain Working Group is pleased to announce the release
of both Linaro GCC 4.5 and Linaro GCC 4.6.
Linaro GCC 4.5 2011.04 is the ninth release in the 4.5 series. Based
off the latest
GCC 4.5.2+svn171921, it adds new optimisations, support for Android,
and fixes for many of the issues found in the last month.
Linaro GCC 4.6 2011.04 is the second release in the 4.6 series. Based off the
latest GCC 4.6.0+svn171921, it is the first supported release of the
new series and includes a significant number of mainstreamed patches
from 4.5.
Interesting changes in 4.6 include:
* Updates to 4.6.0+r171921
* Adds conditional store sinking to the vectoriser
* Brings in a significant number of the Linaro GCC 4.5 patches that
are in mainline
Interesting changes in 4.5 include:
* Updates to 4.5.2+r172013
* Disables the shrink wrap optimisation by default
* Adds support for swing-modulo scheduling (SMS) on ARM
* Adds support for Android and the Bionic C library
* Optimises -fvar-tracking, greatly reducing memory used when
compiling large files (seen in QEMU)
Fixes:
* 'volatile' being ignored on volatile struct members
* A potential register clobber in arm_negdi2
* An error in libgcc that prevented it being built with -Os
* Multiple shrink wrap bugs (LP: #731665, 721023, 736081, 758082,
730860, 736439, 721023)
* LP: #730440 incorrect immediate for movt (seen in Firebird)
* LP: #728315 extension elimination pass mishandles subregs of
promoted variables (seen on MIPS)
* LP: #675347 volatile int causes inline assembly build failure (seen
in Qt)
SMS is an optimisation that works on innermost loops and reorders the
instructions by overlapping different locations. An example is that
the values for the next loop may be loaded during the current loop,
making the values already ready when the next loop starts.
SMS is disabled by default. To try it, add the options '-fmodulo-sched
-fmodulo-sched-allow-regmoves'.
The source tarball is available from:
https://launchpad.net/gcc-linaro/+milestone/4.5-2011.04-0https://launchpad.net/gcc-linaro/+milestone/4.6-2011.04-0
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
-- Michael
Here's a script for installing TI's DVSDK 3:
https://bitbucket.org/thayne/ti-omap-tools/src
Works with
- CodeSourcery
- OpenEmbedded
- Linaro
It will download the bazillion dependencies scattered across TI's site and
makes it easier to gut the DVSDK's hard-coded paths to work for your setup.
The DVSDK 4 isn't used because it is completely different from the DVSDK 3
and is much more difficult to root the hard paths and checks out of.
AJ ONeal
Hi toolchain, kernel folks,
I'm seeing an interesting thing on .got and .bss sections of
arch/arm/boot/compressed/vmlinux, and really need your expertise to
shed some lights.
I have an uninitialized variable 'uart_base' defined in misc.c.
static unsigned long uart_base;
$ arm-linux-gnueabi-objdump -D arch/arm/boot/compressed/misc.o
Disassembly of section .bss:
00000000 <uart_base>:
0: 00000000 andeq r0, r0, r0
00000004 <__machine_arch_type>:
4: 00000000 andeq r0, r0, r0
[...]
And section layout looks like the following.
$ arm-linux-gnueabi-objdump -h arch/arm/boot/compressed/vmlinux
SECTIOINS {
...
_etext = .;
_got_start = .;
.got : { *(.got) }
_got_end = .;
.got.plt : { *(.got.plt) }
_edata = .;
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
...
}
$ arm-linux-gnueabi-objdump -h arch/arm/boot/compressed/vmlinux
arch/arm/boot/compressed/vmlinux: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 001c474c 00000000 00000000 00008000 2**5
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .got 00000028 001c474c 001c474c 001cc74c 2**2
CONTENTS, ALLOC, LOAD, DATA
2 .got.plt 0000000c 001c4774 001c4774 001cc774 2**2
CONTENTS, ALLOC, LOAD, DATA
3 .bss 00000020 001c4780 001c4780 001cc780 2**2
ALLOC
4 .stack 00001000 001c47a0 001c47a0 001cc780 2**0
ALLOC
5 .comment 0000002a 00000000 00000000 001cc780 2**0
CONTENTS, READONLY
6 .ARM.attributes 00000031 00000000 00000000 001cc7aa 2**0
CONTENTS, READONLY
I'm able to see uart_base in vmlinux objdump ...
$ arm-linux-gnueabi-objdump -t arch/arm/boot/compressed/vmlinux
[relevant only, and sorted]
00000000 l d .text 00000000 .text
001c474c l d .got 00000000 .got
001c4774 l d .got.plt 00000000 .got.plt
001c4780 l d .bss 00000000 .bss
003968e4 g *ABS* 00000000 _image_size
001c474c g *ABS* 00000000 _got_start
001c4774 g *ABS* 00000000 _got_end
001c4780 g *ABS* 00000000 _edata
001c4780 g *ABS* 00000000 __bss_start
001c4780 l O .bss 00000004 uart_base
001c4798 g O .bss 00000004 malloc_ptr
001c478c g O .bss 00000004 output_ptr
001c479c g O .bss 00000004 malloc_count
001c4794 g O .bss 00000004 free_mem_end_ptr
001c4788 g O .bss 00000004 output_data
001c4784 g O .bss 00000004 __machine_arch_type
001c4790 g O .bss 00000004 free_mem_ptr
001c47a0 g *ABS* 00000000 _end
... but I can not see it in the zImage (all others in .bss seem still
there).
$ xxd arch/arm/boot/zImage | tail
01c4740: 3ef1 1400 be52 9f58 e468 3900 4c47 1c00 >....R.X.h9.LG..
^_got_start (why is it?)
01c4750: 9847 1c00 1043 0000 8c47 1c00 9c47 1c00 .G...C...G...G..
^malloc_ptr ^output_ptr
01c4760: 9447 1c00 080a 0000 8847 1c00 8447 1c00 .G.......G...G..
^free_mem_end_ptr ^__machine_arch_type
01c4770: 9047 1c00 0000 0000 0000 0000 0000 0000 .G..............
^free_mem_ptr
The following is a run-time memdump at _got_start.
Before recalculation:
9056304C: 001C474C 001C4798 00004310 001C478C 001C479C 001C4794 00000A08 001C4788
^_got_start (why is it?)
9056306C: 001C4784 001C4790 00000000 00000000 00000000 EDFE0DD0 4C010000 38000000
After recalculation (for .bss entries, the delta is 9039EA50, for
others in .got, delta is 9039E900):
9056304C: 9056304C 905631E8 903A2C10 905631DC 905631EC 905631E4 9039F308 905631D8
9056306C: 905631D4 905631E0 00000000 00000000 00000000 73FBC000 4C010000 38000000
QUESTION: Where is the .bss section of uart_base?
Now, I remove the 'static' to have 'unsigned long uart_base', and
dump the same stuff to compare.
$ arm-linux-gnueabi-objdump -D arch/arm/boot/compressed/misc.o
Disassembly of section .bss:
00000000 <__machine_arch_type>:
0: 00000000 andeq r0, r0, r0
00000004 <uart_base>:
4: 00000000 andeq r0, r0, r0
I'm able to see uart_base in vmlinux objdump ...
$ arm-linux-gnueabi-objdump -t arch/arm/boot/compressed/vmlinux
[relevant only, and sorted]
00000000 l d .text 00000000 .text
001c4720 l d .got 00000000 .got
001c474c l d .got.plt 00000000 .got.plt
001c4758 l d .bss 00000000 .bss
003968e4 g *ABS* 00000000 _image_size
001c4720 g *ABS* 00000000 _got_start
001c474c g *ABS* 00000000 _got_end
001c4758 g *ABS* 00000000 _edata
001c4758 g *ABS* 00000000 __bss_start
001c475c g O .bss 00000004 uart_base
001c4770 g O .bss 00000004 malloc_ptr
001c4764 g O .bss 00000004 output_ptr
001c4774 g O .bss 00000004 malloc_count
001c476c g O .bss 00000004 free_mem_end_ptr
001c4760 g O .bss 00000004 output_data
001c4758 g O .bss 00000004 __machine_arch_type
001c4768 g O .bss 00000004 free_mem_ptr
001c4778 g *ABS* 00000000 _end
... and I can also see it in the final zImage.
$ xxd arch/arm/boot/zImage | tail
01c4710: 221f f1b3 3ef1 1400 be52 9f58 e468 3900 "...>....R.X.h9.
01c4720: 5c47 1c00 2047 1c00 7047 1c00 e442 0000 \G.. G..pG...B..
^uart_base
01c4730: 6447 1c00 7447 1c00 6c47 1c00 140a 0000 dG..tG..lG......
01c4740: 6047 1c00 5847 1c00 6847 1c00 0000 0000 `G..XG..hG......
01c4750: 0000 0000 0000 0000 ........
Surely, it's in the run-time memdump.
Before recalculation:
90563020: 001C475C 001C4720 001C4770 000042E4 001C4764 001C4774 001C476C 00000A14
^uart_base
90563040: 001C4760 001C4758 001C4768 00000000 00000000 00000000 EDFE0DD0 4C010000
After recalculation:
90563020: 905631AC 90563020 905631C0 903A2BE4 905631B4 905631C4 905631BC 9039F314
90563040: 905631B0 905631A8 905631B8 00000000 00000000 00000000 EDFE0DD0 4C010000
So it looks the non-static ('g') uninitialized variable sits in .bss
sections well, while static ('l') one is not there. Is this
expected? How the static one is being addressed? Or ask where the
offset for static one is stored?
Any info or comments are appreciated.
--
Regards,
Shawn
I've just submitted a merge request for the vldN and vstN intrinsic
improvements. There are five related patches, so I thought it might
be easier to review the merge if I posted the individual changes here.
See:
http://www.mail-archive.com/linaro-toolchain@lists.linaro.org/msg00969.html
for an example of how this helps.
Richard
I just did `git checkout` for linaro/linux-2.6.38 and tried compiling with
CROSS_COMPILE=arm-linux-gnueabi- and I get this smc #0 error.
The bug filed here is marked as fixed, but it's still broken for me:
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/669912
I ran into this error once before, but I can't find my notes for it.
I think the solution was to append something like $(sec) on a line in the
Makefile.
Any ideas?
AJ ONeal
Hi there. I'd like to change and clarify how we make changes inside
Linaro toolchain projects. The write-up is here:
https://wiki.linaro.org/WorkingGroups/ToolChain/MakingChanges
The short story is that now, just like mainline, the developers
themselves do the final commit or merge into bzr. I've volunteered
three of you on a review roster so that someone has the responsibility
for reviewing patches each week. The roster is:
* Ramana week 15, 17, 20, ... starting the 11th of April 2011
* Richard week 16, 18, 21, ... starting the 18th of April 2011
* Ulrich week 17, 19, 22, ... starting the 25th of April 2011
Anyone is welcome to review patches. The more eyes the better.
Thoughts?
-- Michael
I'm just curious as to what "__aeabi_unwind_cpp_pr0" is or means.
I can't find any explanation by googling.
I'm about to post a separate e-mail with my problem concerning it.
AJ ONeal
Reviewed and approved Revital's do-loop patch, and Ira's store sinking
patch. More precisely, I reviewed the test results from Michael's test
system, and cast my eye over the patch to look for anything obvious. I
don't pretend to know exactly what they do.
Attended Ramana's thumb2 optimization discussion.
Continued work on merging useful patches from CodeSourcery. Pushed the
new patch set to Launchpad for testing in Michael's system.
Pointed Bernd at lp:758082 - another probable shrink-wrap failure. Bernd
responded with a new patch, and asked me to test it. I've pushed it to
Launchpad and created a merge request.
Posted an old patch of Dan's upstream:
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03144.html
Pinged my thumb2 constants patch upstream. Richard E responded with some
issues to address. I'll need to change the names of the constraints, at
least.
At Ramana's request, tested the NEON scheduling patch with SPEC2000.
Encountered trouble with time-outs. Fixed those and retested.
Posted an updated version of my EABI half-precision patch:
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03210.html
Merged my backport of Julian's -fstrict-volatile-bitfields bug fix into
Linaro GCC.
The testing of the Android patches came back with a few test
differences, but they appear to be unrelated to the patch, so are
probably environmental. I've merged the changes to Linaro GCC.
[Also spent most of Friday working on internal CS tasks.]
----
Upstream patched requiring review:
* NEON scheduling patch
http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01431.html
* NEON test cases
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03144.html
* ARM EABI half-precision functions (reposted)
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03210.html
== Last week ==
* CoreMark regressions: pushed a merge of my two upstream patches to
Linaro 4.5, some current numbers are here:
http://lists.linaro.org/pipermail/linaro-toolchain/2011-April/001087.html.
* Continued working on another combine patch for improving CoreMark,
hopefully ready to submit this week.
* Committed fix for PR48325 (NEON POST_INC/PRE_DEC load/stores for
struct modes) upstream.
* Committed fix for PR48250 / Launchpad #723185 upstream.
* Launchpad #689887, ICE in get_arm_condition_code(). My prior patch was
tested to cause native bootstrap failure on Linaro 4.5, though retesting
on upstream trunk worked fine. Still investigating.
* Booked travel for Linaro-Budapest event.
== This week ==
* Current combine patch.
* Some unresolved patches, like PR46888.
* Launchpad #689887, hope to figure this out.
I've started up a page with ideas for sessions at next month's summit:
https://wiki.linaro.org/MichaelHope/Sandbox/1111Blueprints
They're a pretty direct map to the TSC technical topics so far which
is nice to see. Feel free to add other ideas to the page. Each
session is around 45 minutes, needs to be fairly well understood by
the drafter beforehand, and should have concrete actions coming out of
it. It's fine to have a few future/blue sky sessions but not too
many.
We'll discuss these at tonights meeting and assign drafters.
-- Michael
I've now submitted the initial vldN and vstN work, so I thought I'd see
how often it triggers for natty's libav package. I've put some initial
results here:
https://wiki.linaro.org/RichardSandiford/Sandbox/NeonLibAv
There are more files to go through, so this isn't complete.
I've also left out cases that were very similar to the ones given.
Some of the code is reasonable, while others are obviously not as good
as they could be. I don't think the problems are really to do with
the vldN and vstN work itself though. They seem to be due to the
underlying interleaved load/store detection, or in the handling
of widening operations.
Richard
== Bug triaging ==
* Bug 745843 (vtk ftbfs) got it down to a bad arm/thumb transition -
identified as a linker error and handed off to RichardS
* Bug 758082 (augeas ftbfs) tracked it down to overwrite of a
parameter in a variadic function before it got stacked; identified by
Ramana as another
instance of the shrink-wrap bug.
* Bug 745861 (petsc ftbfs) isolated the collection of different mpi
related problems this is hitting; really need to find an mpi expert on
this
* Bug 745863 & bug 745891 (ftbfs's) - both were compilations that
timed out; verified this was due to using lots of RAM and also using
lots of RAM on x86
(> ~500MB) - marked as invalid until the build farm grows more RAM
* Bug 757427 gconf seg fault - failed to reproduce under various
tests (although Michael has now managed to catch it in the act)
== Optimisation ==
* neon memcpy tweeking; added prefetches and unrolled the core loop
- now comparable perf to bionic memcpy in most cases (slower on
misaligned destination, faster in other cases)
* tweaked latrace to print address/length of argument strings so I
can get some stats on routine usage.
Dave
== This week ==
* Worked on a fix for https://bugs.launchpad.net/gcc-linaro/+bug/758082
Submitted the patch upstream.
* Finished first cut of vldN and vstN vectorisation. Send the patches
upstream. Most of the patches have been approved, but I'll wait for
the others before committing.
* Looked at how the vectoriser handles natty's libav. Found some nice
loops, some OK-but-could-do-better, and some really atrocious.
Wrote up the results here:
https://wiki.linaro.org/RichardSandiford/Sandbox/NeonLibAv
* Started writing micro benchmarks for each loop on that page.
I'm about half way through now (starting from the bottom).
* Started looking at whether the changes affect DENbench.
* Patch review.
* Wrote a small follow-up to the fix for LP 758082.
* Some patch pinging.
== Next week ==
* More micro benchmarks.
* More DENbench.
* Submit a merge request for the intrinsics improvements, if the
remaining patches are approved.
* Look at the poorer libav loops in more detail.
Richard
RAG:
Red:
Amber:
Green: now only 6 "core ARM emulation" patches in qemu-linaro not
yet upstreamed (still lots of omap3 patches, though)
Current Milestones:
| Planned | Estimate | Actual |
qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | |
Historical Milestones:
finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off |
first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 |
qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 |
== maintain-beagle-models ==
* some early prep for next week's qemu-linaro release
== merge-correctness-fixes ==
* patch to fix Neon UNDEFs sent upstream and committed
* patch fixing an overflow in signed VABAL.s32 upstreamed, committed
* investigated a bug report which turns out to be that if you try
to single step over an instruction which UNDEFs using qemu's gdb
stub we execute the insn at the UNDEF vector and stop after it
rather than stopping at the UNDEF vector
* some investigation of qemu mishandling of FP exception flag setting;
putting this on hold though, as it really isn't very high priority
* reviewed patches from Aurelien doing some general softfloat cleanup
== other ==
* trying to nail down proposed QEMU work for next cycle;
work-in-progress: https://wiki.linaro.org/PeterMaydell/Qemu1111
* two IRC interviews for QEMU Google Summer of Code student to
do some work on upstreaming of the Android emulator device models
* meetings: toolchain, standup, architecture Q&A, divisional update
Current qemu patch status is tracked here:
https://wiki.linaro.org/PeterMaydell/QemuPatchStatus
Absences:
Holiday: 22 Apr - 2 May
9-13 May: UDS, Budapest
(maybe) 15-16 August: QEMU/KVM strand at LinuxCon NA, Vancouver
[LinuxCon proper follows on 17-19th]
Hi, I've just pushed a merge of the current upstream patches for
resolving the CoreMark regressions.
(https://code.launchpad.net/~cltang/gcc-linaro/coremark-part1)
To give a quick benchmark of the current status, testing Linaro 4.5
before/after the merge of those two patches:
Optimization options used were just plain '-O2 -mtune=cortex-a9', tested
on one of our Pandaboards running Maverick; all numbers are
Iterations/Sec averaged from 3 runs.
r99492 r9942+patches improve %
-march=armv5te 2786.87 2848.12 2.20 %
-march=armv7-a 2474.50 2775.92 12.18 %
-march=armv7-a -mthumb 2297.86 2356.59 2.56 %
I'll have to re-test to be sure, but the numbers/improvements obtained
using upstream trunk should not be too far off, at least the ARM mode ones.
As we discussed in prior meetings, there's still one point of regression
identified that's in solving, which hopefully will finally bring the
ARMv7-A numbers above ARMv5TE.
Chung-Lin
Hello,
- Tracking down bugs exposed while testing a patch for SMS to avoid
using -fauto-inc-dec flag and preparing fixes for them.
Also, prepared a fix for PR47013.
- Continue looking into DENbench and updating
https://wiki.linaro.org/Internal/ToolChain/Benchmarks.
Thanks,
Revital
== GCC ==
Progress:
* Spent some time digging into binutils issue for Neon but still not
sure why I see the problem when this is fixed in 2.21 branch and no one
else see this.
* Fixed PR 48090 upstream.
* Some patch review.
* T2 performance meeting.
Plans when I'm back:
* Continue looking at divmodsi4 improvements.
* Continue looking at excessive VFP moves.
* Backport the fix for the initialization of cgraph into FSF 4.5 branch.
Meetings:
* 1-1s
* Linaro toolchain meeting
* T2 performance.
* Linaro@UDS meeting.
Absences:
* April 15 – 26 -> Booked.
* May 9-14 - LDS Budapest
hey
This problem with busybox:
http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=621137
seems to be a toolchain issue.
It occurs with FSF GCC 4.5.2 but not 4.6, and it doesn't occur with
Linaro GCC 4.5 but it does with Debian gcc-4.5. I'm trying to identify
the fix which Linaro applied to solve this! :-) Michael Hope told me
he remembers we fixed something similar for Qt, but he couldn't find
the patch and suggested I post here to get feedback.
I've pushed ash.i and .s at:
http://people.linaro.org/~lool/ash.i
which you can build with:
gcc -save-temps -std=gnu99 -Wall -Wshadow -Wwrite-strings -Wundef -Wstrict-prototypes -Wunused -Wunused-parameter -Wunused-function -Wunused-value -Wmissing-prototypes -Wmissing-declarations -Wdeclaration-after-statement -Wold-style-definition -fno-builtin-strlen -finline-limit=0 -fomit-frame-pointer -ffunction-sections -fdata-sections -fno-guess-branch-probability -funsigned-char -static-libgcc -falign-functions=1 -falign-jumps=1 -falign-labels=1 -falign-loops=1 -g -Os -c -o ash2.o ash.i
the interesting part is that ash.s has tryexec as not returning, when
it does return:
grep ^tryexec ash.s -A5 | grep return
this seems to be due to the combination of tryexec being static, its
parent being noreturn, and one argument of tryexec being unused.
Any idea of which Linaro patch solved this? :-)
Does it make sense to raise this to FSF GCC 4.5?
Thanks!
--
Loïc Minier
Hi there. Mounir and I have been looking at the work for next cycle.
A summary spreadsheet with notes is available here:
https://spreadsheets0.google.com/ccc?key=ty1c-H56f0GxnL1Hk9LCmRg
I'm very interested in feedback, especially on the time estimates and
extra topics we should suggest to the TSC. See the notes at the top
and feel free to add items or estimates straight into the sheet -
anyone can view and anyone at Linaro should be able to edit.
-- Michael
Hi there. I ran a build of gcc-linaro-4.5+bzr99491 on ursa1 through 4
to see if there was any difference in build machines. The following
tests had different results:
* gcc.c-torture/compile/limits-structnest.c
* gcc.dg/graphite/block-4.c
* largefile.c
* obj-c++.dg/template-5.mm
* obj-c++.dg/template-5.mm
* obj-c++.dg/template-6.mm
* obj-c++.dg/template-6.mm
* objc/execute/class-4.m
I suspect that they're all caused by running the testsuite in parallel
and the host running out of memory. limits-structnest takes around
850 MB of RAM and passes on the machine with swap (ursa1) and fails on
the others. block-4.c takes 2:35 to run and timed out on ursa1 and
passed on the others which may be due to ursa1 swapping heavily while
running a limit test in parallel. The obj-c tests show various forms
of killed, and suggest that they were killed due to another process
taking all the memory.
I'll change the machines to use the full 1 G of memory, run the test
suite in sequential mode, and see how things go. I haven't
investigated largefile.c - it's a PCH test and these fail randomly.
Regarding block-4.c, it takes 155 s to run which is too close to the
default 300 s for my taste. Should we add a dg-timeout-factor 4.0 to
it similar to block-3.c?
-- Michael
Missed sending this out earlier this week.
== GCC ==
Progress:
* Sync'd with Andrew about T2 performance stuff.
* Spent some time investigating what could be done for divmodsi4
improvements . Working through the various phases. Not done tree level
stuff for a while so my knowledge of the API is a a bit rusty.
* Some upstream bugzilla duty.
Plans:
* Continue looking at divmodsi4 improvements.
* Continue looking at excessive VFP moves.
* Look at binutils + neon issue.
* Performance kick-off meeting
Meetings:
* 1-1s
* Linaro toolchain meeting
* Andrew Stubbs meeting for 1 hour about T2 performance.
Absences:
* April 13th - Internal ARM conference. Not at desk all day.
* April 15 – 26 -> Booked.
* May 9-14 - LDS Budapest
Hi,
libunwind:
* started to look on how to resume from a given stack frame:
* other platforms use setcontext
* setcontext is not implemented on ARM (glibc)
* the *context functions have been marked obsolescent in Posix
* http://pubs.opengroup.org/onlinepubs/009695399/functions/makecontext.html
pandaboard:
* gdb doesn't find separate debug info of libraries that have been put into
a multiarch directory (#758619)
Note: I'll be out of office to attend a class till (including) Friday.
Regards
Ken
A rough agenda for today's call. I'll put this on the wiki after the call.
1. Go over what we are all doing today - roughly
Areas of investigation that we are looking at for near term.
a. divmodsi4 work.
b. Unnecessary VFP to integer register moves because of addressing
modes availability.
c. Thumb2 constants work
d. Additional areas for headroom in DENBENCH.
e. Coremark regressions fix up
f. Revisions causing major regressions in coremark
2. Find a way of replicating the benchmarking results and make sure we
get similar results to Michael and we are doing roughly the same
thing.
3. Regular bi-weekly call following the Toolchain WG meeting ? Or do
we organize another call ?