Progress:
* VIRT-65 [QEMU upstream maintainership]
+ softfreeze this week, so a lot of handling of pull requests,
reviewing various patchsets, sorting through newly reported
Coverity issues, etc etc.
thanks
-- PMM
== Progress ==
* GCC upstream validation:
- reported a few regressions / minor testcase fix
- enabled gcc-testresults for release branches, which will send even more emails
* benchmarking:
- added HAL support for the stm32 board we have in the Lab. Will start
testing once the board is actually connected to a builder
* misc:
- infra patches/reviews
== Next ==
* Holidays next two weeks, back on July 28th
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
== Progress ==
* Uploaded binaries for llvm 10.0.1 rc3 and rc4
* More work on Morello (including docs)
== Plan ==
* More Morello
* On vacation between July 20 - 31
4 day week.
[VIRT-327 # Richard's upstream QEMU work ]
Bug hunting vs aa32 ldrex/strex. I had hoped it would be relatively easy to
reproduce -- just run something from the .NET testsuite -- but even getting
that far wasn't obvious. So I put that aside; let's see if Peter's request for
an actual reproducer gets results.
Bug hunting vs aa64 gcc sync-4.c as reported by clyon. I determined that it's
not the fault of the null-pointer dereference, and that something goes wrong
somewhere in libgcc's exception unwind prior to the c++ throw. But it doesn't
fail all of the time. And worse, the problem vanishes when randomize_va_space
is disabled. So I can neither get a "good" vs "bad" trace without needless
differences nor produce a failure under gdb. I should try again with rr and
see if that works...
r~
Linaro folks - why is this buildbot sending mail when it's already red
(looks like this buildbot has been red for a while, at least 11187
seems to be red for the same reason that 11188 is red - so the people
on this blame list aren't relevant)? That adds noise to the buildbot
results & makes it harder for developers to find actionable email.
On Mon, Jul 6, 2020 at 9:30 PM <llvm.buildmaster(a)lab.llvm.org> wrote:
>
> The Buildbot has detected a new failure on builder clang-cmake-armv7-full while building llvm.
> Full details are available at:
> http://lab.llvm.org:8011/builders/clang-cmake-armv7-full/builds/11188
>
> Buildbot URL: http://lab.llvm.org:8011/
>
> Buildslave for this Build: linaro-tk1-08
>
> Build Reason: scheduler
> Build Source Stamp: [branch master] 0c6b6e28e70c06a3cb4704d2d8f90829a689e230
> Blamelist: Amara Emerson <amara(a)apple.com>,Amy Kwan <amy.kwan1(a)ibm.com>,Biplob Mishra <biplmish(a)in.ibm.com>,David Blaikie <dblaikie(a)gmail.com>,Eric Christopher <echristo(a)gmail.com>,Jordan Rupprecht <rupprecht(a)google.com>,LLVM GN Syncbot <llvmgnsyncbot(a)gmail.com>,Nico Weber <thakis(a)chromium.org>,Sanjay Patel <spatel(a)rotateright.com>,Wolfgang Pieb <wolfgang_pieb(a)playstation.sony.com>,Yuanfang Chen <yuanfang.chen(a)sony.com>
>
> BUILD FAILED: failed build stage 2
>
> sincerely,
> -The Buildbot
>
>
>
== Progress ==
* GCC upstream validation:
- reported a few regressions
- added fortran to arm-none-eabi configs
- enabled gcc-testresults for most configurations, which now sends a
lot of emails
* GCC:
- PR94743 (IRQ handler and Neon registers): patch committed.
* benchmarking:
- cleanup of hal lib to run benchmarks on stm32, the board we have in
TCWG is different from the ones we used in ST, I'll have to update the
hal settings accordingly.
* misc:
- switch tcwg_gnu job to use our gcc-compare-results script, to be
able to ignore some tests with random results (especially under qemu)
== Next ==
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Lots of work here, finally merging MTE system support.
[VIRT-349 # QEMU SVE2 Support ]
Posted v2, all 100 patches.
[VIRT-327 # Richard's upstream QEMU work ]
A fair amount of patch review.
Merged the decodetree exclusive groups feature.
r~
== This Week ==
* GCC
- GNU-659 (LTO regressing calculix): Running and analysing benchmarks
with different configs.
* LLVM
- LVM-611 (heuristic to lower calls to blx for armv6-m): Addressing
upstream suggestions.
- LLVM-612 (code-gen for imm8 args for Thumb1): Posted patch upstream,
waiting for feedback.
* Validation
- Prototype script for metric based comparison
== Next Week ==
- Continue ongoing tasks
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ respun the QEMU side of the "fix 32-bit-guest readdir of
ext4 filesystems on a 64-bit host" work to match Linus Walleij's
most recent kernel patch.
+ code review (actually emptied my queue for the first time in forever):
- patchset adding some missing devices to MPS2 boards
- another round of RTH's MTE patchset (now fully reviewed and ready to go in)
- SMMUv3.2 range-invalidation support patchset from RedHat
- RTH's implementation of the kernel MTE ABI for QEMU linux-user
+ had a look at some of the lurking Coverity issues
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ fp16 support: started by working out risu patterns for all the
affected instructions so we have a means for testing the changes.
+ implemented a handful of fp16 insns; plan to back-burner this for
a little while as it's not going to be complete before we freeze
for QEMU 5.1, so work like reviewing the MTE patchset and other
for-5.1 efforts will take priority.
NB: on holiday next week
thanks
-- PMM
VirtIO Related Work ([VIRT-366])
================================
- posted [PATCH v2 0/5] some tweaks to the document build process
Message-Id: <20200619204959.7877-1-alex.bennee(a)linaro.org>
Upstream Work ([VIRT-109])
==========================
- posted [PATCH v2] docs/devel: add some notes on tcg-icount for
developers Message-Id:
<20200619170930.11704-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [7/7]
=======================
[RFC v5 0/4] QEMU cpus.c refactoring
Message-Id: <20200615180346.3992-1-cfontana(a)suse.de>
[PATCH v1 1/2] semihosting: defer connect_chardevs a little more to use serialx
Message-Id: <1592215252-26742-1-git-send-email-frederic.konrad(a)adacore.com>
- CLOSING NOTE [2020-06-16 Tue 16:14]
A little confused as to the purpose of patch 1/2.
Added: <2020-06-15 Mon>
[PATCH 0/5] linux-user: Support extended clone(CLONE_VM)
Message-Id: <20200612014606.147691-1-jkz(a)google.com>
- CLOSING NOTE [2020-06-16 Tue 17:08]
This is super hairy stuff. Would like to know the use case for all
this additional complexity.
Added: <2020-06-12 Fri>
[PATCH v2 00/15] tests/tcg: Add TriCore tests
Message-Id: <20200604085441.103087-1-kbastian(a)mail.uni-paderborn.de>
- CLOSING NOTE [2020-06-16 Tue 18:29]
A few minor comments, v2 should be mergable.
Added: <2020-06-04 Thu>
[PATCH 0/3] Add Scripts for Finding Top 25 Executed Functions
Message-Id: <20200616231204.8850-1-ahmedkhaledkaraman(a)gmail.com>
[RFC] ivshmem v2: Shared memory device specification
Message-Id: <f109fe5a-92eb-e5a5-bb83-ada42b3a9b61(a)siemens.com>
- CLOSING NOTE [2020-06-17 Wed 16:49]
Finally got round to making some comments. All in all looks pretty
sane.
Added: <2020-05-25 Mon>
[PATCH v9 0/9] tests/vm: Add support for aarch64 VMs
Message-Id: <20200601211421.1277-1-robert.foley(a)linaro.org>
Absences
========
- Home-schooling in mornings
Current Review Queue
====================
* [RFC][PATCH v2 0/3] IVSHMEM version 2 device for QEMU
Message-Id: <cover.1578407802.git.jan.kiszka(a)siemens.com>
Added: <2020-04-09 Thu>
* [PATCH v7 00/42] target/arm: Implement ARMv8.5-MemTag, system mode
Message-Id: <20200603011317.473934-1-richard.henderson(a)linaro.org>
Added: <2020-06-18 Thu>
* [PATCH RFC 00/22] Support of Virtual CPU Hotplug for ARMv8 Arch
Message-Id: <20200613213629.21984-1-salil.mehta(a)huawei.com>
Added: <2020-06-13 Sat>
* [PATCH v8 0/4] vhost-user block device backend implementation
Message-Id: <20200604233538.256325-1-coiby.xu(a)gmail.com>
Added: <2020-06-12 Fri>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ code review:
- a fix for an A9 global timer device bug
- imx_fec ethernet bugfixes/cleanups
- SD card emulation bugfixes/cleanups (including a CVE fix)
- sm501 graphics card minor fixes
- implementation of qemu_init_exec_dir() for OSX
- patchset adding some missing devices to MPS2 boards
- RTH's v7 MemTag emulation series (this was a big one, took most of
a couple of days to work through)
+ sent docs patch deprecating our tilegx port
+ discussion about what exactly target code has to do
for icount support; wrote some patches to remove some 'gen_io_end()'
calls that turn out to be no-longer-necessary
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ completed the neon decodetree conversion and sent the last batch
of patches out for review; plan to start on fp16 support next
NB: have recorded my maintainership work under the old VIRT-65
for now; not yet clear when/which jira issue to use in the new UM-*
hierarchy.
thanks
-- PMM
* Training all week
== Progress ==
* GCC upstream validation:
- reported a few regressions
- enabled sending of some validation results to gcc-testresults mailing-list
* GCC:
- PR94743 (IRQ handler and Neon registers): No feedback yet.
* misc:
- infra fixes / troubleshooting / reviews
- cleanup of hal lib to run benchmarks on stm32
== Next ==
* PR94743
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
* FDPIC GDB
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ Good progress with the neon decodetree conversion this week -- now feels
like it's nearly done. Wrote and sent out another couple of patchsets for
review. The only remaining insns to convert are the 2-reg-misc grouping.
Have made a start on that; hope to get the final part of the conversion
out for review next week.
thanks
-- PMM
(0.5 day off)
== Progress ==
* GCC upstream validation:
- scripts updates and cleanup for cortex-m33 with qemu-system-mode
- investigated a random error with a C++ testcase under qemu-aarch64
since I upgraded to qemu-5.0.
- reported a few regressions
- fixed cross-build of GCC after C++11 upgrade, looked at fixing
native builds (different problem), but someone had already posted the
same fix during the week-end
* GCC:
- PR94743 (IRQ handler and Neon registers): No feedback yet.
* misc:
- infra fixes / troubleshooting / reviews
- looking at cortex-m benchmarking harnesses. Updated docker images to
include openocd and checked I could connect to the board from a docker
container.
- helping test Dejagnu new master branch in preparation for next stable release
== Next ==
* training next week
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Posted v7 of system mode
Posted v2 of user mode vs in-progress kernel abi.
Some bug fixing for Stephen and Szabolcs.
[VIRT-349 # QEMU SVE2 Support ]
Started reviewing Stephen's sve2 risu patches.
[VIRT-327 # Richard's upstream QEMU work ]
A fair amount of patch review
New version of decodetree exclusive groups.
Some work on clang 10 werrors.
r~
Short week (1.5 day off)
== Progress ==
* GCC upstream validation:
- scripts updates and cleanup for cortex-m33 with qemu-system-mode
- reported a few regressions
* GCC:
- PR94743 (IRQ handler and Neon registers): No feedback yet.
* misc:
- infra fixes / troubleshooting / reviews
- looking at cortex-m benchmarking harnesses, at last able to run
coremark stm32 board
== Next ==
* GCC validation
- switch to qemu-system-mode for cortex-m33, in order to run the cmse tests
* PR94743
* GCC/cortex-M testing
* cortex-m benchmarking
* FDPIC GDB
== Progress ==
* GCC upstream validation:
- scripts updates and cleanup
- new scheme for arm-eabi now in production (cortex-a7 in arm and
thumb modes, cortex-m[0347,33]
- upgraded to qemu-5.0
- reported a few regressions
* GCC:
- PR94743 (IRQ handler and Neon registers): No feedback yet.
* misc:
- infra fixes / troubleshooting / reviews
- looking at cortex-m benchmarking harnesses, at last able to run a
sample code on my small stm32 board
- internal meetings / paperwork
== Next ==
* GCC validation
- switch to qemu-system-mode for cortex-m33, in order to run the cmse tests
* PR94743
* GCC/cortex-M testing
* cortex-m benchmarking
* FDPIC GDB
[VIRT-339 # ARMv8.5-BTI, Branch Target Identification ]
Updated to match the latest kernel for-next/bti-user branch; I hope this is
going to be merged for 5.7.
Posted v9 for review.
[VIRT-349 # QEMU SVE2 Supprt ]
More RISU work to improve support for SVE. Stephen Long has posted some sve2
risu patterns that need reviewing, and I plan to test all of that next week vs
ArmIE.
I had a start on rebasing my current sve2 patch set on master, with lots of
prereqs merged. But stopped in the middle because I realized that I wanted to
get all of the RISU work done first, so that I can test each patch as it is
updated.
r~
PS: Out all next week on holiday.
Progress:
* VIRT-65 [QEMU upstream maintainership]
- Various bits of code review; put together and sent another
arm pullreq.
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Fixed up the 2-reg-shift/1-reg-imm patchset as per code review
comments and sent a v2
thanks
-- PMM
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Some prerequisites merged upstream.
[VIRT-349 # QEMU SVE2 Support ]
Some prerequisites merged upstream.
Work on risu to compress sve output files.
Split out the crypto conversion to gvec.
[VIRT-327 # Richard's upstream QEMU work ]
Posted some softfloat cleanups.
Some patch review.
Support non-overlapping regions for decodetree.
r~
VirtIO Related Work ([VIRT-366])
================================
VirtiIO blogpost ([LBO-2])
- finished final version of draft with future work and call to action
[LBO-2] <https://projects.linaro.org/browse/LBO-2>
Upstream Work ([VIRT-109])
==========================
- posted [PATCH v1 0/8] plugins/next (cleanup, cpu_index and lockstep)
Message-Id: <20200513173200.11830-1-alex.bennee(a)linaro.org>
- posted [PATCH v1 00/10] testing and tcg tweaks Message-Id:
<20200513175134.19619-1-alex.bennee(a)linaro.org>
- posted [PULL v2 00/13] testing, tcg and plugin updates Message-Id:
<20200515144405.20580-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [9/9]
=======================
[PATCH 0/4] softfloat: fix floatx80 emulation bugs
Message-Id: <alpine.DEB.2.21.2005010034560.30535(a)digraph.polyomino.org.uk>
[PATCH v2 0/4] softfloat: fix floatx80 emulation bugs
Message-Id: <alpine.DEB.2.21.2005042332380.22972(a)digraph.polyomino.org.uk>
- CLOSING NOTE [2020-05-11 Mon 08:16]
rth already pulled into his tree
Added: <2020-05-05 Tue>
[PATCH v4 00/10] tests/vm: Add support for aarch64 VMs
Message-Id: <20200312142728.12285-1-robert.foley(a)linaro.org>
- CLOSING NOTE [2020-05-11 Mon 10:22]
Generally looks ok but awaiting v11 to deal with re-base conflicts
to fully test.
Added: <2020-03-27 Fri>
[PATCH v8 00/74] per-CPU locks
Message-Id: <20200326193156.4322-1-robert.foley(a)linaro.org>
- CLOSING NOTE [2020-05-12 Tue 19:39]
A few minor comments but looking good. Ran stress testing.
Added: <2020-03-27 Fri>
[PATCH 0/3] plugins: Move declarations around and rename 'hwaddr' argument
Message-Id: <20200510171119.20827-1-f4bug(a)amsat.org>
- CLOSING NOTE [2020-05-12 Tue 19:45]
Queued to my tree
Added: <2020-05-10 Sun>
[PATCH 3/3] plugins: avoid failing plugin when CPU is inited several times
Message-Id: <CAEme+7FPF+inSJSXQPmuv8Up3Eam0N7fT03zqM-RvcvKsxjfVQ(a)mail.gmail.com>
- didn't apply but found bug in cpu_index code
[PATCH 0/5] docs/system: Document some arm board models
Message-Id: <20200507151819.28444-1-peter.maydell(a)linaro.org>
[PATCH v6 0/9] tests/vm: Add support for aarch64 VMs
Message-Id: <20200512193340.265-1-robert.foley(a)linaro.org>
- CLOSING NOTE [2020-05-15 Fri 18:31]
Ran into problems testing on my Gentoo box, sent some patches to
rf-fw
Added: <2020-05-12 Tue>
[PATCH 0/5] target/i386: fxtract, fscale fixes
Message-Id: <alpine.DEB.2.21.2005070038550.18350(a)digraph.polyomino.org.uk>
- CLOSING NOTE [2020-05-15 Fri 18:32]
Testing bit looks ok, leaving the x86 side to people that understand
it.
Added: <2020-05-15 Fri>
--
Alex Bennée
== Progress ==
* GCC upstream validation:
- reported a couple of regressions
- sent an email to discussed the preferred combinations when running
the testsuite
* GCC:
- PR94743 (IRQ handler and Neon registers): iterating. Sent updated
patch to emit a warning. Cleanup patches merged. Sent WIP patch that
saves FP regs for discussion.
* misc:
- infra fixes / troubleshooting / reviews
- looking at cortex-m benchmarking harnesses, issues with openocd
== Next ==
* GCC validation matrix updates
* PR94743
* GCC/cortex-M testing
* cortex-m benchmarking
* FDPIC GDB
Progress:
* VIRT-65 [QEMU upstream maintainership]
- Some patch review/pullreq handling. Notably, the patchset to
allow AArch64 KVM hosts to report host memory errors to guests
is now in master.
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Sent out v2 of the neon-decodetree conversion patches (covering
the 3-reg-same grouping); this is based on RTH's vector cleanup
patchset. Got this reviewed and into master.
- Sent out a conversion patchset for 2-reg-and-shift and
1-reg-and-immediate insn groups.
thanks
-- PMM
== Progress ==
* Out of office tomorrow (Friday)
* Morello - looking into some unrelated failures after a merge from upstream
* Morello - updating aadwarf spec
== Plan ==
* Out of office next Thursday and Friday
... and apologies for tomorrow's meeting.
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Updated the branch, both system and user.
There's a report of an assertion failure in system mode, but no testcase to go
with it. I need to ping for a devel branch with which to play.
[VIRT-349 # QEMU SVE2 Support ]
Some prerequisites merged upstream.
[VIRT-327 # Richard's upstream QEMU work ]
Review of risc-v risu patches.
r~
VirtIO Related Work ([VIRT-366])
================================
- virtio sync-up call see minutes Message-Id:
<87a72j64gt.fsf(a)linaro.org>
[VIRT-366] <https://projects.linaro.org/browse/VIRT-366>
VirtIO RPMB ([VIRT-371])
- continued work on my vhost-user-rpmb daemon
- vhost-user-rpmb plumbed in with QEMU and virtio-pci transport
- detected in lspci and comms established \\o/
- started experimenting with front-ends from ACRN linux port
- currently blows up on feature negotiation
- asked for clarification of divergence between ACRN and OASIS
spec Message-Id: <87sgga4daf.fsf(a)linaro.org>
[VIRT-371] <https://projects.linaro.org/browse/VIRT-371>
[vhost-user backend for rpmb]
<https://github.com/stsquad/qemu/tree/vhost-user-rpmb>
[VIRT-402] <https://projects.linaro.org/browse/VIRT-402>
VirtiIO blogpost ([LBO-2])
- still TODO new work and architectures
- bit of writers block on last couple of paragraphs
[LBO-2] <https://projects.linaro.org/browse/LBO-2>
Upstream Work ([VIRT-109])
==========================
- posted [PULL 00/14] testing and gdbstub updates Message-Id:
<20200506120529.18974-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [1/1]
=======================
[PATCH 0/4] softfloat: fix floatx80 emulation bugs
Message-Id: <alpine.DEB.2.21.2005010034560.30535(a)digraph.polyomino.org.uk>
--
Alex Bennée
(Short week, 4 days.)
Progress:
* VIRT-65 [QEMU upstream maintainership]
- Added brief documentation of some of the QEMU models of Arm
devboards, now we have a better place for this info to live
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Fixed https://bugs.launchpad.net/bugs/1877136 (we were not using
the right gdb XML feature for M-profile CPUs, which meant that
stack backtraces across an exception stack frame didn't work and
we didn't report the XPSR to gdb correctly)
- Started working through code review responses from rth to the
first lot of neon-decodetree patches
thanks
-- PMM
Short week (4 days)
== Progress ==
* GCC upstream validation:
- Added gcc-10 branch
- maybe we should agree on a common way of running the testsuite
* GCC:
- PR94743 (IRQ handler and Neon registers): iterating. Refining patch
that emits a warning (testsuite refinements...), Need to update
additional patch that actually saves the FP regs so that it takes the
D16/D32 versions into account.
* misc:
- infra fixes / troubleshooting / reviews
- looking at cortex-m benchmarking harnesses, issues with openocd
== Next ==
* GCC validation matrix updates
* PR94743
* GCC/cortex-M testing
* cortex-m benchmarking
* FDPIC GDB
Hi, Chris, and Linaro Toolchain team,
Recently I found an issue of SVE intrinsics (svld1_f64, svld1_vnum_f64)
when using gcc -O0 (gcc 10.0.1 debian nightly build, optimization level 0).
Would you please help me to reach out to people who can fix it?
svld1_f64() is a function defined in Arm intrinsics for SVE (scalable
vector extensions) [2].
Changing -O0 to -O1 makes the issue disappear.
svld1_vnum_f64() has the same problem.
To show the issue, I wrote this simple test program, see test1.c in [1]. A
full issue report and gcc version string can be found in the attached pdf
file.
[1] My test program:
https://github.com/docularxu/sve-code-test/tree/working-svld1_f64
[2] Arm SVE intrinsics: https://developer.arm.com/docs/100987/latest
Feel free to contact me if you need more details.
Best regards,
-Guodong Xu
[VIRT-349 # QEMU SVE2 Support ]
More progress on insn implementation; just about done with all of the indexed
multiply. Perhaps 10 insns remaining.
Assad mentioned on irc that he has fixed the Armie bug that prevented RISU from
running properly, so I hope to start doing some testing soon.
[VIRT-327 # Richard's upstream QEMU work ]
Reviewed Peter's decodetree conversion. Posted some extracts from my sve2
branch that may be relevant and helpful.
r~
Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review:
+ rth's v3 patchset for 'sve load/store improvements'
+ Paolo's improvements to my run-coverity-scan script
- tagged QEMU 5.0 and pushed it out of the door; put together and
sent out the first target-arm pullreq for the 5.1 cycle
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Neon decodetree progressing nicely (though it is a bigger
job than I had anticipated when I started it...) Sent out a
first part patchset that covers the v8.0-and-later extensions,
the loads-and-stores, and the 3-reg-same part of the dp insns.
NB: UK bank holiday next Friday...
thanks
-- PMM
Hi,
You are receiving this email because you are listed as the owner for at least one LLVM build slave on http://lab.llvm.org:8011/buildslaves <http://lab.llvm.org:8011/buildslaves>.
This message is a heads up concerning the upcoming upgrade of CMake discussed here: http://lists.llvm.org/pipermail/llvm-dev/2020-March/140349.html <http://lists.llvm.org/pipermail/llvm-dev/2020-March/140349.html>. As discussed on that thread, LLVM will require CMake 3.13.4 in order to build after the release branch for LLVM 11.0.0 is created. Using an older CMake will be an error.
In order to keep things running smoothly, we would greatly appreciate if you could upgrade CMake on your builder(s) to at least CMake 3.13.4 before the next release branch is created. Please reply privately to this email when you've done so -- this will allow keeping track of who has and has not upgraded.
Thank you and have a wonderful day,
Louis
Short week (4 days)
== Progress ==
* GCC upstream validation:
- reported a couple of failures/regressions
- still looking at improving MVE tests to avoid failures in several
non-supported configurations. No satisfactory solution so far (there
are always combinations of GCC configure option and validation-time
options that are incompatible and produce failures instead of
unsupported)
- maybe we should agree on a common way of running the testsuite
* GCC:
- PR94743 (IRQ handler and Neon registers): sent a patch to emit a
warning. More ambitious patches would be too intrusive for stage 4.
* FDPIC/GDB:
- no progress this week
* misc:
- infra fixes / troubleshooting / reviews
- started looking at cortex-m benchmarking harnesses
== Next ==
* FDPIC GDB
* GCC/cortex-M
* cortex-m benchmarking
== Progress ==
* Morello
- Finished capability formatting
- Got a couple cosmetic patches in review
- Also reviewing needed ptrace support
== Plan ==
* More Morello
[VIRT-349 # QEMU SVE2 Support ]
More progress on insn implementation.
More patches from Stephen Long merged.
More good review from Laurent Desnogues.
Down to perhaps 30 insns remaining, and then figuring out some miscomparisons
reported by Laurent, but not diagnosed.
[VIRT-344 # ARMv8.5-MemTag ]
Fixed an exception return bug vs PSTATE.TCO.
[VIRT-327 # Richard's upstream QEMU work ]
Posted some tcg patch sets for 5.1.
Worked on the sparc regression Alex reported vs TEMP_CONST. I've set that
aside for now; I need to come up with a new scheme to debug that one.
r~
Progress:
* VIRT-65 [QEMU upstream maintainership]
- We needed an rc4 (which I wasn't very surprised about), so more
release wrangling again.
- Noticed some bugs in how we set ID registers for the AArch64 'max' CPU;
sent patches (one of which seemed worth getting into rc4)
- There's been a long-standing problem where a linux-user QEMU running
on a 64-bit host and emulating a 32-bit guest can't deal with the
64-bit hash 'offsets' from ext4 getdents, which causes guests using
newer glibc to fail. Linus Walleij wrote a kernel patch which allows
QEMU to request that the kernel gives it hash values that will fit
into 32 bits. I wrote an RFC QEMU patch that would use this and tested
that this does indeed solve the problem. Discussion is continuing on
the kernel size about what the correct API for this is, but the
principle that the kernel should change seems to be accepted.
- A bug was raised that BKPT for arm linux-user wasn't causing SIGTRAP;
sent patches fixing that and some other issues I noticed in that
bit of the code while I was fixing it.
- code review:
+ a patch adding proper FIFO emulation to the PL011 UART model
+ rth's patchset improving codegen of neon integer-compare-vs-0 insns
+ xilinx patchset to disable unsupported FDT firmware nodes
+ patchset adding kaslr-seed properties to the virt board dtb
(mostly useful for OP-TEE)
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Progress with neon decodetree conversion. I've now completed all
the 3-reg-same insn grouping, which is a large enough amount that
I'm planning to send out a patchset with what I have so far.
Need to refactor/tidy up some bits of the code first, now I can
see what the completed conversion looks like.
thanks
-- PMM
== Progress ==
* GCC upstream validation:
- reported a couple of failures/regressions
* GCC:
- Committed a few fixes to MVE/CDE tests to avoid failures on
arm-linux-gnueabi toolchains
- Sent a few more testcases fixes
- PR94538 (pure-code/M23): Let Wilco handle it since he has more testcases
- Looked at Linaro bug #5614, and forwarded it for upstream discussion
as PR94743 (IRQ handler and Neon registers)
* FDPIC/GDB:
- rebased gdbserver patches, it still crashes at runtime. Code size
bigger than my last attempt with gdb-8.x.
- tried to link it statically, but that fails because of multiple defs
in uclibc.
* misc:
- infra fixes / troubleshooting / reviews
- lots of disruptions
== Next ==
* FDPIC GDB
* GCC/cortex-M
Looks like there might be something wrong with this buildbot? (none of the
commits seem to have changed lnt - or maybe lnt isn't monitored/blamed in
the buildbot config?)
On Tue, Apr 21, 2020 at 12:16 AM <llvm.buildmaster(a)lab.llvm.org> wrote:
> The Buildbot has detected a new failure on builder clang-cmake-armv8-lld
> while building llvm.
> Full details are available at:
> http://lab.llvm.org:8011/builders/clang-cmake-armv8-lld/builds/3875
>
> Buildbot URL: http://lab.llvm.org:8011/
>
> Buildslave for this Build: linaro-armv8-01-arm-lld
>
> Build Reason: scheduler
> Build Source Stamp: [branch master]
> c2d86e1f3044abb295796c8267c7b9057f54a067
> Blamelist: Alexander Shaposhnikov <alexshap(a)fb.com>,Chris Bieneman <
> chris.bieneman(a)me.com>,Dan Liew <dan(a)su-root.co.uk>,David Blaikie <
> dblaikie(a)gmail.com>,Johannes Doerfert <johannes(a)jdoerfert.de>,Mircea
> Trofin <mtrofin(a)google.com>,Pavel Iliin <Pavel.Iliin(a)arm.com>,Sam Kerner <
> skerner(a)chromium.org>,Shengchen Kan <shengchen.kan(a)intel.com>,Sriraman
> Tallam <tmsriram(a)google.com>
>
> BUILD FAILED: failed setup lit
>
> sincerely,
> -The Buildbot
>
>
>
>
