[VIRT-327 # Richard's upstream QEMU work ]
* Implement x86_64-linux-user vsyscall page,
which should keep Peter's pre-merge testing working.
* Another tcg queue pull without the bits that depend
on the vsyscall implementation above.
* Posted v2 of some fixes to -accel option processing.
* Posted v2 of some fixes to target/arm syn data syndrome bits.
* Wrote some test cases for a target/arm pauth sbox fix.
* Investigated a fix for memory layout of -static-pie binaries.
* Random patch review.
r~
QEMU Tooling ([VIRT-252])
=========================
Extend gdbstub for SVE ([VIRT-281])
- posted [PATCH v5 00/22] gdbstub refactor and SVE support (+check-tcg
tweaks) Message-Id: <20200114150953.27659-3-alex.bennee(a)linaro.org>
[VIRT-281] <https://projects.linaro.org/browse/VIRT-281>
Upstream Work ([VIRT-109])
==========================
- played with [for-5.0 PATCH 00/11] Support for reverse debugging with
GDB Message-Id:
<157709434917.12933.4351155074716553976.stgit@pasha-Precision-3630-Tower>
- still broken but could be build stability
- while reviewing vsyscall patches ran into qemu-x86_64, buster
/sbin/ldconfig and setup_arg_pages (a mind dump) Message-Id:
<874kwukmxr.fsf(a)linaro.org>
- posted [qemu-web PATCH] documentation: update links to readthedocs
Message-Id: <20200113103550.1133-1-alex.bennee(a)linaro.org>
- we successfully recovered the qemu project name for rtd
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [3/3]
=======================
[for-5.0 PATCH 00/11] Support for reverse debugging with GDB
Message-Id: <157709434917.12933.4351155074716553976.stgit@pasha-Precision-3630-Tower>
- CLOSING NOTE [2020-01-13 Mon 18:00]
Introduces some regressions into check-block that need to be fixed
first.
Added: <2020-01-06 Mon>
[PATCH 0/4] migration: Replace gemu_log with qemu_log
Message-Id: <20200114030138.260347-1-jkz(a)google.com>
[PATCH 0/3] linux-user: Implement x86_64 vsyscalls
Message-Id: <20200114210921.11216-4-richard.henderson(a)linaro.org>
Current Review Queue
====================
* [PATCH v2 0/7] configure: Improve PIE and other linkage
Message-Id: <20191218223441.23852-1-richard.henderson(a)linaro.org>
Added: <2020-01-06 Mon>
* {RFC PATCH v3 000/132} Proof of concept for Meson integration
Message-Id: <1576155176-2464-1-git-send-email-pbonzini(a)redhat.com>
Added: <2019-12-12 Thu>
* {PATCH 0/2} tests/acceptance: Add boot vmlinux test
Message-Id: <20191206140012.15517-1-wainersm(a)redhat.com>
Added: <2019-12-06 Fri>
* {RFC PATCH 00/10} hw/avr: Introduce the Arduino board
Message-Id: <20191128015030.27543-1-f4bug(a)amsat.org>
Added: <2019-11-28 Thu>
--
Alex Bennée
== Progress ==
* BFD Linker:
- GNU-629: non-contiguous memory support: found problems in the
testsuite when the flag is activated by default
* GCC:
- trying to find a way to add run more validation of -mpure-code on
v6m, to support a request to backport to gcc-9: need to patch newlib's
crt0.S which has some offending sequences
* GCC upstream validation:
- updated scripts to cope with the new git repo and release branches names
* misc:
- infra fixes / troubleshooting / reviews
- fixed problems with automatic bisection of gcc regressions
== Next ==
* Binutils: GNU-629: support non-contiguous memory regions in linker
* GCC-9: continue work for validation of -mpure-code on v6m
Morello
- Upstream LLD INPUT_SECTION_FLAGS that I implemented downstream.
Quite a few review comments to work through but I think I'm close to
getting something accepted. This will hopefully come in useful for LLD
with embedded systems.
- Wrote down some definitions for the new relocations.
LLD
- landed fix for clang-built-linux-812 linux allyesconfig problem.
- Quite a few upstream LLD and MC reviews
Other
Some research for the clang built linux conference.
== Progress ==
* Out of office for 2 days
* Reviewed EuroLLVM submissions
* A bit more investigation into Morello bare metal debugging
== Plan ==
* PR44157
* Morello bare metal debugging
Hello Linaro team,
I want to use your cross compiler version 6.3.1, but I miss the library
asound and its header (alsa/asoundlib.h)
What do I need to do to fix this ?
Best regards,
Markus Bollinger
Hi Ana,
I don't know anything about the POC myself, but I'm forwarding this so our
QEMU folks can answer.
Cheers,
Diana
---------- Forwarded message ---------
From: Ana Pazos <apazos(a)quicinc.com>
Date: Fri, 10 Jan 2020 at 19:08
Subject: about QEMU support for SVE2 POC
To: diana.picus(a)linaro.org <diana.picus(a)linaro.org>
Cc: Ana Pazos <apazos(a)quicinc.com>
Hello Diana,
We at Qualcomm are trying to find out the POC for QEMU support for SVE2.
We have been using QEMU with SVE support, and need to find out when SVE2
support will be added to QEMU.
I assume Linaro is involved in this task. Do you know the POC?
Thanks for the help!
Ana.
== Progress ==
* BFD Linker:
- GNU-629: non-contiguous memory support: sent updated versions with
testcases and doc.
* GCC:
- trying to find a way to add run more validation of -mpure-code on
v6m, to support a request to backport to gcc-9
- proposal to implement LLVM's -arm-assume-misaligned-load-store
rejected by the community
* GCC upstream validation:
- reported/checked a few issues
* misc:
- infra fixes / troubleshooting / reviews
- investigating problems with automatic bisection of gcc regressions
- fixed a long-standing bug in proot
== Next ==
* Binutils: GNU-629: support non-contiguous memory regions in linker
[VIRT-327 # Richard's upstream QEMU work ]
* TCG patch queue flush, including phase 1 increase for
number of mmu_idx, on which VHE is dependent.
* Random patch review.
* Capstone update.
* cputlb cleanup in prep for modeling ASIDs.
r~
Morello:
- Implemented INPUT_SECTION_FLAGS in LLD for the Morello toolchain,
now in review. Took most of spare engineering time this week. Will
attempt to upstream once committed in Morello
- Fixed pr44451 upstream, it was already fixed on Morello toolchain.
LLD:
- Made an attempt to fix the LLD linux kernel allyesconfig +
cortex-a53 erratum problem. Was not successful as kernel linker script
is just about as awkward as possible for this problem. I have a good
idea of what to try next. Will aim to fix early next week.
- Quite a few upstream reviews, some pending from last year.
Progress:
* VIRT-65 [QEMU upstream maintainership]
- caught up on the backlog of email that accumulated over the Christmas break
- investigated an intermittent failure of a test case on our BSD hosts
which had reached a failure rate that was seriously impeding the
flow of pull requests. Tracked it down to glib's g_source_ref/unref
not being thread-safe unless the GSource is attached to a GMainContext;
QEMU gets this right for its own use but a set of mock functions used
for a few testcases were not doing so, resulting in occasional races
where the GSource would get destroyed while it was still in use.
- code review:
+ Beata's "inject DABT for load/store insns KVM couldn't emulate" patch
+ a minor cubieboard cleanup patchset
+ i.MX RNGC device emulation patch
- annual review season, some time spent on that
thanks
-- PMM
== Progress ==
* Out of office until Tuesday
* LLVM 9.0.1
- Uploaded final binaries
- Still looking into PR44157 (CFI tests failing on armv7)
* Morello LLDB
- Trying to get bare metal debugging to work
* More ARM Code of Conduct courses etc
== Plan ==
* More Morello and PR44157
* Patch set cleaning up PIE/non-PIE linking
- Add new support for static pie.
* Another revision removing MMU_MODE_SUFFIX.
* Random patch review.
* Planning for Linux on ARM summit in Cambridge in February.
r~
To whom,
I’m seeing a failure on this bot:
--
Command Output (stderr):
--
/home/buildslave/buildslave/clang-cmake-armv7-quick/stage1/bin/llvm-objdump: error: '/home/buildslave/buildslave/clang-cmake-armv7-quick/llvm/llvm/test/tools/llvm-objdump/Inputs/macho-stabs-x86_64': can't find target: : error: unable to get target for 'x86_64---macho', see --version and --triple.
This is just a binary file verifier. Is it the case this bot doesn’t have a mach-o disassembler? And if so, is there a way to disable this test on this bot?
Thanks!
MDT
QEMU Tooling ([VIRT-252])
=========================
Extend gdbstub for SVE ([VIRT-281])
- posted [PATCH v4 00/21] gdbstub refactor and SVE support (+check-tcg
tweaks) Message-Id: <20191220120438.16114-1-alex.bennee(a)linaro.org>
[VIRT-281] <https://projects.linaro.org/browse/VIRT-281>
GSoC Mentoring Afermath ([VIRT-348])
- started working on re-base of [TCG code quality tracking]
- bit of a re-factor rethink required
[TCG code quality tracking]
<https://github.com/stsquad/qemu/tree/tcg/tbstats-and-perf-v10>
Upstream Work ([VIRT-109])
==========================
- posted [PULL 00/25] testing and logging updates Message-Id:
<20191219104934.866-1-alex.bennee(a)linaro.org>
- posted [PATCH v1 0/4] semihosting read console support Message-Id:
<20191218180029.6744-1-alex.bennee(a)linaro.org>
- posted [PATCH v2 0/5] semihosting read console support Message-Id:
<20191220132246.6759-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [4/4]
=======================
{PATCH} Semihost SYS_READC implementation (v6)
Message-Id: <20191104204230.12249-1-keithp(a)keithp.com>
- CLOSING NOTE [2019-12-18 Wed 19:39]
Found some issues with deadlocks, fixed and sent my own series
including this patch.
Added: <2019-12-06 Fri>
[PATCH] docker: gtester is no longer used
Message-Id: <1576632611-55032-1-git-send-email-pbonzini(a)redhat.com>
- CLOSING NOTE [2019-12-20 Fri 12:20]
Queued to my tree
Added: <2019-12-18 Wed>
{Qemu-devel} {RFC PATCH} Implement qemu_thread_yield for posix, use it in mttcg to handle EXCP_YIELD
Message-Id: <20190717054655.14104-1-npiggin(a)gmail.com>
- CLOSING NOTE [2019-12-20 Fri 13:11]
Replied.
[PATCH v2 00/28] cputlb: Remove support for MMU_MODE*_SUFFIX
Message-Id: <20191216221158.29572-1-richard.henderson(a)linaro.org>
Absences
========
- Christmas and New Year holidays
Current Review Queue
====================
* [RFC PATCH 00/13] hw/timer/allwinner: Make it reusable
Message-Id: <20191219185127.24388-1-f4bug(a)amsat.org>
Added: <2019-12-19 Thu>
* [PATCH v2 00/14] chardev: Use QEMUChrEvent enum in IOEventHandler typedef
Message-Id: <20191218172009.8868-1-philmd(a)redhat.com>
Added: <2019-12-18 Wed>
* [RFC PATCH v3 000/132] Proof of concept for Meson integration
Message-Id: <1576155176-2464-1-git-send-email-pbonzini(a)redhat.com>
Added: <2019-12-12 Thu>
* {PATCH 0/2} tests/acceptance: Add boot vmlinux test
Message-Id: <20191206140012.15517-1-wainersm(a)redhat.com>
Added: <2019-12-06 Fri>
--
Alex Bennée
Progress (covers two weeks; lost half of last week to the cold that's
been going around the office here):
* VIRT-65 [QEMU upstream maintainership]
- code review
+ RTH's ARMv8.2-UAO patchset
+ RTH's ARMv8.1-PAN patchset
+ had a look at Huawei SDEI patchset; there are some things I don't
like about the approach but I don't currently have any better ideas :-(
Sent an email to the list to see if others have any suggestions.
+ Andrew Jones' patchset to pause the virtual timer when VM is paused
+ Some smmuv3 emulation fixes from Amazon
+ Support for emulating generic timers that run at platform-dependent
frequency (rather than insisting they always run at 62.5MHz)
- release work
+ herded a handful of key bugfixes into rc5; got rc5 and
then the final release out of the door
+ got new s390 box into the set of machines we test QEMU on
(IBM want to turn off the old one at the end of the year)
+ a couple of arm pull requests now 5.0 is open for new contributions
thanks
-- PMM
== Progress ==
* LLVM 9.0.1
- Had trouble with our TK1 machine
- Trying to build rc3 on one of the buildbots
- AArch64 rc3 looks fine
* Morello
- Got lldb-server working on android and it seems to behave fine
- Working on getting the lldb test-suite to work in remote mode with the
morello android simulator
- Running into all sorts of issues with it
== Plan ==
* More of the same
* Out of office: 25-26 December, 1-7 January
One cannot use objcopy --target=efi-app-aarch64 because it appears
that PE/COFF targets are not enabled for aarch64.
Making UEFI & Windows on Snapdragon work harder.
Given that Windows 10 is fully supported on aarch64, I assume it does
have PE/COFF.
Can someone please fix bfd to provide PE targets on aarch64?
--
Regards,
Dimitri.
== Progress ==
* GCC:
- -mpure-code on v6m: committed.
- investigated potential problem with -mno-unaligned-access. It was a
wrong-user-code case, but maybe it would be desirable to implement an
option like llvm's -arm-assume-misaligned-load-store
* BFD Linker:
- GNU-629: non-contiguous memory support: Now able to detect cases
where input sections change size during the linker iterations and when
linker-created stubs would cause overflows.
* GCC upstream validation:
- reported/checked a few issues
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* Binutils: GNU-629: support non-contiguous memory regions in linker
* Holidays: Dec 23rd-Jan 2nd
There’s been an ongoing failure on the clang-cmake-armv8-selfhost
builder for the last day or so; see e.g.:
http://lab.llvm.org:8011/builders/clang-cmake-armv7-selfhost/builds/2827/
This list is recorded as the contact information for that builder.
It is apparently crashing in a tblgen backend that I just added:
```
Stack dump:
0. Program arguments:
/home/buildslave/buildslave/clang-cmake-armv7-selfhost/stage1/bin/clang-tblgen
-gen-clang-type-writer -I
/home/buildslave/buildslave/clang-cmake-armv7-selfhost/llvm/clang/include
-I
/home/buildslave/buildslave/clang-cmake-armv7-selfhost/llvm/clang/include/clang/AST
-I
/home/buildslave/buildslave/clang-cmake-armv7-selfhost/llvm/llvm/include
/home/buildslave/buildslave/clang-cmake-armv7-selfhost/llvm/clang/include/clang/AST/TypeProperties.td
--write-if-changed -o
/home/buildslave/buildslave/clang-cmake-armv7-selfhost/stage1/tools/clang/include/clang/AST/AbstractTypeWriter.inc
Segmentation fault (core dumped)
```
I would like to fix this, but I have no ability to reproduce it, and the
crash information in the log is quite minimal. Is there a way I can get
a shell on a system that can reproduce this, or at the very least get a
line number for where exactly it is crashing?
John.
The Arm GNU Toolchain for the A-profile Architecture
=====================================================
We are pleased to announce the Arm release of the pre-built GNU cross-toolchain
for the A-profile cores: GCC 9.2-2019.12.
Further information about the GNU Arm toolchain and the release packages is
available at Arm Developer site
https://developer.arm.com/open-source/gnu-toolchain/gnu-a/downloads
Features
========
* Based on GCC 9.2 (See https://gcc.gnu.org/gcc-9/changes.html for details).
Supported targets
=================
* On Windows(x86_64):
- AArch64 (bare-metal and Linux)
- AArch32 (bare-metal and Linux hard-float)
* On Linux(x86_64):
- AArch64 (bare-metal, Linux and Linux big-endian)
- AArch32 (bare-metal and Linux hard-float)
* On Linux(AArch64)
- AArch64 (bare-metal)
- AArch32 (bare-metal and Linux hard-float)
Changes since Arm release GCC 8.3-2019.03
=========================================
* Additional AArch64 hosted cross-toolchains for AArch64 (bare-metal) and
AArch32 (bare-metal and Linux hard-float)
* Additional Windows hosted cross-toolchains for AArch64 (Linux) and
AArch32 (Linux hard-float)
* Retired Linux(x86_64) toolchain for AArch64 (big-endian bare-metal) and
AArch32 (Linux soft-float)
* Changed toolchain naming convention to match standard target triplet
naming convention, with vendor name being none.
For example, arm-eabi is now arm-none-eabi.
* Fixed the Windows toolchain convention to correctly include mingw-w64
instead of mingw32
Host Requirements
==================
* x86-64 Linux: Ubuntu 16.04 LTS or later, or RHEL 7 or later
* AArch64 Linux: Ubuntu 18.04 LTS or later, or RHEL 8
* x86 Windows: Windows 10
Package Versions
=================
* GCC 9.2.1
* glibc 2.30
* binutils 2.33.1
* GDB 8.3.0
* libexpat 2.2.5
* Linux Kernel v4.20.13
* libgmp 4.3.2
* libisl 0.15
* libmpfr 3.1.6
* libmpc 1.0.3
* libiconv 1.15
Contact Arm
===========
For any questions, please use the Arm Communities forums at:
https://community.arm.com/tools/
Please report any bugs via the Linaro Bugzilla at:
https://bugs.linaro.org/
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
* One day off
o LLVM:
* Couple of failures with the bots
* Machine Outliner:
- Completed testcases
- Validation before re-submission
o Misc
* Various meetings and discussions.
[VIRT-327 # Richard's upstream QEMU work ]
Following up on the feedback from last week on VHE and PAN, posted a patch set
eliminating MMU_MODE*_SUFFIX, and the current limit of NB_MMU_IDX <= 12 that
went with that.
Some patch review.
r~
== Progress ==
* GCC:
- -mpure-code on v6m: waiting for approval, pinged again.
* BFD Linker:
- GNU-629: non-contiguous memory support: Looking at how to handle the
case where input sections change size during the linker iterations.
* GCC upstream validation:
- reported/checked a few issues
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* GCC: pure-code/v6m, handle feedback
* Binutils: GNU-629: support non-contiguous memory regions in linker
== Future ==
Holidays: Dec 23rd-Jan 2nd
Morello:
- Updated clang driver to use lld with --image-base rather than a linker script.
- LLD changes merged.
- Fixed up a few problems spotted by CI and a test on the examples.
- Thoughts on code sequences for an experimental descriptor based ABI.
LLD:
- Committed changes to fix branch patch and thunks interaction in
instrumented Chromium build
- Discussion about deploying BTI in large programs like Chromium with
pre-compiled objects and lots of assembler files.
Planned absences
On holiday for the rest of the decade. First day back in the office 6th January
QEMU Tooling ([VIRT-252])
=========================
Extend gdbstub for SVE ([VIRT-281])
- worked on [v3 rebase]
- added a new test case and discovered a bug in upstream gdbserver
- raised [GNU-647] to track it
[v3 rebase] https://github.com/stsquad/qemu/tree/sve-registers-v3
[GNU-647] https://projects.linaro.org/browse/GNU-647
QEMU ARMv8.1 VHE ([VIRT_263])
=============================
- bunch of review and testing of rth's v4 series
[VIRT_263] https://projects.linaro.org/browse/VIRT-263
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v2 0/6} linux-user mmap debug cleanup Message-Id:
<20191206110354.GA775461(a)stefanha-x1.localdomain>
Completed Reviews [8/8]
=======================
{PATCH 0/3} iotests: Check for the possibility to create large files
Message-Id: <20191202101631.10003-1-thuth(a)redhat.com>
- CLOSING NOTE [2019-12-03 Tue 10:14]
Preparatory for the multiarch Travis tests.
Added: <2019-12-02 Mon>
{PATCH v2 0/2} Run tcg tests with tci on Travis
Message-Id: <20191128153525.2646-1-thuth(a)redhat.com>
- CLOSING NOTE [2019-12-03 Tue 10:21]
will take v3 with --disable-kvm and sparc tweaks
Added: <2019-11-28 Thu>
{PATCH 0/2} flush CPU TB cache in breakpoint_invalidate
Message-Id: <20191127220602.10827-1-jcmvbkbc(a)gmail.com>
- CLOSING NOTE [2019-12-03 Tue 11:20]
Needs a slightly neater solution than always flushing everything.
Added: <2019-11-28 Thu>
{PATCH 0/1} tests/vm: Allow to set path to qemu-img
Message-Id: <20191114134246.12073-1-wainersm(a)redhat.com>
- CLOSING NOTE [2019-12-03 Tue 11:37]
Queued to my tree
Added: <2019-11-14 Thu>
{PATCH 0/4} docker: Update Travis-CI image to run acceptance tests
Message-Id: <20190818231827.27573-1-philmd(a)redhat.com>
- CLOSING NOTE [2019-12-03 Tue 16:03]
Will wait for next iteration.
{PATCH 0/4} python/qemu: New accel module and improvements
Message-Id: <20191115180829.10275-1-wainersm(a)redhat.com>
- CLOSING NOTE [2019-12-03 Tue 17:00]
All looks good. I assume will be merged with another series that
uses the new features.
Added: <2019-11-28 Thu>
{PATCH v7 0/8} Acceptance test: Add "boot_linux" acceptance test
Message-Id: <20191104151323.9883-1-crosa(a)redhat.com>
- CLOSING NOTE [2019-12-03 Tue 19:20]
Broken for me with load_module failure
Added: <2019-11-04 Mon>
{PATCH v4 00/40} target/arm: Implement ARMv8.1-VHE
Message-Id: <20191203022937.1474-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2019-12-06 Fri 18:35]
Reviewed about half the patch set, will do the remainder on v5 once
Peter's comments are addressed.
Added: <2019-12-03 Tue>
Current Review Queue
====================
* {PATCH} Semihost SYS_READC implementation (v6)
Message-Id: <20191104204230.12249-1-keithp(a)keithp.com>
Added: <2019-12-06 Fri>
* {PATCH 0/2} tests/acceptance: Add boot vmlinux test
Message-Id: <20191206140012.15517-1-wainersm(a)redhat.com>
Added: <2019-12-06 Fri>
* {RFC PATCH 00/10} hw/avr: Introduce the Arduino board
Message-Id: <20191128015030.27543-1-f4bug(a)amsat.org>
Added: <2019-11-28 Thu>
* {RFC 0/3} tests/vhost-user-fs-test: add vhost-user-fs test case
Message-Id: <20191025100152.6638-1-stefanha(a)redhat.com>
Added: <2019-10-25 Fri>
--
Alex Bennée
Morello:
- Static linking patches committed to merge branch.
- Dynamic linking patches up for review.
- Agreed definition of what LLD for stage-1 looks like.
- Discussions on what linker and ABI work is likely to be needed for stage-2.
Linaro:
Some LLD thunk/patch generation problems
https://bugs.llvm.org/show_bug.cgi?id=44071 for a gigantic build of
Chromium > 260 Mb .text section on AArch64. Diagnosed problems but
will need to fix next week.
Some support for ClangBuiltLinux with respect to some integrated
assembler compatibility with GNU as.
Buildbot duty.
Pretty quiet, attempted to reproduce some timeouts seen on the LNT
generate cmake. 3 minutes on an lightly loaded machine, exceeding 20
minutes in some cases on the heavily loaded buildbot host. Seems to
have resolved itself with the latest container update.
- Some changes to BTI for the Android team. All committed upstream.
-- Adding PT_GNU_PROPERTY support.
-- Increasing alignment of .note.gnu.property section to 8.
Holiday
- On holiday from Monday 16th to 3rd January inclusive. Back in office
January 6th.
Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review (have had a go at cutting down the backlog; down to
six patchsets in my queue...):
+ reviewed the 'clock framework API' patchset; this is
looking good, the only major question to sort out is what
the right internal representation for the clock frq/period is
+ Paolo's series to add kernel-doc support to our Sphinx
setup (which is a mashup of something I hacked together
ages ago and more recent work from him)
+ RAS memory error support for KVM guests (mostly
reviewing the easy bits and noting that others have
provided code review comments on the rest)
+ reviewed RTH's MemTag emulation series
+ reviewed the bits of RTH's VHE series that Alex hadn't got to
+ tested an arm/acpi patchset from Huawei from March
which had unfortunately fallen through the cracks.
It failed 'make check' so they'll need to fix and resubmit :-(
- release work:
+ we needed an rc4
+ and it looks like we'll need an rc5 for one last important
bugfix; I'm hoping we can do an rc and then actual release
a few days later, though
thanks
-- PMM
== Progress ==
* GCC:
- -mpure-code on v6m: waiting for approval, pinged again.
* BFD Linker:
- GNU-629: non-contiguous memory support: received some feedback.
Looking at how to handle the case where input sections change size
during the linker iterations.
* GCC upstream validation:
- reported/checked a few issues
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* GCC: pure-code/v6m, handle feedback
* Binutils: GNU-629: support non-contiguous memory regions in linker
== Progress ==
* LLVM 9.0.1
- Trying to bisect the arm failures
* Triaging check-lldb failures on AArch64 [LLVM-512]
- Finished with the unexpected failures
- There are still some unexpected passes, but Omair has agreed to
look into them
* Morello
- Managed to build android and lldb-server, currently trying to see
if I can get them to work together
hi,I started implementing GDB process record and replay with ARM CoreSight as described in the rfc published early this year. Current implementation of coresight tracing in Perf is based on the sysfs interface, by accessing /sys/bus/event_source/devices/cs_etm ... file. GDB implementation of bts and ipt is based on the syscall "sys_perf_event_open".it would be nice to use the similar mechanism for realizing similar functionalities. therefore I would like to know if linux kernel (with coresight deivers) is exposing coresight drivers through the syscall sys_perf_event_open and if this is the case how shall I configure the perf_event_attr to use it.
thanks Zied Guermazi
# Progress #
o Upstream GDB
* ARM sim build failure with -fno-common
- Sent a patch to gdb-patches. Going through rounds of reviews.
* Patch reviewing and answering community questions.
o GDB
* GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures
- Spent some more time with this in the hopes of understanding the
various failure modes. Still not clear if the kernel is doing the right
thing. It may be hard to adjust things on GDB's side, but i have a
couple patches solving some of the problems.
o Misc
* Updated personal information in the HR system.
# Plan #
o Upstream GDB
* Get approval for the fix to -fno-common build issues with ARM sim.
o GDB
* GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures
- Engage with kernel folks for better understanding of signal
delivery scheme. Polish current fixes and submit for review.
o LLVM:
* Machine Outliner:
- Disabled asm statements.
- Added Helium LD/ST instructions support
- Adding testcases
o Misc
* Various meetings and discussions.
7 working days, then Thanksgiving.
[VIRT-262 # ARMv8.1-PAN Privileged Access Never]
Finished, still need to post.
[VIRT-273 # ARMv8.2-ATS1E1, AT S1E1R and AT S1E1W instruction variants ]
Finished, still need to post.
[VIRT-276 # ARMv8.2-UAO, PSTATE override of Unprivileged Load/Store ]
Finished, still need to post.
[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
FIXED! Welsh sprint with AJB; found and fixed two bugs.
Final bug causing guest kernel crash while booting fixed
upstream by Marc Zyngier vs ptrauth.
Will do some more thorough testing during rc4 and post
once the development phase opens up again.
[VIRT-327 # Richard's upstream QEMU work ]
Review of target/hexagon skeleton.
Review of arm dcpop patch set for beata.
Fixed a couple of arm translator bug for clyon.
Some investigation into a reported hppa-linux-user bug.
While I can reproduce locally, so far I have not tracked
down anything that I can prove is a translation bug.
r~
QEMU Tooling ([VIRT-252])
=========================
Extend gdbstub for SVE ([VIRT-281])
- worked on [v2 rebase addressing comments]
- posted {PATCH v2 00/14} gdbstub refactor and SVE support Message-Id:
<20191130084602.10818-1-alex.bennee(a)linaro.org>
[VIRT-281] https://projects.linaro.org/browse/VIRT-281
[working prototype]
https://github.com/stsquad/qemu/tree/gdbstub/sve-registers
[v2 rebase addressing comments]
https://github.com/stsquad/qemu/tree/gdbstub/sve-registers-v2
QEMU ARMv8.1 VHE ([VIRT_263])
=============================
- inaugural Welsh code sprint with rth
- found some new bugs, squashed some old bugs
- together with recent upstream fixes SUCCESS!
- can now boot a guest from a VHE enabled kernel :-)
[VIRT_263] https://projects.linaro.org/browse/VIRT-263
Upstream Work ([VIRT-109])
==========================
- posted {PULL for 4.2 0/3} a few vm-test fixes Message-Id:
<20191126120339.18059-1-alex.bennee(a)linaro.org>
- there are still niggling netbsd failures
- posted {PATCH for 4.2?} .travis.yml: drop xcode9.4 from build matrix
Message-Id: <20191127132430.3681-1-alex.bennee(a)linaro.org>
- investigation into [ARM HPC compiler triggered linux-user bug]
- may be 64k page related as couldn't reproduce on Ubuntu
- posted {PATCH v1 0/5} linux-user mmap debug cleanup Message-Id:
<20191128194603.24818-1-alex.bennee(a)linaro.org>
[ARM HPC compiler triggered linux-user bug]
https://bugs.launchpad.net/qemu/+bug/1853826
Other Activities
================
- published [QEMU Summit and KVM Forum trip report]
[QEMU Summit and KVM Forum trip report]
https://collaborate.linaro.org/display/CR/20191030+QEMU+Summit+and+KVM+Foru…
Absences
========
- 2nd Dec Holiday
Current Review Queue
====================
* {PATCH 0/4} python/qemu: New accel module and improvements
Message-Id: <20191115180829.10275-1-wainersm(a)redhat.com>
Added: <2019-11-28 Thu>
* {PATCH v2 0/2} Run tcg tests with tci on Travis
Message-Id: <20191128153525.2646-1-thuth(a)redhat.com>
Added: <2019-11-28 Thu>
* {PATCH 0/2} flush CPU TB cache in breakpoint_invalidate
Message-Id: <20191127220602.10827-1-jcmvbkbc(a)gmail.com>
Added: <2019-11-28 Thu>
* {RFC PATCH 00/10} hw/avr: Introduce the Arduino board
Message-Id: <20191128015030.27543-1-f4bug(a)amsat.org>
Added: <2019-11-28 Thu>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review:
+ finally got back to the reset-refactoring patchset
and gave review on v5 of that. This is very nearly ready.
+ reviewed and got into 4.2 rc3 some patches from Marc Z
fixing some missing emulation/bugs that newer Linux
guest kernels trip over
+ rc3 out of the door; we will need an rc4, though
- more time consumed by office-move
thanks
-- PMM
[Morello]
Rebase of LLD against September CUCL update complete
- Painful due to LLD changing address layout (every test expected
value shifted), and a naming convention change.
- No functional changes needed to patch.
- Submitted static linking patches for review. Will send the dynamic
ones after all static linking has been merged.
Wrote up notes of Linaro Tech-leads Morello Q&A.
Misc:
Upstream LLD reviews
== Progress ==
* Out of office on Thursday
* LLVM 9.0.1
- Uploaded ARM & AArch64 binaries for rc1
- ARM: opened 2 bug reports (asan and cfi tests failing)
* Triaging check-lldb failures on AArch64 [LLVM-512]
- Opened a few more bug reports
- Got one nasty failure that I want to look into a bit more before
committing a patch XFAIL-ing everything so far
* Morello
- Got a VM working, built the toolchain, currently trying to build android
- Setting up all sorts of gerrit accounts and other minutiae
== Plan ==
* More of the same
Hi!
I've attempted to study the implementation of memcpy for 32-bit Arm cores in
Glibc (which is also found in arm-optimized-routines and first appeared in
Linaro's cortex-strings project), and I came across a peculiar snippet:
#ifdef USE_VFP
/* Magic dust alert! Force VFP on Cortex-A9. Experiments show
that the FP pipeline is much better at streaming loads and
stores. This is outside the critical loop. */
vmov.f32 s0, s0
#endif
This seems to imply that this NOP-like instruction affects CPU state and makes
the vldr/vstr instructions that follow use different datapaths that they might
otherwise? Can anyone shed more light on this, please?
I was able to trace history of this code back to revision 100 in cortex-strings
repository, where it appeared as part of a large rewrite by Will Newton:
https://bazaar.launchpad.net/~linaro-toolchain-dev/cortex-strings/trunk/rev…
The entire memcpy.S file in Arm optimized-routines repo can be found here:
https://github.com/ARM-software/optimized-routines/blob/master/string/arm/m…
Thanks!
Alexander
Hi Arnd,
I took a look on the stack usage issue in the kernel snippet you provided [1],
and as you have noted the most impact indeed come from -ftree-ch optimization.
It is enabled in all optimization levels besides -Os (since besides possible
increasing the stack usage it also might increase code side).
I am still fulling grasping what free-ch optimization does, but my understanding
so far is it tries to reorganize the loop for later loop optimization phases.
More specifically, what it ends up doing on the specific snippet is create extra
stack variables for the internal membber access in the inner loop (which in its
turns increase stack usage).
This is also why adding the compiler barrier inhibits the optimization, since it
prevents the ftree-ch to optimize the internal loop reorganization and it is
passed as is to later optimizations phases.
It is also a generic pass that affects all architecture, albeit the resulting
stack will depend on later passes. With GCC 9.2.1 I see the resulting stack
usage using -fstack-usage along with -O2:
arm 632
aarch64 448
powerpc 912
powerpc64le 560
s390 600
s390x 632
i386 1376
x86_64 784
Also, -fconserve-stack does not really help with this pass since ftree-ch does
not check the flag usage. The fconserve-stack currently only seems to effect
the inliner by setting both large-stack-frame and large-stack-frame-growth to
some conservative values.
The straightforward change I am checking is just to disable tree-ch optimization
if fconserve-stack is also enabled:
diff --git a/gcc/tree-ssa-loop-ch.c b/gcc/tree-ssa-loop-ch.c
index b894a7e0918..b14dd66257c 100644
--- a/gcc/tree-ssa-loop-ch.c
+++ b/gcc/tree-ssa-loop-ch.c
@@ -291,7 +291,8 @@ public:
{}
/* opt_pass methods: */
- virtual bool gate (function *) { return flag_tree_ch != 0; }
+ virtual bool gate (function *) { return flag_tree_ch != 0
+ && flag_conserve_stack == 0; }
/* Initialize and finalize loop structures, copying headers inbetween. */
virtual unsigned int execute (function *);
On powerpc64le with gcc master:
$ /home/azanella/gcc/gcc-git-build/gcc/xgcc -B /home/azanella/gcc/gcc-git-build/gcc -O2 ../stack_usage.c -c -fstack-usage && cat stack_usage.su
../stack_usage.c:157:6:mlx5e_grp_sw_update_stats 496 static
$ /home/azanella/gcc/gcc-git-build/gcc/xgcc -B /home/azanella/gcc/gcc-git-build/gcc -O2 ../stack_usage.c -c -fstack-usage -fconserve-stack && cat stack_usage.su
../stack_usage.c:157:6:mlx5e_grp_sw_update_stats 176 static
The reference for minimal stack usage is with -Os:
$ /home/azanella/gcc/gcc-git-build/gcc/xgcc -B /home/azanella/gcc/gcc-git-build/gcc -Os ../stack_usage.c -c -fstack-usage && cat stack_usage.su
../stack_usage.c:157:6:mlx5e_grp_sw_update_stats 32 static
I will try to check if also enable the same test for -fgcse and -free-ter
do make sense.
[1] https://godbolt.org/z/WKa-Bd
# Progress #
o Upstream GDB
* Make remote packet length in debugging output adjustable (as
opposed to fix to 512 bytes).
* Investigated ARM sim build issues with the GCC default moving to
-fno-common.
o GDB:
* GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures
- No progress yet. Waiting for Kernel feedback.
* [RESOLVED] GNU-645 - gdbserver is not using SVE register
descriptions properly
- Pushed a fix upstream.
* GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop
- On hold for now.
o Friday off
# Plan #
o Upstream GDB
* Fox -fno-common build issues with ARM sim.
o GDB
* GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures
- Continue working on a fix.
== This Week ==
* GCC
- PR92554: Spent some time triaging the issue, but gave up after
Richard posted better fix.
- PR89007: Addressing upstream suggestions.
- PR92608: Committed fix to trunk.
- GNU-583: Looking thru Kugan's patch and upstream discussion.
* Validation
- Submitted patch to add --gcc_patch_file option to abe.
- Submitted patch to remove --interactive from abe.
== Next Week ==
- Continue ongoing tasks