- linaro-toolchain - lists.linaro.org

[ANNOUNCE] Linaro Binary Toolchain Release GCC 7.5-2019.12

by Maxim Kuvyrkov

The Linaro Binary Toolchain ============================ The Linaro GCC 7.5-2019.12 Release is now available. *Notice*: GCC 7.1 ABI change for arm*-*-* targets, and note for aarch64*-*-* targets From GCC 7.1 release notes: On ARM targets (arm*-*-*), a bug introduced in GCC 5 that affects conformance to the procedure call standard (AAPCS) has been fixed. The bug affects some C++ code where class objects are passed by value to functions and could result in incorrect or inconsistent code being generated. This is an ABI change. If the option -Wpsabi is enabled (on by default) the compiler will emit a diagnostic note for code that might be affected. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728 GCC 5 and GCC 6 releases will continue to be affected by the ABI bug, since changing ABI in these releases is not practical. A warning enabled by -Wpsabi option was added to GCC 5 and GCC 6 toolchains to diagnose codebases that might be affected by the ABI bug. Additionally, this same bug was present in AArch64 backend in development versions of GCC 7. There was no releases of GCC with this bug present in AArch64 backend, therefore the release notes does not mention this. However, be advised that any code bases built with development versions of GCC 7 need to be recompiled with released version of GCC 7 to conform to ABI. For an explanation of GCC 7 series changes please see the following website: https://gcc.gnu.org/gcc-7/changes.html For help in porting to GCC 7 please see the following explanation: https://gcc.gnu.org/gcc-7/porting_to.html Download release packages from: (sources) http://releases.linaro.org/components/toolchain/gcc-linaro/7.5-2019.12/ (binaries) http://releases.linaro.org/components/toolchain/binaries/7.5-2019.12/ Previous snapshots and release-candidates are at: http://snapshots.linaro.org/components/toolchain/binaries/ Previous releases are at: http://releases.linaro.org/components/toolchain/binaries/ A description of the arm and AArch64 target triples can be found at: https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl… Host Requirements ================== Linaro officially supports the current and previous Ubuntu LTS releases (as of the time of this release). This does not mean that the toolchain will not work on other/older Linux distributions. See the following for the life-time of Ubuntu LTS releases. https://wiki.ubuntu.com/Releases The host system upon which the cross-compiler will run requires a minimum of glibc 2.14, because of API changes to glibc's memcpy API. https://bugs.linaro.org/show_bug.cgi?id=1869 Package Versions ================= Linaro GCC 7.5-2019.12 http://releases.linaro.org/components/toolchain/gcc-linaro/7.5-2019.12/ FSF glibc 2.25 (release/2.25) https://lists.gnu.org/archive/html/info-gnu/2017-02/msg00002.html Newlib 2.5 (newlib-2_5_0 tag) https://sourceware.org/ml/newlib/2016/msg01191.html GNU Binutils 2.28 (users/linaro/binutils-2_28-branch) https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin… FSF GDB 8.3 (gdb-8.3-branch) https://lists.gnu.org/archive/html/info-gnu/2019-05/msg00007.html Linaro toolchain package git branches are hosted at: http://git.linaro.org/toolchain NEWS for GCC 7 (as of Linaro GCC 7.5-2019.12) ============================================== * Runtest and gdbserver are no longer installed in the toolchain bin/ directory. Binary releases no longer include runtest at all, and gdbserver is a target tool; it is now shipped in the sysroot under usr/bin/. LDTS case #2211: gdbserver and runtest in GCC binary release are in the wrong place or have the wrong name * Gdbserver is no longer linked statically, because this is currently unsupported. Linaro bugzilla #3344: gdbserver broken in Linaro 2017.02 https://bugs.linaro.org/show_bug.cgi?id=3344 * The Linaro GCC 7.4-2019.01 snapshot added a fix for Linaro bug 4007: "Internal compiler error with -mcpu=thunderx2t99". * The Linaro GCC 7.2-2017.09 snapshot added float and integer moves improvement for AArch64 targets. * The Linaro GCC 7.1-2017.07 snapshot added prefetching configuration improvement for AArch64 targets and laid groundwork to enabling prefetching in more cases. * Previous MinGW hosted version of Linaro GCC C preprocessor failed to convert character set used for string, character constants, etc. This is fixed in this release. Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8. https://bugs.linaro.org/show_bug.cgi?id=3040 * Performance related backports from the following snapshots have been included: Linaro GCC 7.1-2017.05, Linaro GCC 7.1-2017.06, Linaro GCC 7.1-2017.07, Linaro GCC 7.2-2017.08, Linaro GCC 7.2-2017.09, Linaro GCC 7.2-2017.10, Linaro GCC 7.2-2018.04, Linaro GCC 7.4-2019.01 and Linaro GCC 7.5-2019.11. See the following Linaro GCC snapshots: http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.06/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.07/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.2-2017.08/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.2-2017.09/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.2-2017.10/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.2-2018.04/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.4-2019.01/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.5-2019.11/ Contact Linaro =============== File bugs at http://bugs.linaro.org For Linaro member support see http://support.linaro.org For Linaro community support email linaro-toolchain(a)lists.linaro.org -- Maxim Kuvyrkov https://www.linaro.org

6 years

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[ANNOUNCE] Linaro Binary Toolchain Release-Candidate GCC 7.5-2019.12-rc1

by Maxim Kuvyrkov

The Linaro Binary Toolchain ============================ The Linaro GCC 7.5-2019.12-rc1 Release-Candidate is now available. *Notice*: GCC 7.1 ABI change for arm*-*-* targets, and note for aarch64*-*-* targets From GCC 7.1 release notes: On ARM targets (arm*-*-*), a bug introduced in GCC 5 that affects conformance to the procedure call standard (AAPCS) has been fixed. The bug affects some C++ code where class objects are passed by value to functions and could result in incorrect or inconsistent code being generated. This is an ABI change. If the option -Wpsabi is enabled (on by default) the compiler will emit a diagnostic note for code that might be affected. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728 GCC 5 and GCC 6 releases will continue to be affected by the ABI bug, since changing ABI in these releases is not practical. A warning enabled by -Wpsabi option was added to GCC 5 and GCC 6 toolchains to diagnose codebases that might be affected by the ABI bug. Additionally, this same bug was present in AArch64 backend in development versions of GCC 7. There was no releases of GCC with this bug present in AArch64 backend, therefore the release notes does not mention this. However, be advised that any code bases built with development versions of GCC 7 need to be recompiled with released version of GCC 7 to conform to ABI. For an explanation of GCC 7 series changes please see the following website: https://gcc.gnu.org/gcc-7/changes.html For help in porting to GCC 7 please see the following explanation: https://gcc.gnu.org/gcc-7/porting_to.html Download release-candidate packages from: (sources) http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.5-2019.12-rc1/ (binaries) http://snapshots.linaro.org/components/toolchain/binaries/7.5-2019.12-rc1/ Previous snapshots and release-candidates are at: http://snapshots.linaro.org/components/toolchain/binaries/ Previous releases are at: http://releases.linaro.org/components/toolchain/binaries/ A description of the arm and AArch64 target triples can be found at: https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl… Host Requirements ================== Linaro officially supports the current and previous Ubuntu LTS releases (as of the time of this release). This does not mean that the toolchain will not work on other/older Linux distributions. See the following for the life-time of Ubuntu LTS releases. https://wiki.ubuntu.com/Releases The host system upon which the cross-compiler will run requires a minimum of glibc 2.14, because of API changes to glibc's memcpy API. https://bugs.linaro.org/show_bug.cgi?id=1869 Package Versions ================= Linaro GCC 7.5-2019.12-rc1 http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.5-2019.12-rc1/ FSF glibc 2.25 (release/2.25) https://lists.gnu.org/archive/html/info-gnu/2017-02/msg00002.html Newlib 2.5 (newlib-2_5_0 tag) https://sourceware.org/ml/newlib/2016/msg01191.html GNU Binutils 2.28 (users/linaro/binutils-2_28-branch) https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin… FSF GDB 8.3 (gdb-8.3-branch) https://lists.gnu.org/archive/html/info-gnu/2019-05/msg00007.html Linaro toolchain package git branches are hosted at: http://git.linaro.org/toolchain NEWS for GCC 7 (as of Linaro GCC 7.5-2019.12-rc1) ================================================== * Runtest and gdbserver are no longer installed in the toolchain bin/ directory. Binary releases no longer include runtest at all, and gdbserver is a target tool; it is now shipped in the sysroot under usr/bin/. LDTS case #2211: gdbserver and runtest in GCC binary release are in the wrong place or have the wrong name * Gdbserver is no longer linked statically, because this is currently unsupported. Linaro bugzilla #3344: gdbserver broken in Linaro 2017.02 https://bugs.linaro.org/show_bug.cgi?id=3344 * The Linaro GCC 7.4-2019.01 snapshot added a fix for Linaro bug 4007: "Internal compiler error with -mcpu=thunderx2t99". * The Linaro GCC 7.2-2017.09 snapshot added float and integer moves improvement for AArch64 targets. * The Linaro GCC 7.1-2017.07 snapshot added prefetching configuration improvement for AArch64 targets and laid groundwork to enabling prefetching in more cases. * Previous MinGW hosted version of Linaro GCC C preprocessor failed to convert character set used for string, character constants, etc. This is fixed in this release. Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8. https://bugs.linaro.org/show_bug.cgi?id=3040 * Performance related backports from the following snapshots have been included: Linaro GCC 7.1-2017.05, Linaro GCC 7.1-2017.06, Linaro GCC 7.1-2017.07, Linaro GCC 7.2-2017.08, Linaro GCC 7.2-2017.09, Linaro GCC 7.2-2017.10, Linaro GCC 7.2-2018.04, Linaro GCC 7.4-2019.01 and Linaro GCC 7.5-2019.11. See the following Linaro GCC snapshots: http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.06/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.07/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.2-2017.08/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.2-2017.09/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.2-2017.10/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.2-2018.04/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.4-2019.01/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.5-2019.11/ Contact Linaro =============== File bugs at http://bugs.linaro.org For Linaro member support see http://support.linaro.org For Linaro community support email linaro-toolchain(a)lists.linaro.org -- Maxim Kuvyrkov https://www.linaro.org

6 years

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[Activity] Nov 25th ~ Nov 29nd 2019

by Luis Machado

# Progress # o Upstream GDB * ARM sim build failure with -fno-common - Sent a patch to gdb-patches. Going through rounds of reviews. * Patch reviewing and answering community questions. o GDB * GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures - Spent some more time with this in the hopes of understanding the various failure modes. Still not clear if the kernel is doing the right thing. It may be hard to adjust things on GDB's side, but i have a couple patches solving some of the problems. o Misc * Updated personal information in the HR system. # Plan # o Upstream GDB * Get approval for the fix to -fno-common build issues with ARM sim. o GDB * GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures - Engage with kernel folks for better understanding of signal delivery scheme. Polish current fixes and submit for review.

6 years

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[ACTIVITY] Week 48

by Yvan Roux

o LLVM: * Machine Outliner: - Disabled asm statements. - Added Helium LD/ST instructions support - Adding testcases o Misc * Various meetings and discussions.

6 years

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[ACTIVITY] 2 weeks ending 1 Dec 2019

by Richard Henderson

7 working days, then Thanksgiving. [VIRT-262 # ARMv8.1-PAN Privileged Access Never] Finished, still need to post. [VIRT-273 # ARMv8.2-ATS1E1, AT S1E1R and AT S1E1W instruction variants ] Finished, still need to post. [VIRT-276 # ARMv8.2-UAO, PSTATE override of Unprivileged Load/Store ] Finished, still need to post. [VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ] FIXED! Welsh sprint with AJB; found and fixed two bugs. Final bug causing guest kernel crash while booting fixed upstream by Marc Zyngier vs ptrauth. Will do some more thorough testing during rc4 and post once the development phase opens up again. [VIRT-327 # Richard's upstream QEMU work ] Review of target/hexagon skeleton. Review of arm dcpop patch set for beata. Fixed a couple of arm translator bug for clyon. Some investigation into a reported hppa-linux-user bug. While I can reproduce locally, so far I have not tracked down anything that I can prove is a translation bug. r~

6 years

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[ACTIVITY] week ending Dec. 1 2019

by Alex Bennée

QEMU Tooling ([VIRT-252]) ========================= Extend gdbstub for SVE ([VIRT-281]) - worked on [v2 rebase addressing comments] - posted {PATCH v2 00/14} gdbstub refactor and SVE support Message-Id: <20191130084602.10818-1-alex.bennee(a)linaro.org> [VIRT-281] https://projects.linaro.org/browse/VIRT-281 [working prototype] https://github.com/stsquad/qemu/tree/gdbstub/sve-registers [v2 rebase addressing comments] https://github.com/stsquad/qemu/tree/gdbstub/sve-registers-v2 QEMU ARMv8.1 VHE ([VIRT_263]) ============================= - inaugural Welsh code sprint with rth - found some new bugs, squashed some old bugs - together with recent upstream fixes SUCCESS! - can now boot a guest from a VHE enabled kernel :-) [VIRT_263] https://projects.linaro.org/browse/VIRT-263 Upstream Work ([VIRT-109]) ========================== - posted {PULL for 4.2 0/3} a few vm-test fixes Message-Id: <20191126120339.18059-1-alex.bennee(a)linaro.org> - there are still niggling netbsd failures - posted {PATCH for 4.2?} .travis.yml: drop xcode9.4 from build matrix Message-Id: <20191127132430.3681-1-alex.bennee(a)linaro.org> - investigation into [ARM HPC compiler triggered linux-user bug] - may be 64k page related as couldn't reproduce on Ubuntu - posted {PATCH v1 0/5} linux-user mmap debug cleanup Message-Id: <20191128194603.24818-1-alex.bennee(a)linaro.org> [ARM HPC compiler triggered linux-user bug] https://bugs.launchpad.net/qemu/+bug/1853826 Other Activities ================ - published [QEMU Summit and KVM Forum trip report] [QEMU Summit and KVM Forum trip report] https://collaborate.linaro.org/display/CR/20191030+QEMU+Summit+and+KVM+Foru… Absences ======== - 2nd Dec Holiday Current Review Queue ==================== * {PATCH 0/4} python/qemu: New accel module and improvements Message-Id: <20191115180829.10275-1-wainersm(a)redhat.com> Added: <2019-11-28 Thu> * {PATCH v2 0/2} Run tcg tests with tci on Travis Message-Id: <20191128153525.2646-1-thuth(a)redhat.com> Added: <2019-11-28 Thu> * {PATCH 0/2} flush CPU TB cache in breakpoint_invalidate Message-Id: <20191127220602.10827-1-jcmvbkbc(a)gmail.com> Added: <2019-11-28 Thu> * {RFC PATCH 00/10} hw/avr: Introduce the Arduino board Message-Id: <20191128015030.27543-1-f4bug(a)amsat.org> Added: <2019-11-28 Thu> -- Alex Bennée

6 years

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[weekly][dsg-models][linaro] report week ending 29 Nov

by Peter Maydell

Progress: * VIRT-65 [QEMU upstream maintainership] - code review: + finally got back to the reset-refactoring patchset and gave review on v5 of that. This is very nearly ready. + reviewed and got into 4.2 rc3 some patches from Marc Z fixing some missing emulation/bugs that newer Linux guest kernels trip over + rc3 out of the door; we will need an rc4, though - more time consumed by office-move thanks -- PMM

6 years

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[ACTIVITY] Week ending 29th November 2019

by Peter Smith

[Morello] Rebase of LLD against September CUCL update complete - Painful due to LLD changing address layout (every test expected value shifted), and a naming convention change. - No functional changes needed to patch. - Submitted static linking patches for review. Will send the dynamic ones after all static linking has been merged. Wrote up notes of Linaro Tech-leads Morello Q&A. Misc: Upstream LLD reviews

6 years

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[ACTIVITY] 25-29 Nov 2019

by Christophe Lyon

== Progress == * GCC: - -mpure-code on v6m: waiting for approval, pinged again. * BFD Linker: - GNU-629: non-contiguous memory support: RFC patch sent. * GCC upstream validation: - only a minor testcase issue to fix this week * misc: - infra fixes / troubleshooting / reviews == Next == * GCC: pure-code/v6m, handle feedback * Binutils: GNU-629: support non-contiguous memory regions in linker

6 years

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[ACTIVITY] 25 - 29 November 2019

by Diana Picus

== Progress == * Out of office on Thursday * LLVM 9.0.1 - Uploaded ARM & AArch64 binaries for rc1 - ARM: opened 2 bug reports (asan and cfi tests failing) * Triaging check-lldb failures on AArch64 [LLVM-512] - Opened a few more bug reports - Got one nasty failure that I want to look into a bit more before committing a patch XFAIL-ing everything so far * Morello - Got a VM working, built the toolchain, currently trying to build android - Setting up all sorts of gerrit accounts and other minutiae == Plan == * More of the same

6 years

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Help understanding "VFP magic dust" in cortex-strings memcpy

by Alexander Monakov

Hi! I've attempted to study the implementation of memcpy for 32-bit Arm cores in Glibc (which is also found in arm-optimized-routines and first appeared in Linaro's cortex-strings project), and I came across a peculiar snippet: #ifdef USE_VFP /* Magic dust alert! Force VFP on Cortex-A9. Experiments show that the FP pipeline is much better at streaming loads and stores. This is outside the critical loop. */ vmov.f32 s0, s0 #endif This seems to imply that this NOP-like instruction affects CPU state and makes the vldr/vstr instructions that follow use different datapaths that they might otherwise? Can anyone shed more light on this, please? I was able to trace history of this code back to revision 100 in cortex-strings repository, where it appeared as part of a large rewrite by Will Newton: https://bazaar.launchpad.net/~linaro-toolchain-dev/cortex-strings/trunk/rev… The entire memcpy.S file in Arm optimized-routines repo can be found here: https://github.com/ARM-software/optimized-routines/blob/master/string/arm/m… Thanks! Alexander

6 years

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High stack usage due ftree-ch

by Adhemerval Zanella

Hi Arnd, I took a look on the stack usage issue in the kernel snippet you provided [1], and as you have noted the most impact indeed come from -ftree-ch optimization. It is enabled in all optimization levels besides -Os (since besides possible increasing the stack usage it also might increase code side). I am still fulling grasping what free-ch optimization does, but my understanding so far is it tries to reorganize the loop for later loop optimization phases. More specifically, what it ends up doing on the specific snippet is create extra stack variables for the internal membber access in the inner loop (which in its turns increase stack usage). This is also why adding the compiler barrier inhibits the optimization, since it prevents the ftree-ch to optimize the internal loop reorganization and it is passed as is to later optimizations phases. It is also a generic pass that affects all architecture, albeit the resulting stack will depend on later passes. With GCC 9.2.1 I see the resulting stack usage using -fstack-usage along with -O2: arm 632 aarch64 448 powerpc 912 powerpc64le 560 s390 600 s390x 632 i386 1376 x86_64 784 Also, -fconserve-stack does not really help with this pass since ftree-ch does not check the flag usage. The fconserve-stack currently only seems to effect the inliner by setting both large-stack-frame and large-stack-frame-growth to some conservative values. The straightforward change I am checking is just to disable tree-ch optimization if fconserve-stack is also enabled: diff --git a/gcc/tree-ssa-loop-ch.c b/gcc/tree-ssa-loop-ch.c index b894a7e0918..b14dd66257c 100644 --- a/gcc/tree-ssa-loop-ch.c +++ b/gcc/tree-ssa-loop-ch.c @@ -291,7 +291,8 @@ public: {} /* opt_pass methods: */ - virtual bool gate (function *) { return flag_tree_ch != 0; } + virtual bool gate (function *) { return flag_tree_ch != 0 + && flag_conserve_stack == 0; } /* Initialize and finalize loop structures, copying headers inbetween. */ virtual unsigned int execute (function *); On powerpc64le with gcc master: $ /home/azanella/gcc/gcc-git-build/gcc/xgcc -B /home/azanella/gcc/gcc-git-build/gcc -O2 ../stack_usage.c -c -fstack-usage && cat stack_usage.su ../stack_usage.c:157:6:mlx5e_grp_sw_update_stats 496 static $ /home/azanella/gcc/gcc-git-build/gcc/xgcc -B /home/azanella/gcc/gcc-git-build/gcc -O2 ../stack_usage.c -c -fstack-usage -fconserve-stack && cat stack_usage.su ../stack_usage.c:157:6:mlx5e_grp_sw_update_stats 176 static The reference for minimal stack usage is with -Os: $ /home/azanella/gcc/gcc-git-build/gcc/xgcc -B /home/azanella/gcc/gcc-git-build/gcc -Os ../stack_usage.c -c -fstack-usage && cat stack_usage.su ../stack_usage.c:157:6:mlx5e_grp_sw_update_stats 32 static I will try to check if also enable the same test for -fgcse and -free-ter do make sense. [1] https://godbolt.org/z/WKa-Bd

6 years

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[Activity] Nov 18th ~ Nov 22nd 2019

by Luis Machado

# Progress # o Upstream GDB * Make remote packet length in debugging output adjustable (as opposed to fix to 512 bytes). * Investigated ARM sim build issues with the GCC default moving to -fno-common. o GDB: * GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures - No progress yet. Waiting for Kernel feedback. * [RESOLVED] GNU-645 - gdbserver is not using SVE register descriptions properly - Pushed a fix upstream. * GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop - On hold for now. o Friday off # Plan # o Upstream GDB * Fox -fno-common build issues with ARM sim. o GDB * GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures - Continue working on a fix.

6 years

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[ACTIVITY] 18 - 22 Nov 2019

by Prathamesh Kulkarni

== This Week == * GCC - PR92554: Spent some time triaging the issue, but gave up after Richard posted better fix. - PR89007: Addressing upstream suggestions. - PR92608: Committed fix to trunk. - GNU-583: Looking thru Kugan's patch and upstream discussion. * Validation - Submitted patch to add --gcc_patch_file option to abe. - Submitted patch to remove --interactive from abe. == Next Week == - Continue ongoing tasks

6 years

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[ACTIVITY] 18-22 Nov 2019

by Christophe Lyon

== Progress == * GCC: - -mpure-code on v6m: sent an updated patch, waiting for approval. * BFD Linker: - non-contiguous memory support: partial prototype working on the use-case, but causes regressions. * GCC upstream validation: - reported several issues * misc: - infra fixes / troubleshooting / reviews == Next == * GCC: pure-code/v6m, handle feedback * Binutils: support non-contiguous memory regions in linker

6 years

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[ACTIVITY] week ending Nov. 24 2019

by Alex Bennée

QEMU Tooling ([VIRT-252]) ========================= Extend gdbstub for SVE ([VIRT-281]) - worked on [v2 rebase addressing comments] [VIRT-281] https://projects.linaro.org/browse/VIRT-281 [v2 rebase addressing comments] https://github.com/stsquad/qemu/tree/gdbstub/sve-registers-v2 Upstream Work ([VIRT-109]) ========================== - general poking around and stress testing on the run up to release - documented some outstanding issues [on the planning page] - posted {PULL for rc3 0/5} a few doc and testing tweaks Message-Id: <20191120105801.2735-1-alex.bennee(a)linaro.org> - posted {PATCH for 4.2 v1 0/3} some tests/vm fixes Message-Id: <20191122112231.18431-1-alex.bennee(a)linaro.org> [VIRT-109] https://projects.linaro.org/browse/VIRT-109 [on the planning page] https://wiki.qemu.org/Planning/4.2 Other Activities ================ - finalising [draft of KVM Forum conference report] - will publish on Monday once Beata adds the last note [draft of KVM Forum conference report] https://collaborate.linaro.org/pages/resumedraft.action?draftId=128647720 Completed Reviews [3/3] ======================= {PATCH v2 0/6} Make the qemu_logfile handle thread safe. Message-Id: <20191115131040.2834-1-robert.foley(a)linaro.org> - CLOSING NOTE [2019-11-22 Fri 17:15] Ad of v3 this is ready to go, just awaiting the tree to open again Added: <2019-11-15 Fri> {PATCH v3 0/6} Make the qemu_logfile handle thread safe. Message-Id: <20191118211528.3221-1-robert.foley(a)linaro.org> {PATCH 0/6} Enable Travis builds on arm64, ppc64le and s390x Message-Id: <20191119170822.45649-1-thuth(a)redhat.com> Current Review Queue ==================== * {PATCH 0/1} tests/vm: Allow to set path to qemu-img Message-Id: <20191114134246.12073-1-wainersm(a)redhat.com> Added: <2019-11-14 Thu> * {PATCH v7 0/8} Acceptance test: Add "boot_linux" acceptance test Message-Id: <20191104151323.9883-1-crosa(a)redhat.com> Added: <2019-11-04 Mon> * {RFC 0/3} tests/vhost-user-fs-test: add vhost-user-fs test case Message-Id: <20191025100152.6638-1-stefanha(a)redhat.com> Added: <2019-10-25 Fri> * {PATCH v5 00/22} target/arm: Implement ARMv8.5-MemTag, system mode Message-Id: <20191011134744.2477-1-richard.henderson(a)linaro.org> Added: <2019-10-11 Fri> -- Alex Bennée

6 years

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[ACTIVITY] Week ending 22nd November

by Peter Smith

[Morello] - LLD finished pre-review refactoring and splitting up into reviewable chunks - Implemented range-extension and interworking thunks to test interaction with aligning .text to comply with Cheri Concentrate - Answered some questions from Linaro tech-leads about Morello Plans - Rebase once CUCL merge has been completed and submit for review. Planned Absences: Christmas Holiday 16th December - 3rd January inclusive

6 years

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[ACTIVITY] report week ending 22 Nov

by Peter Maydell

Progress: * VIRT-65 [QEMU upstream maintainership] - code review: + Marc-Andre's series trying to get rid of QOM pointer properties + various minor bits for rc2 - unsuccessfully tried to work out why one of QEMU's test cases asserts on BSD hosts only - some time consumed by office-move thanks -- PMM

6 years

1
0
0 0

[ACTIVITY] 18 - 22 Nov 2019

by Diana Picus

== Progress == * Triaging check-lldb failures on AArch64 [LLVM-512] - Opened 4 bug reports - One of them got a lot of attention so I was asked to upload more logs/try various things - Still have a couple of test failures to look into * Morello - First contact with the team - Started looking at the internal docs - Trying to build the existing toolchain == Plan == * Figure out the current state of LLDB for Morello and what needs to be done * Continue triaging LLDB failures

6 years

1
0
0 0

Question about toolchain

by Saeed Jamali

Dear Linaro, Dear Linaro I'm using arm cortex A53 (mt6735 [part number]). But I do not know which tool-chain I have to use. I found your website https://www.linaro.org/downloads/ on internet. and my guess is aarch64-linux-gnu. can you please guide me through selecting a proper tool-chain. Regards, Saeed Djamali

6 years

2
1
0 0

[Activity] Nov 11th ~ Nov 15th 2019

by Luis Machado

# Progress # o Upstream GDB * More patch reviewing and answering questions. o GDB: * GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures - Managed to track this down all the way to the aarch64 single-stepping infrastructure in the kernel. Created reproduction steps and sent an e-mail to linux-arm-kernel - Also noticed a difference in the order in which SIGCHLD's are delivered between x86_64 and aarch64. This confused GDB, which expects the ordering it sees on x86_64. Working on a fix. * Tweaked QEMU setup a little for SVE testing * GNU-645 - gdbserver is not using SVE register descriptions properly - Tracked down why gdbserver is not sending SVE register data back to GDB. Working on a fix. * GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop - On hold for now. # Plan # o GDB * GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures - Continue working on a fix. * GNU-645 - gdbserver is not using SVE register descriptions properly - Continue working on a fix.

6 years

1
0
0 0

[ACTIVITY] week ending 17 Nov 2019

by Richard Henderson

[VIRT-262 # ARMv8.1-PAN Privileged Access Never] Started, based on VHE patch set due to mmu_idx reorg therein. Needs some minor re-work to handle Secure EL1. [VIRT-273 # ARMv8.2-ATS1E1, AT S1E1R and AT S1E1W instruction variants ] Started. [VIRT-327 # Richard's upstream QEMU work ] Some soft-freeze bug fixing of stuff that I broke this cycle. Some patch review. [Kernel] Posted v7 of the ARMv8.5-RNG patch set. There's some significant mis-communication going on between me and Mark Rutland; I have no idea what he wants at this point... [GCC] Committed the base asm-flags patch set. Posted a follow-up to un-break thumb1, and add tests for it. r~

6 years

1
0
0 0

[ACTIVITY] Week 46

by Yvan Roux

* One day off o LLVM: * Machine Outliner: - Identified issues with asm statements, working on a fix. o Misc * Various meetings and discussions.

6 years

1
0
0 0

[ACTIVITY] 11 - 15 Nov 2019

by Prathamesh Kulkarni

== This Week == * GCC - PR89007: Posted patch upstream. - GNU-583: Worked with Kugan, to reproduce LTO failure and verified his patch fixes it. - Bug 5479: Investigated with Maxim, most likely a glibc issue. * Validation: - Posted abe patch to add --gcc_patch_file option. == Next Week == - Continue ongoing tasks.

6 years

1
0
0 0

[ACTIVITY] 11-15 Nov 2019

by Christophe Lyon

Monday off == Progress == * GCC: - -mpure-code on v6m: answered questions about my patch. Almost OK * Linker: - started looking at implementing non-contiguous memory support * GCC upstream validation: - reported several issues * misc: - infra fixes / troubleshooting / reviews == Next == * GCC: pure-code/v6m, handle feedback * Binutils: support non-contiguous memory regions in linker

6 years, 1 month

1
0
0 0

[ACTIVITY] Week ending 15th November 2019

by Peter Smith

[Morello] - Dynamic linking implementation complete and tests written based on GNU ld output. - Good progress on refactoring the work prior to breaking it down into reviewable chunks. Have got a good idea of what I'd like the implementation to look like. TODO: - Finish refactoring patches. - Rebase into reviewable patches. - Document the design decisions. - Test on more than just the examples in the toolchain. - Rebase on top of latest CUCL drop when merge is finished. [Other] LLVM-MC upstream review for the Linux Kernel.

6 years, 1 month

1
0
0 0

[ACTIVITY] week ending Nov. 17 2019

by Alex Bennée

QEMU Tooling ([VIRT-252]) ========================= QEMU plugin support ([VIRT-280]) - feature now merged in 4.2 - closed out a bunch of related JIRA cards - API version now merged and this card is closed Extend gdbstub for SVE ([VIRT-281]) - posted {RFC PATCH 00/11} gdbstub re-factor and SVE support Message-Id: <20191115173000.21891-1-alex.bennee(a)linaro.org> [VIRT-281] https://projects.linaro.org/browse/VIRT-281 [working prototype] https://github.com/stsquad/qemu/tree/gdbstub/sve-registers Upstream Work ([VIRT-109]) ========================== - posted {PULL 0/8} testing and tcg plugin api ver Message-Id: <CAFEAcA_9AwoTE9zaKbiF6DkpN+O8LaEKGOct-m5S3yvFBHGK1g(a)mail.gmail.com> - posted {PATCH for 4.2-rc2 v1 0/5} misc doc and testing fixes Message-Id: <20191113115952.775-1-alex.bennee(a)linaro.org> - posted {RFC PATCH} scripts/tap-driver: report "slow" tests (HACK) Message-Id: <20191113142101.30280-1-alex.bennee(a)linaro.org> Other Activities ================ - wrote [draft of KVM Forum conference report] [draft of KVM Forum conference report] https://collaborate.linaro.org/pages/resumedraft.action?draftId=128647720 Completed Reviews [5/5] ======================= {PATCH 0/2} replace sysconf(_SC_PAGESIZE) with qemu_real_host_page_size Message-Id: <20191015031350.4345-2-richardw.yang(a)linux.intel.com> {PATCH v2 0/4} arm/aspeed: Watchdog and SDRAM fixes Message-Id: <20191113005201.19005-1-joel(a)jms.id.au> {kvm-unit-test PATCH 0/5} Improvements for the Travis CI Message-Id: <20191113112649.14322-6-thuth(a)redhat.com> {PATCH} target/arm: Clean up arm_cpu_vq_map_next_smaller asserts Message-Id: <20191115131623.322-1-richard.henderson(a)linaro.org> {PATCH v1 0/5} Make the qemu_logfile handle thread safe. Message-Id: <20191112150105.2498-1-robert.foley(a)linaro.org> Current Review Queue ==================== * {PATCH v2 0/6} Make the qemu_logfile handle thread safe. Message-Id: <20191115131040.2834-1-robert.foley(a)linaro.org> Added: <2019-11-15 Fri> * {PATCH 0/1} tests/vm: Allow to set path to qemu-img Message-Id: <20191114134246.12073-1-wainersm(a)redhat.com> Added: <2019-11-14 Thu> * {PATCH v7 0/8} Acceptance test: Add "boot_linux" acceptance test Message-Id: <20191104151323.9883-1-crosa(a)redhat.com> Added: <2019-11-04 Mon> * {RFC 0/3} tests/vhost-user-fs-test: add vhost-user-fs test case Message-Id: <20191025100152.6638-1-stefanha(a)redhat.com> Added: <2019-10-25 Fri> -- Alex Bennée

6 years, 1 month

1
0
0 0

[ACTIVITY] report week ending 15 Nov

by Peter Maydell

Progress: * VIRT-65 [QEMU upstream maintainership] - wrote up first draft of requirements for the better CI setup for testing pull request merge builds (https://wiki.qemu.org/Requirements/GatingCI) - wrote up version of the QEMU Summit minutes that includes enough context to make sense to people who weren't present; plan to send to qemu-devel next Friday - got 4.2 rc1 out of the door; this release seems to be pleasantly quiet for a change. thanks -- PMM

6 years, 1 month

1
0
0 0

[ACTIVITY] 11 - 15 November 2019

by Diana Picus

== Progress == * Committed SVE-related fix for InstCombine * Started triaging check-lldb failures on AArch64 [LLVM-512] - Committed a trivial fix for one of the tests - Still looking into the other failures * Received and setup laptop for Morello work - Awaiting further instructions == Plan == * Start working on Morello * Keep triaging check-lldb failures * If time permits, look into SVE asserts some more

6 years, 1 month

1
0
0 0

[Activity] Oct 28th - Nov 6th 2019

by Luis Machado

# Progress # o Annual Review * Concluded o Upstream GDB * Patch reviews on gerrit and answering questions. * Fixed PR25124 - [ARM] regression: thumb-bx-pc.exp (https://sourceware.org/bugzilla/show_bug.cgi?id=25124) * Investigated an odd failure in gdb.base/step-over-syscall.exp and ended up finding some odd stepping behavior that may or may not be kernel related. Still investigating under GNU-644 (https://projects.linaro.org/browse/GNU-644) o GDB: * GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop - On hold for now. It would be nice to be able to use a NOP instead of a dummy label + jump. * Setup QEMU for running SVE bits and reproduced some SVE hiccups in gdbserver that Alex mentioned. * Misc discussions about SVE and the GDB implementation in general. # Plan # o Upstream GDB * More patch reviewing and answering questions. o GDB: * GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures - Continue investigating * Tweak QEMU setup a little for SVE testing

6 years, 1 month

1
0
0 0

ACTIVITY] 4-8 Nov 2019

by Christophe Lyon

== Progress == * GCC: - -mpure-code on v6m: no feedback yet * Linker: - started looking at implementing non-contiguous memory support * GCC upstream validation: - reported several issues * misc: - infra fixes / troubleshooting / reviews == Next == * GCC: pure-code/v6m, handle feedback * Binutils: support non-contiguous memory regions in linker

6 years, 1 month

1
0
0 0

[ACTIVITY] week ending 10 Nov 2019

by Richard Henderson

[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ] Reworked the timer redirection. Now the EL2 and EL0 redirection is unified, which is a bit easier to understand. Still no joy working out where the unwanted interrupt is coming from. As far as I can tell everything is plumbed correctly... I'll shelve this until PMM is not swamped with release work. It must wait for 5.0 for merging anyway. [VIRT-327 # Richard's upstream QEMU work ] Assorted patch review. [Kernel] Posted two more rounds of ARMv8.5-RNG for review. Seems I'd misunderstood one of Mark's previous suggestions, and Ard changed his mind about how RNDR vs RNDRRS should be used in the context of the shared resource across host*CORES + virt*VCPUS. [GCC] Posted an implementation of asm-flag-output for AArch32+AArch64. I should have done this years ago. There are two potential users within the kernel, and one is access_ok() which has thousands of uses. (Oh, and RNG, which has like 3 uses. :-P) Reviewed some arm simd patches that caught my eye. r~

6 years, 1 month

1
0
0 0

[ACTIVITY] week ending Nov. 10 2019

by Alex Bennée

QEMU Tooling ([VIRT-252]) ========================= QEMU plugin support ([VIRT-280]) - feature now merged in 4.2 - closed out a bunch of related JIRA cards - posted {PATCH} tcg plugins: expose an API version concept Message-Id: <20191104131836.12566-1-alex.bennee(a)linaro.org> - requested by Peter before hardfreeze Extend gdbstub for SVE ([VIRT-281]) - got a [working prototype] - probably need a little core gdbstub re-factor before posting RFC [VIRT-281] https://projects.linaro.org/browse/VIRT-281 [working prototype] https://github.com/stsquad/qemu/tree/gdbstub/sve-registers Upstream Work ([VIRT-109]) ========================== - posted {PULL v3 00/15} testing updates Message-Id: <20191025193709.28783-1-alex.bennee(a)linaro.org> - had to drop NetBSD autobuild (again) [VIRT-109] https://projects.linaro.org/browse/VIRT-109 [branch] https://github.com/stsquad/qemu/tree/testing/docker-multiarch-refactor [testing/next] https://github.com/stsquad/qemu/tree/testing/next Other Activities ================ - Presented at KVM Forum - went down well, made a number of contacts who are interested - A bunch of discussion on Hexagon - More detailed write-up to follow Completed Reviews [4/4] ======================= {PATCH 0/5} travis.yml improvements: Update libraries, build with arm64 Message-Id: <20191009170701.14756-1-thuth(a)redhat.com> - CLOSING NOTE [2019-10-18 Fri 19:04] Pulled some bits into testing/next Added: <2019-10-09 Wed> {PATCH} Semihost SYS_READC implementation (v4) Message-Id: <20191024224622.12371-1-keithp(a)keithp.com> {PATCH v2 0/4} target/arm: Support for Data Cache Clean up to PoP Message-Id: <CADSWDztHetgmbUOp4WyRAkR0daAG6kkwhUTcyKWiCTWHQ1XB=w(a)mail.gmail.com> {PATCH 0/4} Make the qemu_logfile handle thread safe. Message-Id: <20191107142613.2379-1-robert.foley(a)linaro.org> Absences ======== - KVM Forum Oct 29th-Nov 1st Current Review Queue ==================== * {PATCH v7 0/8} Acceptance test: Add "boot_linux" acceptance test Message-Id: <20191104151323.9883-1-crosa(a)redhat.com> Added: <2019-11-04 Mon> * {RFC 0/3} tests/vhost-user-fs-test: add vhost-user-fs test case Message-Id: <20191025100152.6638-1-stefanha(a)redhat.com> Added: <2019-10-25 Fri> * {PATCH v5 00/22} target/arm: Implement ARMv8.5-MemTag, system mode Message-Id: <20191011134744.2477-1-richard.henderson(a)linaro.org> Added: <2019-10-11 Fri> * {PATCH v4 0/9} target/arm/kvm: enable SVE in guests Message-Id: <20190924113105.19076-1-drjones(a)redhat.com> Added: <2019-09-24 Tue> -- Alex Bennée

6 years, 1 month

1
0
0 0

[ACTIVITY] 3x3 for week ending 8th November 2019

by Peter Smith

Morello - Started to document the LLD implementation. - Implemented CHERI concentrate alignment for the important sections. - Dynamic linking is feature complete, but not finished yet, still Todo: -- More test cases for the various different combinations. -- Refactor to clean up the implementation. -- Rebase all the patches to remove the false starts. -- Update the documentation I've just started as it is already out of date. -- Not looked at ifunc or TLS yet. llvm-mc Some review on MC patch to allow limited symbolic computation when evaluating .if

6 years, 1 month

1
0
0 0

[ACTIVITY] report week ending 8 Nov (inc KVM Forum trip report)

by Peter Maydell

Progress / KVM Forum trip report: * As usual, we held the QEMU Summit at the same time as the forum; this is an hour-or-two invitation only meeting of the top 20 or so maintainers/submaintainers, discussing process and other project issues. A proper summary/writeup of the minutes will be posted to qemu-devel later, but IMHO this year the most interesting topics were: - Spreading the load of managing pull request merges; currently I do this with the aid of some hand-hacked scripts. To be able to spread this work among more people we need to replace that with a more maintained and standardized CI/testing setup. RedHat have agreed to provide some people to work on at least the initial setup part of this, and we got some consensus that the approach to take was to use Gitlab with some custom 'runners' to handle the 'build/test on aarch64/ppc/s390x/etc' parts. - We talked about the project's general stance on 'plugin' interfaces; which can be controversial both because they commit us to maintaining a stable API/ABI and because they have the potential to be used to work around the GPL (eg proprietary device models). We plan to write up some guidelines here (mostly just writing down the existing consensus). - We also talked (again) about our handling of security issues and CVEs. My impression is that there are some parts of this that people aren't hugely happy with but that nobody has the time/effort to try to improve things (eg better documentation/tracking of issues, more prompt upstream point releases with security fixes), so things are likely to stay about as they are now. * Interesting talks (videos are being uploaded to: https://www.youtube.com/channel/UCRCSQmAOh7yzgheq-emy1xA ): - 'The Hype Around the RISC-V Hypervisor' : the RISC-V architecture's hypervisor extension isn't completely finalized yet, but it's far enough advanced that KVM support and also QEMU emulation of it have been written. An amusing sign of the architecture's academic underpinnings is that this first version doesn't have any hardware acceleration of the interrupt controller, but does have full nested-virtualization support. - 'ZERO: Next Generation Virtualization Platform for Huawei Cloud': Huawei describe hardware for a cloud environment which offloads as much as possible of the hypervisor work to custom I/O cards and a custom silicon cloud-control device, in a general approach that's probably familiar to anybody who watched the Amazon Nitro presentation from the other year. - 'What's Going On? Taking Advantage of TCG's Total System Awareness': Alex Bennée's talk on the introspection plugin work we've been doing in Linaro (and which will be in QEMU 4.2). - 'Playing Lego with Virtualization Components': description of the Rust 'rust-vmm' set of libraries intended to provide useful building blocks for putting together virtual machine managers (like Firecracker, crosvm). Basically similar content to a presentation they did for Cambridge University earlier this year, but this talk's been recorded so is good if you weren't in the audience the first time around. * And as always the in-person networking is valuable: - Oracle have a "split device emulation into separate processes" idea that's alarmingly invasive of the source code, but Stefan came up with an approach that might let them do what they need without making the source code harder to work with for the rest of us. - Met the RedHat person who's going to do the CI-for-pullreqs work (see QEMU Summit item earlier) : getting this unstalled was probably the most useful concrete outcome of the conference - Finally met Aurelien Jarno (a longstanding hobbyist contributor to QEMU who usually can't attend these conferences) * While at the conference Drew and I managed to finally get the SVE support for KVM guests into master (the last hurdle was an awkward test failure on the aarch32-compat-on-aarch64-kernel setup I happen to use as one of my build test environments; we don't care about whether KVM really works in this setup but we need 'make check' to not fail) * Also managed to fit in some wrangling of pull requests; the timing of the 4.2 release unfortunately put softfreeze on the Tuesday before the conference and rc0 on the Tuesday afterwards; rc0 ended up being postponed a couple of days as a consequence. thanks -- PMM

6 years, 1 month

1
0
0 0

[ACTIVITY] Week ending 1st November 2019

by Peter Smith

Linaro - On buildbot monitoring duty, relatively quiet week with just a couple of fairly simple to diagnose problems to report. Morello - Dynamic linking progressing albeit slowly. -- Trying to work out the requirements from existing documents and implementation. -- Have some simple cases doing mostly the right thing and have written some tests. -- Will need to rewrite to move calculations earlier in the link-step. -- Morello is quite different from Cheri in this regard so I have had to diverge much more from the implementation.

6 years, 1 month

1
0
0 0

VHE status

by Richard Henderson

Tree: https://github.com/rth7680/qemu.git tgt-arm-vhe-5 Testcase: qemu-test:~rth/linux/initramfs-min.cpio.gz The host kernel could be anything, but I've been using the same Image.gz that is inside the cpio archive. ./aarch64-softmmu/qemu-system-aarch64 -m 4G \ -M virt,virtualization=on,gic-version=max -cpu max \ -kernel Image.gz -initrd initramfs-min.cpio.gz At the shell prompt, ./test will run a guest kernel with kvm. As momentarily discussed with PMM in the hallway: As soon as the guest kernel enables interrupts, arch_timer_starting_cpu enable_percpu_irq irq_percpu_enable gic_unmask_irq -- Incorrect exception delivery. the GTIMER_PHYS interrupt is delivered to EL2 (seems to be ok), the host kernel does something (haven't dug into what exactly, bug presumably setting bits that are supposed to pass the virq to the guest), and immediately another interrupt is delivered to EL2. Repeat. Whether this is incorrect routing of the virq interrupt, or incorrect masking/acking of the hard irq interrupt at EL2, I do not yet know. PMM: I don't know the answer to either (a) or (b) as asked on hangouts. I think (b) is correct, but I can't be sure. I'm trying to understand how (a) is supposed to work now. In particular, I can't find any code that sets HCR_EL2.{VI,VF}, only tests them. r~

6 years, 1 month

2
3
0 0

[Activity] 21 - 25 Oct 2019

by Luis Machado

# Progress # o Ramp up * Concluded. o Annual Review * Attended discussions. o Upstream GDB * Patch reviews on gerrit. * Answered questions. * The state of ARM/AArch64 GDB upstream seems to be reasonable, with a few failures here and there. Numerous failures on problematic racy tests (gdb.threads). o GDB: * GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop - Spent some more time on this and improve the patch further, covering most problematic cases for "for", "while" and "do/while" loops. * Read some documentation on setting up Fast Models for testing MVE (Helium). * Inspected various aspects of ARM support in GDB, like SVE, PAC and ACLE. # Plan # o Annual Review * Conclude. o GDB: * GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop - Discuss with gcc@ a bit more about my proposed solution. * Attempt to setup system QEMU and/or Fast Model for testing ACLE SVE and, maybe, MVE.

6 years, 1 month

1
0
0 0

[ACTIVITY] 21 - 25 October 2019

by Diana Picus

== Progress == * Out of office 1 day * Buildbot monitoring - Moved the buildbots to pull from github * Trying to setup a build environment on ex40-01 - Gave up on the tcwg-sq-01/2 boards because they seemed too unstable * Still no access to Morello docs * Playing with lldb python scripting - Got a script that intercepts all calls to VectorType::getNumElements that don't come from a getElementCount (since that likely means that they won't be preserving the 'scalable' property) - This should help figure out problems spotted by the fuzzer - Likely needs a bit more refining == Plan == * More of the same * Out of office on Friday (1 November)

6 years, 1 month

1
0
0 0

[ACTIVITY] 21 - 25 Oct 2019

by Prathamesh Kulkarni

== This Week == * GCC - PR91272: Addressing upstream suggestions. - PR92163: Addressing upstream suggestions. * Validation - CI monitoring * Misc - Meetings == Next Week == - GCC: Continue ongoing tasks

6 years, 1 month

1
0
0 0

[ACTIVITY] week ending Oct. 27 2019

by Alex Bennée

QEMU Tooling ([VIRT-252]) ========================= QEMU plugin support ([VIRT-280]) - posted {PULL v2 00/73} tcg plugins and testing updates Message-Id: <20191025063713.23374-1-alex.bennee(a)linaro.org> - ended up having to pull due to testing breakage, will send re-split on Monday [VIRT-280] https://projects.linaro.org/browse/VIRT-280 Upstream Work ([VIRT-109]) ========================== - posted {PATCH for 4.2 v1 00/19} testing/next before softfreeze Message-Id: <20191022191704.6134-1-alex.bennee(a)linaro.org> - posted {PULL v3 00/15} testing updates Message-Id: <20191025193709.28783-1-alex.bennee(a)linaro.org> - had to drop NetBSD autobuild (again) [VIRT-109] https://projects.linaro.org/browse/VIRT-109 Other Activities ================ - KVM Forum Presentation work - Meeting with members on VirtIO options in custom hypervisors - Follow up on potential QEMU improvements for FW Completed Reviews [2/2] ======================= {PATCH 0/5} travis.yml improvements: Update libraries, build with arm64 Message-Id: <20191009170701.14756-1-thuth(a)redhat.com> - CLOSING NOTE [2019-10-18 Fri 19:04] Pulled some bits into testing/next Added: <2019-10-09 Wed> {PATCH} Semihost SYS_READC implementation (v4) Message-Id: <20191024224622.12371-1-keithp(a)keithp.com> Absences ======== - KVM Forum Oct 29th-Nov 1st Current Review Queue ==================== * {RFC 0/3} tests/vhost-user-fs-test: add vhost-user-fs test case Message-Id: <20191025100152.6638-1-stefanha(a)redhat.com> Added: <2019-10-25 Fri> * {PATCH v5 00/22} target/arm: Implement ARMv8.5-MemTag, system mode Message-Id: <20191011134744.2477-1-richard.henderson(a)linaro.org> Added: <2019-10-11 Fri> * {PATCH v4 0/9} target/arm/kvm: enable SVE in guests Message-Id: <20190924113105.19076-1-drjones(a)redhat.com> Added: <2019-09-24 Tue> * {PATCH v5 00/73} per-CPU locks Message-Id: <20181213050453.9677-1-cota(a)braap.org> * {PATCH 00/35} exec: drop BQL from interrupt handling -- Alex Bennée

6 years, 1 month

1
0
0 0

[ACTIVITY] 21-25 Oct 2019

by Christophe Lyon

== Progress == * GCC: - -mpure-code on v6m: no feedback yet * FDPIC/GDB - problems with the board I used, it hangs shortly after or during boot. None of the workaround/fixes suggested to me worked. Having an stm32 qemu config would help. * GCC upstream validation: - reported several issues * misc: - infra fixes / troubleshooting / reviews - sent 2 small qemu patches (fix vmrs support for m-profile, and add cortex-m7) - confirmed that gcc LTO profiled bootstrap works on arm with recent trunk, although it takes ages. Will need to try on a more powerful board == Next == * Holidays next week, back Nov 4th * FDPIC: resume work on GDB: check the various qemu forks with stm32 board support. Add FDPIC configuration in the GCC trunk validation. * GCC: pure-code/v6m, handle feedback * Binutils: support non-contiguous memory regions in linker

6 years, 1 month

1
0
0 0

[ACTIVITY] report week ending 25 Oct

by Peter Maydell

Progress: * VIRT-65 [QEMU upstream maintainership] + lots of wrangling of patches and pulls since I'm away next week and it's also going to be softfreeze + preparation for KVM Forum next week thanks -- PMM

6 years, 1 month

1
0
0 0

[ACTIVITY] week ending 20 Oct 2019

by Richard Henderson

Progress: [VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ] Updates for user-only. Merge bug fixes from eugeni.stepanov(a)gmail.com. [VIRT-349 # QEMU SVE2 Supprt ] Convert neon pmul helpers to a form that will be usable for sve2. [VIRT-327 # Richard's upstream QEMU work ] Pull for tcg-next. Review plugins v5. Update for capstone submodule. Started reviewing multi-phase reset v5. [Kernel] Hacked up a patch for ARMv8.5-RNG. r~

6 years, 1 month

1
0
0 0

[ACTIVITY] 14 - 18 Oct 2019

by Prathamesh Kulkarni

== This Week == * GCC SVE: - PR91532: Added test to PR91532 fix. - PR92085: Fix committed to trunk. - PR86753: Fix committed to trunk. - PR91272: Addressing upstream suggestions. - PR92033: Proposed patch, but Richard had a better approach. - PR89007: WIP. * Validation - Merged https://review.linaro.org/c/toolchain/jenkins-scripts/+/33041 * Misc: - Meetings - Annual Review == Next Week == - GCC SVE: Continue ongoing tasks. - Validation: Investigate issues with LTO bootstraps.

6 years, 1 month

1
0
0 0

[ACTIVITY] week ending Oct. 20 2019

by Alex Bennée

QEMU Tooling ([VIRT-252]) ========================= QEMU plugin support ([VIRT-280]) - posted {PATCH for 4.2 v5 00/55} Support for TCG plugins Message-Id: <20191014104948.4291-1-alex.bennee(a)linaro.org> - posted {PATCH for 4.2 v6 00/54} Support for TCG plugins Message-Id: <20191017131615.19660-1-alex.bennee(a)linaro.org> - should hopefully send PR next week - minor clean-up patch suggested by pm [VIRT-280] https://projects.linaro.org/browse/VIRT-280 Upstream Work ([VIRT-109]) ========================== - more work on multiarch docker [branch] - gathered up patches for [testing/next] [VIRT-109] https://projects.linaro.org/browse/VIRT-109 [branch] https://github.com/stsquad/qemu/tree/testing/docker-multiarch-refactor [testing/next] https://github.com/stsquad/qemu/tree/testing/next Other Activities ================ - Annual Review - Background reading on VirtIO Completed Reviews [3/3] ======================= {PATCH v6 00/20} target/arm: Reduce overhead of cpu_get_tb_cpu_state Message-Id: <20191011155546.14342-1-richard.henderson(a)linaro.org> - CLOSING NOTE [2019-10-17 Thu 14:17] Looking good Added: <2019-10-11 Fri> {PATCH 0/4} target/arm vector improvements Message-Id: <20191017044232.27601-1-richard.henderson(a)linaro.org> {PATCH 0/5} travis.yml improvements: Update libraries, build with arm64 Message-Id: <20191009170701.14756-1-thuth(a)redhat.com> - CLOSING NOTE [2019-10-18 Fri 19:04] Pulled some bits into testing/next Added: <2019-10-09 Wed> Absences ======== - KVM Forum Oct 29th-Nov 1st Current Review Queue ==================== * {PATCH v5 00/22} target/arm: Implement ARMv8.5-MemTag, system mode Message-Id: <20191011134744.2477-1-richard.henderson(a)linaro.org> Added: <2019-10-11 Fri> * {PATCH v4 0/9} target/arm/kvm: enable SVE in guests Message-Id: <20190924113105.19076-1-drjones(a)redhat.com> Added: <2019-09-24 Tue> * {PATCH v5 00/73} per-CPU locks Message-Id: <20181213050453.9677-1-cota(a)braap.org> * {PATCH 00/35} exec: drop BQL from interrupt handling Message-Id: <20180917163103.6113-1-cota(a)braap.org> * {Qemu-arm} {PATCH v5} target-arm: Make the counter tick relative to cntfrq Message-Id: <20190912065631.12473-1-andrew(a)aj.id.au> -- Alex Bennée

6 years, 1 month

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[Activity] Week 41

by Luis Machado

# Progress # o Ramp up * Credentials, machine access and LDAP updates done. o Qualcomm Landing Team sunsetting * Returned Qualcomm's Laptop. o Upstream GDB * Ramping up on reviews. * Gathering data on the current state of GDB on ARM. o GDB: * GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop - Came up with a little hack/proof-of-concept to get this fixed. Though ugly, it seems fixing this in the front-end may make more sense, as the information i need (source line) is easily accessible in there. - Discussion ongoing with gcc@. GDB clearly needs the compiler to provide more information. * Created JIRA cards for all known pending ARM tasks for GDB, based on Alan's and Joey's input. TODO-ed all of them for the time being. # Plan # o GDB: * GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop - Continue pursuing a fix. * Prioritize GDB JIRA cards and start work on them.

6 years, 1 month

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[ACTIVITY] 3x3 for week ending 18th October 2019

by Peter Smith

[Morello] - Got static linking support to the point that I can successfully link with LLD the coremark, dhrystone and EEMBC from the arran-toolchain. Not got any outstanding failures to investigate. - Altered LLD so a linker script is no longer necessary for newlib. - Started the process of rebasing and adding tests for all the fixes/hacks I needed to make to the linker work. - Aligned the base and limit of capabilities according to the incoming CHERI concentrate scheme. Interesting question of what should a linker do when alignment requirements on the base and limit cross section boundaries, and what are the responsibilities for an object producer when creating a section when the length of the capability is known at compile time. Planned absences: Holiday Thursday, Friday (24th, 25th October)

6 years, 1 month

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[ACTIVITY] report week ending 18 Oct

by Peter Maydell

Progress: * VIRT-65 [QEMU upstream maintainership] + finishing off the ptimer API transition work + review of rth's "speed up calculation of tbflags" patchset + put together and sent an arm pullreq * VIRT-350 [Update Arm KVM support in QEMU] + the patchset for hotpluggable RAM support is now upstream thanks -- PMM

6 years, 1 month

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[ACTIVITY] 14-18 Oct 2019

by Christophe Lyon

== Progress == * GCC: - Work on -mpure-code on v6m. Patches sent for upstream review. * GCC upstream validation: - reported several issues * misc: - infra fixes / troubleshooting / reviews == Next == * FDPIC: resume work on GDB * GCC: pure-code/v6m * Binutils: support non-contiguous memory regions in linker

6 years, 1 month

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