I spoke with Ramana about these at HKG18, and I'm finally getting back to
these. I have routines for
-rw-rw-r--. 1 rth rth 2538 May 30 19:12 memchr.S
-rw-rw-r--. 1 rth rth 2405 May 30 20:49 memcmp.S
-rw-rw-r--. 1 rth rth 2385 May 30 19:12 rawmemchr.S
-rw-rw-r--. 1 rth rth 2470 May 30 19:12 strchrnul.S
-rw-rw-r--. 1 rth rth 2588 May 30 19:12 strchr.S
-rw-rw-r--. 1 rth rth 2370 May 30 19:12 strcmp.S
-rw-rw-r--. 1 rth rth 2403 May 30 19:12 strcpy.S
-rw-rw-r--. 1 rth rth 2263 May 30 19:12 strlen.S
-rw-rw-r--. 1 rth rth 2595 May 30 19:12 strncmp.S
-rw-rw-r--. 1 rth rth 2344 May 30 19:12 strnlen.S
-rw-rw-r--. 1 rth rth 3105 May 30 19:12 strrchr.S
The tests pass when run under Foundation Platform 11.3. What is the best way
to submit these for review and upstreaming? There's nothing in the git README
about an upstream mailing list...
FWIW, my code is at
https://github.com/rth7680/cortex-strings/tree/rth/sve
r~
o LLVM
* Some fixes in LLVM patch benchmarking job.
* Some experiments with LLVM (Thin)LTO
* Start to look at Outliner for ARM
o Misc
* Various meetings and discussions.
Progress:
[VIRT-198 # QEMU: SVE Emulation Support ]
Another round of patches merged. About 25 remaing.
Implemented MOVPRFX, for which I had plans but forgot to actually
implement. Discovered that the advance planning that I have added
for this isn't really sufficient. For the purposes of initial
upstreaming, I'll emulate them as plain moves.
With MOVPRFX done, feedback from Ori.Chalak(a)Huawei.com:
> Thank you so much for the quick resolution.
> I have run successfully 466 tests of the OpenBLAS benchmark suite on
> the branch tag of Qemu you sent me, with SVE instructions compiled
> from C using ARM Compiler and Gnu linker.
> All pass without any failure.
> Did not verify functional correctness, just that all instructions
> are run by your Qemu branch in user mode and Qemu completes the job
> without a crash.
[Upstream]
Third iteration on splitting do_syscall.
Patch review; pull request for Cota's tb_lock patch set.
Tracked down a TB offset overflow affecting a softmmu NEON test case.
[GCC]
Sent some patches for MOVPRFX to Richard Sandiford. He offered to
test them over the weekend before posting them to gcc-patches.
* 2 days of training
== Progress ==
* FDPIC
- GCC patch series: received some feedback. Will have to iterate.
- Rebased uclibc patches on top of uclibc-ng. Patch set passes the
GCC testsuite
* GCC upstream validation:
- looking at some random noise in testing
* GCC upstream
- posted a small patch to use ACLE preprocessor defines. Will have
to enhance it
* Infrastructure:
- patch reviews
- cleanup/improvements
* misc (conf-calls, meetings, emails, ....)
== Next ==
* FDPIC: uclibc-ng, GCC
* GCC upstream validation
SVE Support ([VIRT-198])
========================
- spin next version of CNT{VCT|FRQ}_EL0 from user-space Message-Id:
<20180518114424.18054-1-alex.bennee(a)linaro.org> with ID regs :todo
- the HPC guys hit this in their test setups
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
RISU Support for SVE ([VIRT-199])
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- worked on next [iteration of SVE series]
- added variable size reginfo for backwards compatibility
- various unrelated build clean-ups and tweaks
- posted {RISU PATCH v3 00/22} SVE support and various misc fixes
Message-Id: <20180613125601.14371-1-alex.bennee(a)linaro.org>
- Generating full SVE test set from ASL
- coded up some "heuristics" to add RISU constraints in patterns
- left model generating test sequences over the weekend
- handle load/store memory instructions :todo
[VIRT-199] https://projects.linaro.org/browse/VIRT-199
[iteration of SVE series]
https://github.com/stsquad/risu/tree/add-sve-support-v3
SVE Reviews
~~~~~~~~~~~
- start kicking tires of rth's patches with new test suite :todo
Upstream Work ([VIRT-109])
==========================
- started reviewing {PATCH v4 00/19} reverse debugging Message-Id:
<20180528071332.9424.27343.stgit@pasha-VirtualBox>
- ran into some issues, need clearer understanding of snapshots
- posted {RFC PATCH 0/3} Better docker dependency checking Message-Id:
<20180608160432.8734-1-alex.bennee(a)linaro.org>
- posted {PATCH v1 0/3} Current Travis Patches Message-Id:
<20180614125337.24950-1-alex.bennee(a)linaro.org>
- posted {PULL 0/3} Travis updates Message-Id:
<20180615110903.29674-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Fixing up tests/tcg
~~~~~~~~~~~~~~~~~~~
- finished working on test/tcg series
- posted {PATCH v7 00/54} fix building of tests/tcg - last chance to
review! Message-Id:
<20180615194705.28019-1-alex.bennee(a)linaro.org>
- sending the pull req next week :todo
KVM CI Loop ([VIRT-2])
======================
- need to sync-up on the current state of this work :todo
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
Completed Reviews [1/1]
=======================
{PATCH v2 00/13} iommu: support txattrs, support TCG execution, implement TZ MPC
Message-Id: <20180604152941.20374-10-peter.maydell(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-14 Thu 19:27]
Looks good.
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-devel} {PATCH v4b 00/18} target/arm: SVE instructions, part 2
Message-Id: <20180613015641.5667-1-richard.henderson(a)linaro.org>
* {PATCH 0/4} KVM: arm64: FPSIMD/SVE fixes for 4.17
Message-Id: <1528976039-25826-1-git-send-email-Dave.Martin(a)arm.com>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
* {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ code review
+ put together another target-arm pullreq (including more SVE patches)
* VIRT-164 [improve Cortex-M emulation]
+ I have a half-working prototype of small-MPU-regions
+ sent patches for various preparatory and cleanup work for that
+ MPC support patchset has been reviewed and needs some minor fixes
NB: have shifted next week's non-working day from Weds to Mon due
to a meeting on Weds; sorry about the short notice.
thanks
-- PMM
TCWG-1319 ICF support in clang and lld
- Reviewed LLD patches
TCWG-1424 Investigate profile information for code-size
- Spent some time tracking down problem with using perf=profile and
run_under simultaneously. Posted patch upstream.
- Investigated how llvm makes use of profile information and found an
analysis pass that can be adapted to get the information I'm likely to
need.
Other
- Worked on side-project for tiny-code model. Got it passing the
test-suite modulo TLS and one test that was too large for the code
model.
- Have a good idea of what I'll need to do for TLS, will need to start
with assembler support.
- Landed https://reviews.llvm.org/D45959 one step closer to removing
MCSubargetInfo from assembler backend.
Hello,
I'm learning the Trusted application that can be run in the TEE.
I was wondering whether there are some ways to check the .ta file's
instructions, just like using objdump or readelf on ELF.
I'm also interested how does the .ta be protected? What's the difference
between the .ta and normal executable?
Would it be possible to give me some information about that?
Thanks in advance!
Brs,
YL
Hi there
I apologize for posting this again as I was not subscribed to the mailing list on posting my first message, so if the first message made to the list without me being a subscriber, I apologize.
I added some more info as to my issue below.
I need to cross-compile an application written in C for ARM v8 (aarch64) and found the toolchain on your website.
I am running Windows 10 using Cygwin 32-bit as I am already compiling for arm6, arm7 and Linux (x86 and x64) successfully.
I downloaded https://releases.linaro.org/components/toolchain/binaries/latest/aarch64-el… and deployed it into my Cygwin installation with no issues.
When I ran my script, I get the following error message: aarch64-elf-gcc.exe: error: CreateProcess: No such file or directory
I enabled verbose mode on the GCC and the result is below. My Cygwin's default GCC version is 4.8.3, but I am running 7.2.1 for this. I also tried 4.9.4 as well using a different Cygwin instance.
Can you please advise how I can get around this error? I am able to cross-compile using the 100% exact script with all other architectures with the only difference being the toolchain and architecture.
I also found references to C:\cygwin\bin in the logs (note the backslashes instead of forward slashes) below which I'd imagine would cause the issue I am experiencing as I have no way to alter the -iprefix in the COLLECT_GCC_OPTIONS as I am not setting this parameter - seems the GCC compiler is injecting this in.
I also realised that I needed to use the linux-gnu version of the toolchain and not the ELF version which I did, but got the same results.
Cygwin DLL version (just in case).
I called: cygcheck -p cygwin1.dll |grep "cygwin:"
And it returned:
cygwin-2.10.0-1 - cygwin: The UNIX emulation engine
cygwin-2.8.2-1 - cygwin: The UNIX emulation engine
cygwin-2.9.0-3 - cygwin: The UNIX emulation engine
7.2.1
Using built-in specs.
COLLECT_GCC=C:\cygwin\bin\aarch64-elf-gcc.exe
Target: aarch64-elf
Configured with: '/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/snapshots/gcc.git~linaro-7.2-2017.11/configure' SHELL=/bin/bash --with-mpc=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-mpfr=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-gmp=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-gnu-as --with-gnu-ld --disable-libmudflap --enable-lto --enable-shared --without-included-gettext --enable-nls --disable-sjlj-exceptions --enable-gnu-unique-object --enable-linker-build-id --disable-libstdcxx-pch --enable-c99 --enable-clocale=gnu --enable-libstdcxx-debug --enable-long-long --with-cloog=no --with-ppl=no --with-isl=no --enable-multilib --enable-fix-cortex-a53-835769 --enable-fix-cortex-a53-843419 --with-arch=armv8-a --enable-threads=no --disable-multiarch --with-newlib --with-build-sysroot=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/sysroots/aarch64-elf --with-sysroot=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32/aarch64-elf/libc --enable-checking=release --disable-bootstrap --enable-languages=c,c++,lto --with-libiconv-prefix=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32/usr --build=x86_64-unknown-linux-gnu --host=i686-w64-mingw32 --target=aarch64-elf --prefix=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32
Thread model: single
gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)
COLLECT_GCC_OPTIONS='-std=c99' '-Wall' '-I' 'C:/Users/username/git/repo/appvm/vm/src/c/java/include' '-I' 'C:/Users/username/git/repo/appvm/vm/src/c/java/include/linux' '-D' '_POSIX_SOURCE' '-D' '_BSD_SOURCE' '-o' 'C:/Users/username/git/repo/appvm/target/vm/aarch64/app_vm' '-v' '-march=armv8-a' '-mlittle-endian' '-mabi=lp64'
cc1 -quiet -v -I C:/Users/username/git/repo/appvm/vm/src/c/java/include -I C:/Users/username/git/repo/appvm/vm/src/c/java/include/linux -iprefix c:\cygwin\bin\../lib/gcc/aarch64-elf/7.2.1/ -D _POSIX_SOURCE -D _BSD_SOURCE C:/Users/username/git/repo/appvm/vm/src/c/main.c -quiet -dumpbase main.c -march=armv8-a -mlittle-endian -mabi=lp64 -auxbase main -Wall -std=c99 -version -o C:\cygwin\tmp\ccXFqWeJ.s
aarch64-elf-gcc.exe: error: CreateProcess: No such file or directory
4.9.4
Using built-in specs.
COLLECT_GCC=C:\cygwin\bin\aarch64-elf-gcc.exe
Target: aarch64-elf
Configured with: /home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/snapshots/gcc-linaro-4.9-2017.01/configure SHELL=/bin/bash --with-mpc=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-mpfr=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-gmp=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-gnu-as --with-gnu-ld --disable-libmudflap --enable-lto --enable-objc-gc --enable-shared --without-included-gettext --enable-nls --disable-sjlj-exceptions --enable-gnu-unique-object --enable-linker-build-id --disable-libstdcxx-pch --enable-c99 --enable-clocale=gnu --enable-libstdcxx-debug --enable-long-long --with-cloog=no --with-ppl=no --with-isl=no --enable-multilib --enable-fix-cortex-a53-835769 --enable-fix-cortex-a53-843419 --with-arch=armv8-a --enable-threads=no --disable-multiarch --with-newlib --with-build-sysroot=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/sysroots/aarch64-elf --with-sysroot=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32/aarch64-elf/libc --enable-checking=release --disable-bootstrap --enable-languages=c,c++,lto --build=x86_64-unknown-linux-gnu --host=i686-w64-mingw32 --target=aarch64-elf --prefix=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32
Thread model: single
gcc version 4.9.4 (Linaro GCC 4.9-2017.01)
COLLECT_GCC_OPTIONS='-std=c99' '-Wall' '-I' 'c:/Users/username/git/repo/appvm/vm/src/c/java/include' '-I' 'c:/Users/username/git/repo/appvm/vm/src/c/java/include/linux' '-D' '_POSIX_SOURCE' '-D' '_BSD_SOURCE' '-o' 'c:/Users/username/git/repo/appvm/target/vm/aarch64/app_vm' '-v' '-mlittle-endian' '-mabi=lp64'
cc1 -quiet -v -I c:/Users/username/git/repo/appvm/vm/src/c/java/include -I c:/Users/username/git/repo/appvm/vm/src/c/java/include/linux -iprefix c:\cygwin\bin\../lib/gcc/aarch64-elf/4.9.4/ -D _POSIX_SOURCE -D _BSD_SOURCE c:/Users/username/git/repo/appvm/vm/src/c/main.c -quiet -dumpbase main.c -mlittle-endian -mabi=lp64 -auxbase main -Wall -std=c99 -version -o C:\cygwin\tmp\ccXoLYc6.s
aarch64-elf-gcc.exe: error: CreateProcess: No such file or directory
~Glen
Hi there
I need to cross-compile an application written in C for ARM v8 (aarch64) and found the toolchain on your website.
I am running Windows 10 using Cygwin 32-bit as I am already compiling for arm6, arm7 and Linux (x86 and x64) successfully.
I downloaded https://releases.linaro.org/components/toolchain/binaries/latest/aarch64-el… and deployed it into my Cygwin installation with no issues.
When I ran my script, I get the following error message: aarch64-elf-gcc.exe: error: CreateProcess: No such file or directory
I enabled verbose mode on the GCC and the result is below. My Cygwin's default GCC version is 4.8.3, but I am running 7.2.1 for this. I also tried 4.9.4 as well using a different Cygwin instance.
Can you please advise how I can get around this error? I am able to cross-compile using the 100% exact script with all other architectures with the only difference being the toolchain and architecture.
Cygwin DLL version (just in case).
I called: cygcheck -p cygwin1.dll |grep "cygwin:"
And it returned:
cygwin-2.10.0-1 - cygwin: The UNIX emulation engine
cygwin-2.8.2-1 - cygwin: The UNIX emulation engine
cygwin-2.9.0-3 - cygwin: The UNIX emulation engine
7.2.1
Using built-in specs.
COLLECT_GCC=C:\cygwin\bin\aarch64-elf-gcc.exe
Target: aarch64-elf
Configured with: '/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/snapshots/gcc.git~linaro-7.2-2017.11/configure' SHELL=/bin/bash --with-mpc=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-mpfr=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-gmp=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-gnu-as --with-gnu-ld --disable-libmudflap --enable-lto --enable-shared --without-included-gettext --enable-nls --disable-sjlj-exceptions --enable-gnu-unique-object --enable-linker-build-id --disable-libstdcxx-pch --enable-c99 --enable-clocale=gnu --enable-libstdcxx-debug --enable-long-long --with-cloog=no --with-ppl=no --with-isl=no --enable-multilib --enable-fix-cortex-a53-835769 --enable-fix-cortex-a53-843419 --with-arch=armv8-a --enable-threads=no --disable-multiarch --with-newlib --with-build-sysroot=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/sysroots/aarch64-elf --with-sysroot=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32/aarch64-elf/libc --enable-checking=release --disable-bootstrap --enable-languages=c,c++,lto --with-libiconv-prefix=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32/usr --build=x86_64-unknown-linux-gnu --host=i686-w64-mingw32 --target=aarch64-elf --prefix=/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32
Thread model: single
gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)
COLLECT_GCC_OPTIONS='-std=c99' '-Wall' '-I' 'C:/Users/username/git/repo/appvm/vm/src/c/java/include' '-I' 'C:/Users/username/git/repo/appvm/vm/src/c/java/include/linux' '-D' '_POSIX_SOURCE' '-D' '_BSD_SOURCE' '-o' 'C:/Users/username/git/repo/appvm/target/vm/aarch64/app_vm' '-v' '-march=armv8-a' '-mlittle-endian' '-mabi=lp64'
cc1 -quiet -v -I C:/Users/username/git/repo/appvm/vm/src/c/java/include -I C:/Users/username/git/repo/appvm/vm/src/c/java/include/linux -iprefix c:\cygwin\bin\../lib/gcc/aarch64-elf/7.2.1/ -D _POSIX_SOURCE -D _BSD_SOURCE C:/Users/username/git/repo/appvm/vm/src/c/main.c -quiet -dumpbase main.c -march=armv8-a -mlittle-endian -mabi=lp64 -auxbase main -Wall -std=c99 -version -o C:\cygwin\tmp\ccXFqWeJ.s
aarch64-elf-gcc.exe: error: CreateProcess: No such file or directory
4.9.4
Using built-in specs.
COLLECT_GCC=C:\cygwin\bin\aarch64-elf-gcc.exe
Target: aarch64-elf
Configured with: /home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/snapshots/gcc-linaro-4.9-2017.01/configure SHELL=/bin/bash --with-mpc=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-mpfr=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-gmp=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32 --with-gnu-as --with-gnu-ld --disable-libmudflap --enable-lto --enable-objc-gc --enable-shared --without-included-gettext --enable-nls --disable-sjlj-exceptions --enable-gnu-unique-object --enable-linker-build-id --disable-libstdcxx-pch --enable-c99 --enable-clocale=gnu --enable-libstdcxx-debug --enable-long-long --with-cloog=no --with-ppl=no --with-isl=no --enable-multilib --enable-fix-cortex-a53-835769 --enable-fix-cortex-a53-843419 --with-arch=armv8-a --enable-threads=no --disable-multiarch --with-newlib --with-build-sysroot=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/sysroots/aarch64-elf --with-sysroot=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32/aarch64-elf/libc --enable-checking=release --disable-bootstrap --enable-languages=c,c++,lto --build=x86_64-unknown-linux-gnu --host=i686-w64-mingw32 --target=aarch64-elf --prefix=/home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-elf/_build/builds/destdir/i686-w64-mingw32
Thread model: single
gcc version 4.9.4 (Linaro GCC 4.9-2017.01)
COLLECT_GCC_OPTIONS='-std=c99' '-Wall' '-I' 'c:/Users/username/git/repo/appvm/vm/src/c/java/include' '-I' 'c:/Users/username/git/repo/appvm/vm/src/c/java/include/linux' '-D' '_POSIX_SOURCE' '-D' '_BSD_SOURCE' '-o' 'c:/Users/username/git/repo/appvm/target/vm/aarch64/app_vm' '-v' '-mlittle-endian' '-mabi=lp64'
cc1 -quiet -v -I c:/Users/username/git/repo/appvm/vm/src/c/java/include -I c:/Users/username/git/repo/appvm/vm/src/c/java/include/linux -iprefix c:\cygwin\bin\../lib/gcc/aarch64-elf/4.9.4/ -D _POSIX_SOURCE -D _BSD_SOURCE c:/Users/username/git/repo/appvm/vm/src/c/main.c -quiet -dumpbase main.c -mlittle-endian -mabi=lp64 -auxbase main -Wall -std=c99 -version -o C:\cygwin\tmp\ccXoLYc6.s
aarch64-elf-gcc.exe: error: CreateProcess: No such file or directory
~Glen
SVE Support ([VIRT-198])
========================
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
RISU Support for SVE ([VIRT-199])
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- started work on next [iteration of SVE series]
- added variable size reginfo for backwards compatibility
- various unrelated build clean-ups and tweaks
- left model generating the testcases over the weekend
- post patches to list :todo
[VIRT-199] https://projects.linaro.org/browse/VIRT-199
[iteration of SVE series]
https://github.com/stsquad/risu/tree/add-sve-support-v3
Upstream Work ([VIRT-109])
==========================
- started reviewing {PATCH v4 00/19} reverse debugging Message-Id:
<20180528071332.9424.27343.stgit@pasha-VirtualBox>
- ran into some issues, need clearer understanding of snapshots
- posted {PATCH v1 0/7} updates for Docker Message-Id:
<20180604145109.30498-1-alex.bennee(a)linaro.org>
- posted {PULL 0/6} Some docker updates Message-Id:
<20180605160541.10664-1-alex.bennee(a)linaro.org>
- posted {RFC PATCH 0/3} Better docker dependency checking Message-Id:
<20180608160432.8734-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[v4 of the tb_lock removal patches]
https://github.com/cota/qemu/tree/tb-lock-removal-redux-v4
Fixing up tests/tcg
~~~~~~~~~~~~~~~~~~~
- worked on v6 of tests/tcg
- --enable-debug threw up a crash in sh4-linux-user/testthread and
gusa handling
- fun and games with dependencies for building docker images from
makefiles
- posted {PATCH v6 00/49} fix building of tests/tcg Message-Id:
<20180608123307.24773-1-alex.bennee(a)linaro.org>
KVM CI Loop ([VIRT-2])
======================
- need to sync-up on the current state of this work :todo
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
Completed Reviews [2/2]
=======================
{PATCH v3 00/17} tcg: tb_lock removal redux v3
Message-Id: <1526945967-9687-1-git-send-email-cota(a)braap.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-04 Mon 13:21]
v4 was posted, tested ok.
{PATCH v3 00/19} reverse debugging
Message-Id: <20180523064941.26016.74274.stgit@pasha-VirtualBox>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-04 Mon 16:32]
v4 posted
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
* {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
* {Qemu-devel} {PATCH v3b 00/18} target/arm: SVE instructions, part 2
Message-Id: <20180530180120.13355-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH v3 0/5} Acceptance/functional tests
Message-Id: <20180529193730.9204-1-crosa(a)redhat.com>
* {PATCH v3 00/15} fp-test + hardfloat
Message-Id: <1522883475-27858-1-git-send-email-cota(a)braap.org>
--
Alex Bennée
[ACTIVITY]
- Landed D44928, we should pass the subtarget through to fixups and
relaxation now. The only remaining use of the subtarget in the
assembler backend is for writeNop(). Patches to fix that are upstream
but I'm not hopeful that anyone will want to review them due to the
cost/benefit.
- Wrote up some thoughts on Maxim's idea to use pgo to optimize hot
code for time, but cold code for size in an attempt to retain as much
as performance as possible while reducing code-size.
- Some investigation into the --pgo option of lnt. There seem to be
some pre-requisites and some interactions that have made it difficult
to get results:
-- Needs compiler-rt, duh! But it didn't tell me until after I'd
waited for everything to compile.
-- Failed when I enabled perf and pgo, looks to be a configuration
problem where profile-generate and profile-use are set simultaneously.
Probably a cmake problem.
- Some work on side-project to implement the tiny code model
-- Have something working on small examples, much more testing needed.
-- Need to decide what to do about TLS.
Peter
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ reviewed the next chunk of rth's SVE patches
+ various other misc code review
+ updated windows cross-build environment to handle impending bump
in our minimum supported glib version
* VIRT-164 [improve Cortex-M emulation]
+ revised and sent out v2 of the iommu/MPC emulation patchset
+ started looking at implementation of small-MPU-regions
thanks
-- PMM
== Progress ==
* GCC
- FDPIC patch series: received some feedback. Will have to iterate.
- Rebased uclibc patches on top of uclibc-ng, now debugging build problems
* GCC upstream validation:
- looking at some random noise in testing
* Infrastructure:
- patch reviews
- cleanup/improvements
* misc (conf-calls, meetings, emails, ....)
== Next ==
* FDPIC: uclibc
* GCC upstream validation
* Training Wed/Thu
o LLVM
* Thumbv8 bot failures [TCWG-1400]:
- Fix committed upstream
- Thumbv8 bots now green
* Updated staging bots docker images
o Misc
* Various meetings and discussions.
Progress:
[VIRT-198 # QEMU: SVE Emulation Support ]
Part 2 posted.
[Upstream]
Review of tb_lock removal; it's failing it's own asserts. :-/
Respin interp_dirfd patchset, now with host fd protection.
Posted an RFC for splitting up the ~5000 line do_syscall function.
[Cortex Strings]
Found two bugs in my sve string implementations.
Submitted the results to cortex-strings.
(This is the mechanism by which I plan to test the first-fault
load implementation within qemu; the testsuite tries string
operations near a page boundary.)
Beginning to incorporate feedback from Richard Sandiford.
So far strlen, strcmp, strcpy updated, but not yet reposted.
r~
Upstream Work ([VIRT-109])
==========================
- catch-up on review queue :todo
- posted {PATCH v1 0/8} Travis stability and a few docker patches
Message-Id: <20180530110655.22022-1-alex.bennee(a)linaro.org>
- posted {PULL 0/7} Travis updates Message-Id:
<20180601162101.895-1-alex.bennee(a)linaro.org>
- reviewing {PATCH v3 00/17} tcg: tb_lock removal redux v3 Message-Id:
<1526945967-9687-1-git-send-email-cota(a)braap.org>
- getting good results with cpu_get_tb_cpu_state at the top now
- investigating difference with rth's experience on aarch64
- can replicate the coldfire crash though
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Fixing up tests/tcg
~~~~~~~~~~~~~~~~~~~
- working on v6 of tests/tcg
- --enable-debug threw up a crash in sh4-linux-user/testthread and
gusa handling
KVM CI Loop ([VIRT-2])
======================
- need to sync-up on the current state of this work :todo
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
Other Tasks
===========
- SyncQuacer DevBox now booting Gentoo \o/
- been making Gentoo's [arm64 story a bit more desktopy]
- testing fwupdate mechanism for fwupdate
- Messing around with virtio-pci
- got -nic and networking on PCI working nicely
- however virtio-scsi seems broken and not sure why
[arm64 story a bit more desktopy]
https://github.com/stsquad/gentoo/tree/arm-keywords-so-far
Completed Reviews [0/0]
=======================
Absences
========
- Short week from holidays/bank-holidays
- VNC18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH v3 00/17} tcg: tb_lock removal redux v3
Message-Id: <1526945967-9687-1-git-send-email-cota(a)braap.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {Qemu-devel} {PATCH v3 0/5} Acceptance/functional tests
Message-Id: <20180529193730.9204-1-crosa(a)redhat.com>
* {PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
* {PATCH v3 00/15} fp-test + hardfloat
Message-Id: <1522883475-27858-1-git-send-email-cota(a)braap.org>
* {PATCH v3 00/19} reverse debugging
Message-Id: <20180523064941.26016.74274.stgit@pasha-VirtualBox>
--
Alex Bennée
[ACTIVITY]
Upstream reviews for LLD. Trying to be more proactive here now that
there are fewer maintainers.
[TCWG-1420] Initial investigation into some proposed linker
enhancements for embedded systems
- Mostly features already implemented in proprietary linkers such as
AT and an equivalent to .any.
- Completed initial investigation with links to TI/IAR documentation,
binutils discussions.
- Some thoughts on which of the features might be implemented cleanly
enough to be upstreamed.
Pinged llvm-mc subtarget reviews (no response)
Spent some more time investigating a tiny-code model for AArch64 in an
attempt to teach myself more about LLVM.
Progress: [short week, 3 days]
* VIRT-65 [QEMU upstream maintainership]
+ code review
+ some more conversions of devices using 'old_mmio'
+ looking at trying to fix non-migrated RAM regions in various devices
* VIRT-164 [improve Cortex-M emulation]
+ wrote some minor cleanup patches (including giving a helpful error message
for attempts to use an M-profile CPU without an NVIC, rather than crashing)
+ reviewing first few patches from the micro:bit emulation GSoC students
+ reviewed and added comments on Stefan's list of tasks for
Cortex-M0 emulation
Absences:
* Aug 27 -- Sep 14: holiday
* Sep 17 -- 21: Linaro Connect (Vancouver)
* Oct 22 -- 26: KVM Forum (Edinburgh; unconfirmed)
* NB: I work a 4 day week, excluding Wednesdays
thanks
-- PMM
== Progress ==
* GCC
- FDPIC patch series: received a bit of feedback. Noticed problems
with v8m and libssp, should be easy to fix
- Started rebasing uclibc patches on top of uclibc-ng
* GCC upstream validation:
- reported a few failures/regressions
- looking at some random noise in testing
* Infrastructure:
- patch reviews
- cleanup/improvements
* misc (conf-calls, meetings, emails, ....)
== Next ==
* FDPIC: uclibc
* GCC upstream validation
* Training Mon/Tue
== Progress ==
o GNU release transition
* 6.4 and 7.3 2018.05 RC1 deployed
o LLVM
* Thumbv8 bot failures [TCWG-1400]:
- Testing fix on arm, armhf, armv7 and armv8.
o Misc
* Various meetings and discussions.
== This Week ==
* TCWG-1234: Code hoisting and register pressure (8/10)
- Created patches for restricting hoisting out of blocks on loop exit
but that was false alarm.
- Investigating interaction of forwprop, code hoisting and register pressure.
- Started upstream discussion.
* GCC bugs (1/10)
- TCWG-125: static_cast not working on ARM hardfp: Asked upstream on
libvolk list for help to reproduce.
- PR85787: Created patch, investigating regressions caused due to it.
* Misc (1/10)
- Meetings
== Next Week ==
- TCWG-1234
- GCC bugs
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ sent patch for minor bug where FRECPX was not honouring FPCR.FZ
+ looking at migration failure for TCG VMs using Secure mode. I know
what the bug is, but need to figure out how to fix it without breaking
migration compatibility for TCG VMs which don't use Secure mode...
+ various miscellaneous minor bug fixing and code review
* VIRT-164 [improve Cortex-M emulation]
+ MPC emulation:
- sent out first version of patchset that implements the required
IOMMU core code features and the MPC device that uses them; fielded
various code review discussions on it
thanks
-- PMM
Half of the week spent investigating identical code folding -icf=safe.
Turns out that upstream have a proposal that is much further along so
shifted focus on to doing as much as I can to help it along.
Found out that for some use cases of AArch64 PIC the small code model
is inappropriate as the code segments may not be 4k aligned. Started
looking into what it would take to implement the tiny code model in
LLVM (supports only small and large at the moment). Built a small
prototype to handle the easiest absolute addressing case, much more
work needed to handle PIC and TLS.
Not a lot of tangible progress, but I think I have learned a bit more
about LLVM.
Planned Absences
- Friday 25th May (holiday).
- Monday 28th May (UK public holiday)
Hello,
I just noticed that the manifest file of the Linaro gcc-5.5-2017.10 release under http://releases.linaro.org/components/toolchain/gcc-linaro/5.5-2017.10/x86_… from January, 13th 2018 differs from the original version from October 2017: the binutils, gdb and abe versions are different.
Could you please tell me the reason for the changes?
Thank you very much!
Andrej Gantvorg
The Linaro Binary Toolchain
============================
The Linaro GCC 6.4-2018.05-rc1 Release-Candidate is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release-candidate packages from:
(sources) http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.05-rc1/
(binaries) http://snapshots.linaro.org/components/toolchain/binaries/6.4-2018.05-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and AArch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.4-2018.05-rc1
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.05-rc1/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (users/linaro/binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 8.1 (gdb-8.1-branch)
https://lists.gnu.org/archive/html/info-gnu/2018-01/msg00016.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 6 (as of Linaro GCC 6.4-2018.05-rc1)
==================================================
* Previous MinGW hosted version of Linaro GCC C preprocessor failed to
convert character set used for string, character constants, etc. This
is fixed in this release.
Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8.
https://bugs.linaro.org/show_bug.cgi?id=3040
* The Linaro GCC 6.3-2017.05 snapshot added support for -mpure-code
option to ARMv7-M and ARMv8-M targets. This option ensures functions
are put into sections that contain only code and no data.
* The GDB version was upgraded from GDB 8.0 to 8.1.
* Previous versions of the Linaro GCC 6 toolchain, when -static
-E/—dynamic-list are passed to the linker, might create executables
with dynamic sections which aren’t supported by run-time. This was
exhibited in Perf Tools build system and has been fixed upstream and
backported into Linaro Binutils 2.27 branch.
Linaro bugzilla #2926 : Perf tools compiled statically for AArch64
with Linaro release 6.1 and later ones was not statically linked.
https://bugs.linaro.org/show_bug.cgi?id=2926
* The Linaro GCC 6.3-2017.03 snapshot fixed some ILP32 issues (TLS,
exception handling, …) and these have been incorporated into this
release.
* Previous versions of the Linaro GCC 6 toolchain were incorrectly
generating floating-point code for soft-float Linux targets
(arm-linux-gnueabi, and armeb-linux-gnueabi). This escaped detection
until recently because the soft-float targeted toolchains were
configured to use general-purpose registers for passing floating-point
values (which is what you would expect for soft-float toolchains) and
the intra-routine floating-code was not noticed.
The issue would only show up on targets that were run on hardware that
truly didn't have floating-point hardware where the kernel did not
trap and emulate floating-point routines. This has been solved in
Linaro GCC 6.3-2017.02-rc2 by configuring the toolchain (using
--with-float=soft) to generate code without any floating-point
instructions at all (-mfloat-abi=soft).
https://review.linaro.org/#/c/16968/2
This change should not break compatibility between existing binaries
compiled with these toolchains since the float-point parameter passing
ABI is still the same.
* A bug/regression in the compiler has been identified whereby the
target function that is invoked when calling a "weak" function
directly is the "strong" override, whereas when calling the function
via a pointer the "weak" implementation is used. This would be
noticed as inconsistent function invocation when invoking directly vs.
invoking via function pointer. This issue only affected 32-bit arm
targets. This regression has been fixed upstream and backported into
Linaro GCC 6.3-2017.02-rc2.
GCC PR target/78253: [5/6/7 Regression] [ARM] call weak function
instead of strong when called through pointer.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78253
Linaro bugzilla #2562: ARM GCC 5.2 call weak function instead of
strong when called through pointer
https://bugs.linaro.org/show_bug.cgi?id=2562
* MS Windows does not support symlinks and the MS Windows archive
extractor does not properly deep copy the symlink target
files/directories into the symlinked directory structure when
unpacking the toolchain archive. This causes problems with missing
dependencies when using the Linaro mingw toolchains, as identified in
the following bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
This has been solved by copying files rather than using symlinks when
the mingw targetted toolchain archives are created.
https://review.linaro.org/#/c/16415/
* Users of Linaro's toolchain have encountered problems when building
projects with Autotools (specifically libtool):
https://bugs.linaro.org/show_bug.cgi?id=2764
The Linaro binary toolchain release contained files with a .la suffix
as artifacts of the toolchain build process. These .la files are
helper files for libtool, but unlike a gcc install tree, they are not
position independent and contain full paths. Since these artifacts
contain absolute paths they can actually mislead user invocation of
libtool into not finding required libraries (because they reference
the build tree, not the install location) and hence breaking Autotools
builds. These *.la file artifacts have been removed from Linaro
toolchain binaries because they are unnecessary for users.
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M and these have been incorporated into this release.
* Compiling and statically linking some SPEC2006int tests against
tcmalloc have been failing due to a problem with glibc's memory
allocator function overrides. This was fixed upstream:
https://sourceware.org/bugzilla/show_bug.cgi?id=20432
Backported into Linaro glibc 2.23:
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 2665915cfc46aa6403bb2efd473c523d3167e0cb
Author: Andre Vieira (lists) <Andre.SimoesDiasVieira(a)arm.com>
Date: Thu Jun 16 12:23:51 2016 +0100
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit e7b1ee2ea6aa3ee1da41976407410e6202a098c5
Author: Wilco Dijkstra <Wilco.Dijkstra(a)arm.com>
Date: Thu May 12 16:16:58 2016 +0000
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit 5c02bcc086a96b174e1b9e1445a4a1770070107a
Author: Thomas Preud'homme <thomas.preudhomme(a)arm.com>
Date: Wed May 11 17:18:48 2016 -0400
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit 5c9403eaf40951f8a4f55ed65f661b485ff44be7
Author: David Hoover <spm2(a)dangerous.li>
Date: Thu Apr 21 07:12:24 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, Linaro GCC 6.3-2017.01,
Linaro GCC 6.3-2017.02, Linaro GCC 6.3-2017.03, Linaro GCC
6.3-2017.04, Linaro GCC 6.3-2017.05, Linaro GCC 6.3-2017.06, Linaro
GCC 6.4-2017.07, Linaro GCC 6.4-2017.08, Linaro GCC 6.4-2017.09,
Linaro GCC 6.4-2017.10 and Linaro GCC 6.4-2018.04.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.03/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.04/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.04/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
[VIRT-198 # QEMU: SVE Emulation Support ]
All softfp prerequisites merged upstream.
First 25 of 70 patches of SVE decode merged upstream.
[Upstream]
Review and testing of Alex's check-tcg revival.
[STOP]
r~
== Progress ==
o GNU release transition
* Provided support to handle infra issues
* Meetings on GCC 8
o LLVM
* Benchmarking effort with HPC team [HPC-183/184]
- Added OpenMP support to LLVM scripts and jobs
- Generate toolchain tarballs as job artifact.
* Thumbv8 bot failures [TCWG-1400]:
- Needs a deeper cleanup of LIT configuration.
o Misc
* Various meetings and discussions.
== This Week ==
* GCC bugs (8/10)
a) Committed patches for:
i) TCWG-1413 / PR83648: missing -Wsuggest-attribute=malloc on a
trivial malloc-like function
ii) TCWG-1414 / PR85817: ICE in expand_call at gcc/calls.c:4291
iii) TCWG-1415 / PR85734: --suggest-attribute=malloc misdiagnoses
static functions
b) Work in progress for:
i) TCWG-125: static cast from float to int not working on ARM hardfp
ii) TCWG-1416 / PR85787: malloc_candidate_p fails to detect malloc
attribute on nested phis
* TCWG-1234: Code hoisting and register pressure (1/10)
i) Looking into Bin Cheng's patches for computing register pressure on GIMPLE
* Misc (1/10)
- Meetings
- Gerrit reviews 25367 and 25371
== Next Week ==
- Continue with GCC bugs
- TCWG-1234
SVE Support ([VIRT-198])
========================
RISU Support for SVE ([VIRT-199])
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- get back to merging/preparing the SVE series :todo
[VIRT-199] https://projects.linaro.org/browse/VIRT-199
SVE Reviews
~~~~~~~~~~~
- reviewed {PATCH 0/9} target/arm: Fixups for ARM_FEATURE_V8_FP16
Message-Id: <20180425012300.14698-1-richard.henderson(a)linaro.org>
SoftFloat Bugs ([VIRT-69])
==========================
- CLOSING NOTE [2018-05-18 Fri 16:41]
I think all known bugs have fixes now merged.
[VIRT-69] https://projects.linaro.org/browse/VIRT-69
Upstream Work ([VIRT-109])
==========================
- catch-up on review queue :todo
- posted {PATCH v4 00/49} fix building of tests/tcg Message-Id:
<20180517174718.10107-1-alex.bennee(a)linaro.org>
- spin v5 and get merged :todo
- posted {PATCH v2 0/2} support reading of CNT{VCT|FRQ}_EL0 from
user-space Message-Id:
<20180518114424.18054-1-alex.bennee(a)linaro.org>
- posted {RFC PATCH 0/2} Travis Stability Patches Message-Id:
<20180518091440.1559-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[a gdb bug] https://sourceware.org/bugzilla/show_bug.cgi?id=23127
Fixing up tests/tcg
~~~~~~~~~~~~~~~~~~~
- posted {PATCH v4 00/49} fix building of tests/tcg Message-Id:
<20180517174718.10107-1-alex.bennee(a)linaro.org>
KVM CI Loop ([VIRT-2])
======================
- need to sync-up on the current state of this work :todo
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
Other Tasks
===========
- Investigate weird QEMU CI OBS build issue :todo
- the OBS build should be failing the RISU tests but isn't, despite
the commit id it reports
- bringing up my SyncQuacer DevBox with Gentoo
- needed one patch for Nouveau w.r.t 32/64 bit PCIE lanes
- needed to manually patch LVM to build initrd Message-Id:
<20180516201903.24309-1-alex.bennee(a)linaro.org>
Completed Reviews [7/7]
=======================
{PATCH v6 0/3} target/arm: Add a dynamic XML-description of the cp-registers to GDB
Message-Id: <1524153386-3550-1-git-send-email-abdallah.bouassida(a)lauterbach.com>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE tested with new gdb - some weirdness on timer register
{PATCH 00/19} softfloat: Clean up NaN handling
Message-Id: <20180511004345.26708-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-11 Fri 20:55]
Found a few minor bugs, rth re-spinning with my float-to-float stuff
{PATCH v4 00/11} target/arm: Fixups for ARM_FEATURE_V8_FP16
Message-Id: <20180512003217.9105-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-15 Tue 11:42]
Despite initial confusion on branch tested fine on both, all good.
{Qemu-devel} {PATCH 0/9} target/arm: Implement v8.1-Atomics
Message-Id: <20180427002651.28356-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-15 Tue 11:43]
Already merged, others have reviewed
{PATCH v2 00/27} softfloat patch roundup
Message-Id: <20180512004311.9299-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-15 Tue 11:45]
v5 released
{PATCH v5 00/28} softfloat patch roundup
Message-Id: <20180514221219.7091-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-15 Tue 15:10]
Looking good.
{PATCH v6 00/28} softfloat patch roundup
Message-Id: <20180515222540.9988-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-18 Fri 16:16]
Merged upstream
Absences
========
- CBG Beer Festival (half day sometime next week)
- VNC18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-arm} {PATCH v3-a 00/27} target/arm: Scalable Vector Extension
Message-Id: <20180516223007.10256-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH} gdbstub: Clarify what gdb_handlesig() is doing
Message-Id: <20180515181958.25837-1-peter.maydell(a)linaro.org>
* {Qemu-devel} {PATCH 0/9} Honor CPU_DUMP_FPU
Message-Id: <20180511035240.4016-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {RFC PATCH v2 00/12} iommu: add MemTxAttrs argument to IOMMU translate function
Message-Id: <CAFEAcA_Dei48HtKk6GnEgXYcXdY2htCXej4pSfY+q9V6f=abdA(a)mail.gmail.com>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v3 00/15} fp-test + hardfloat
Message-Id: <1522883475-27858-1-git-send-email-cota(a)braap.org>
--
Alex Bennée
[Activity]
[TCWG-1319] Link AOSP with LLD.
Closed this out as I've gone as far as I can profitably go without
being an Android expert.
- With trunk LLD I can now link and boot AOSP with LLD without any
use_clang_lld=false on both Arm and AArch64 emulators. I also managed
to get it to boot on a Hikey960 (aarch64).
- Communicated recent additions to LLD in aid of building AOSP, and
extra command line options needed to the Google team.
Landed support for GCC inline assembly constraint S in LLVM.
Some comments on LTO + linker script proposal on llvm-dev mailing list.
Started thinking in more detail about ICF=safe.
- Decided that LLVM was a better place to do this than clang after
attempting to use libtooling.
- There is an existing LLVM pass called merge functions that does what
ICF does but at the LLVM IR level
-- This is off by default, maybe worth looking at as part of LTO and
code-size reductions.
- Started to write a prototype pass that uses
Function::isAddressTaken() although I think that this may give me too
pessimistic a result.
Peter
Progress: [short week, 3 days]
* VIRT-65 [QEMU upstream maintainership]
+ code review
- make system registers visible via gdbstub
- Richard's patches to fix various softfloat issues
* VIRT-164 [improve Cortex-M emulation]
+ MPC emulation:
- rebased and fixed up conflicts with a different series that
touched the same parts of the memory system
- realised that passing txattrs to IOMMUs means we need to
change the notifier API; came up with a plan to handle this
by using "IOMMU indexes" analogous to our existing TCG MMU
indexes. Updated everything to the new API that comes out
of that approach.
- started on tidying up the final loose ends; hope to have
something I can send to the list early next week
thanks
-- PMM
o 3 days off
== Progress ==
o LLVM
* Thumbv8 bot failures:
- Reproduced the issue on TX1
- These test cases need to be disabled for ARM targets (patch on-going).
o Misc
* Various meetings and discussions.
[VIRT-243 # ARMv8.1-Atomic instructions ]
v3 posted and merged.
[Upstream]
(Upgraded my laptop to Fedora 28, which lead to...)
Posted a patch for gcc 8 Werrors.
Posted patches for clang 6 Werrors.
Sent pull for Emilio's TranslateOps patches.
Sent pull for my openrisc decodetree patches.
Sent pull for tcg-next.
Reviewed microblaze patches.
Posted two rounds of softfloat snan patches.
Posted two rounds of fp16 patches.
[VIRT-198 # QEMU: SVE Emulation Support ]
Most of this week's work was on indirectly related patch sets. In particular,
fp16 and atomics. The last round of check-gcc testing had
FAIL: gcc.dg/vect/slp-multitypes-2.c execution test
FAIL: gcc.target/aarch64/advsimd-intrinsics/vldX.c -O0 execution test
FAIL: gcc.target/aarch64/advsimd-intrinsics/vqtbX.c -O0 execution test
as the only remaining (relevant) failures. I believe that the latter two are
generic tcg failures that are cured by this week's tcg-next pull, but have not
yet re-based everything to be sure.
r~
SVE Support ([VIRT-198])
========================
RISU Support for SVE ([VIRT-199])
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- regenerate more half-precision test cases
[VIRT-199] https://projects.linaro.org/browse/VIRT-199
SVE Reviews
~~~~~~~~~~~
- started reviewing {PATCH 0/9} target/arm: Fixups for
ARM_FEATURE_V8_FP16 Message-Id:
<20180425012300.14698-1-richard.henderson(a)linaro.org>
- fixed a couple of other problems testing picked up, see [this
branch]
[this branch] https://github.com/stsquad/qemu/tree/review/rth-fp16-fixes
SoftFloat Bugs ([VIRT-69])
==========================
- posted {PATCH v3 0/5} refactor float-to-float and fix AHP
Message-Id: <20180510094206.15354-1-alex.bennee(a)linaro.org>
- fixes up the current cases, AArch32 is lagging in later rev
support
- rth had a go at a canonical NaN solution
- reviewed {PATCH 00/19} softfloat: Clean up NaN handling Message-Id:
<20180511004345.26708-1-richard.henderson(a)linaro.org>
[VIRT-69] https://projects.linaro.org/browse/VIRT-69
Upstream Work ([VIRT-109])
==========================
- catch-up on review queue :todo
- reviewed {PATCH v6 0/3} target/arm: Add a dynamic XML-description of
the cp-registers to GDB Message-Id:
<1524153386-3550-1-git-send-email-abdallah.bouassida(a)lauterbach.com>
- finished testing - some wierdness with register values
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[a gdb bug] https://sourceware.org/bugzilla/show_bug.cgi?id=23127
Fixing up tests/tcg
~~~~~~~~~~~~~~~~~~~
- posted {PATCH v3 00/46} fix building of tests/tcg Message-Id:
<20180424152405.10304-1-alex.bennee(a)linaro.org>
- series looking pretty good, more comments incoming
- working on [v4 of the series]
[v4 of the series]
https://github.com/stsquad/qemu/tree/testing/tcg-tests-revival-v4
KVM CI Loop ([VIRT-2])
======================
- need to sync-up on the current state of this work :todo
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
Other Tasks
===========
- Investigate weird QEMU CI OBS build issue :todo
- the OBS build should be failing the RISU tests but isn't, despite
the commit id it reports
- bringing up my SyncQuacer, did some serial port debugging to debug
DIMMS
- turns out supported DIMMs are "4GB UDIMM and 16GB RDIMM"
- will need new firmware to get the 16GB UDIMMs working
[ARMv8.2-LPA support] https://projects.linaro.org/browse/TCWG-1395
[ARMv8.2-LVA] https://projects.linaro.org/browse/TCWG-1396
Completed Reviews [5/5]
=======================
{PATCH v6 0/3} target/arm: Add a dynamic XML-description of the cp-registers to GDB
Message-Id: <1524153386-3550-1-git-send-email-abdallah.bouassida(a)lauterbach.com>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE tested with new gdb - some weirdness on timer register
{PATCH 00/19} softfloat: Clean up NaN handling
Message-Id: <20180511004345.26708-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-11 Fri 20:55]
Found a few minor bugs, rth re-spinning with my float-to-float stuff
Absences
========
- Bank Holiday (May 7th)
- VNC18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-devel} {PATCH 0/9} target/arm: Implement v8.1-Atomics
Message-Id: <20180427002651.28356-1-richard.henderson(a)linaro.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {RFC PATCH v2 00/19} reverse debugging
Message-Id: <20180428123627.12445.9923.stgit@pasha-VirtualBox>
* {PATCH 0/2} arm64: Report signal frame size to userspace via auxv
Message-Id: <1525776211-28169-1-git-send-email-Dave.Martin(a)arm.com>
* {Qemu-devel} {PATCH v4 0/4} qemu-thread: support --enable-debug-mutex
Message-Id: <20180423053927.13715-1-peterx(a)redhat.com>
* {PATCH v3 00/15} fp-test + hardfloat
Message-Id: <1522883475-27858-1-git-send-email-cota(a)braap.org>
--
Alex Bennée
4 day week
[TCWG-1236] Android on LLD
Android team have switched to LLD by default for most modules. Looking
to switch over the course of a release.
I've been looking at the list of modules that don't work with LLD and
investigating.
- Sent some patches upstream to add some missing features needed by
Android such as --keep-unique
[Other]
Reviewed some patches for LLD and MC
Sent a patch upstream for support of the "S" constraint in AArch64
inline assembly.
Progress: [short week, 3 days]
* VIRT-65 [QEMU upstream maintainership]
+ code review
- RTH's FP16 bugfixing patchset
- Alex's float-to-float conversion patchset
- fixes to SD card CRC checking
- various minor linux-user cleanups
* VIRT-164 [improve Cortex-M emulation]
+ working on emulation of Memory Protection Controller: have a working
prototype that needs a few loose ends tidied up
thanks
-- PMM
Hi, Maxim
Do we have any build for native aarch64 toolchain GCC 7.3?
I checked snapshots.linaro.org:
https://snapshots.linaro.org/components/toolchain/gcc-linaro/7.3-2018.04/
But it only has x86 versions.
Somebody pinged me from the 96boards community to ask for that. He
asked for GCC 7.3. What being used in ERP 17.12, as I checked, is GCC
6.3.
Thank you very much.
Best regards,
Guodong Xu
Progress:
[Upstream]
* Push tcg patch queue
* Posted v2 of ARMv8.2-FP16 fixes
[VIRT-243 # ARMv8.1-Atomic instructions ]
* Posted v3 of the patch set.
Passes the gcc testsuite.
[VIRT-198 # QEMU: SVE Emulation Support ]
* I now have a set of gcc testsuite failures
that are unequivocally SVE vector issues.
r~
o 2 days off
== Progress ==
o GNU releases
* Some support to MM.
* Monthly snapshots deployed.
o LLVM
* Benchmarking job still on-going
* Investigating Thumbv8 bot failures
o Misc
* Various meetings and discussions.