== Progress ==
* FDPIC
- GCC: send v3 patches, got some feedback: will need another iteration
* GCC upstream validation:
- reported a few regressions
- dealing with some random results, again
* GCC:
- looking at bug report on aarch64 about misaligned accesses. Need
more details to reproduce the problem
* Newlib
- got a few small patches accepted
* misc (conf-calls, meetings, emails, ....)
== Next ==
FDPIC:
- GCC: handle v3 patches feedback
- uclibc-ng: look at how to test fdpic mode with openadk
=== Work done during this past week ===
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ continued cleaning up code and painfully rebased it on recent trunk
* GNU-296 / GCC PR85434 / CVE-2018-12886:
+ fixed changes to routines for PIC access to use specified register
+ fixed 2 more issues in stack protector new instruction patterns
+ testing for arm and thumb2, now starting over due to one of the above issues
* GNU-580 / PR86968: in progress
+ investigate, try 2 approaches, need to start looking into 3rd approach
* Line management.
=== Plan for week 42 ===
* GNU-296 / GCC PR85434 / CVE-2018-12886:
+ finish testing, and submit new stack protector patch for upstream review
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ extend testcase coverage (add tests for latest syntax change and
add more negative testing)
+ finish cleaning up the code
* GNU-580 / PR86968: in progress
+ attempt 3rd approach
* Try to reproduce perf issue mentioned in week #30's weekly report on
latest perf
* Line management:
+ continue progress on rotations
+ start preparing first AFDS
[TCWG-1473] Fix -fno-integrated-as and -mbig-endian (Linux Kernel
Build with clang)
- Needed some revision to handle linker emulation. Patch in upstream review
[TCWG-1474] Fix out of range branch (CBZ) when -fimplicit-it (or
-fno-integrated-as) and certain kinds of inline assembly
- Committed upstream.
[TCWG-1424] Code-size investigations with PGO
- Marking functions for size optimisation at the earliest possible
stage improves code-size for little loss in performance. The main
beneficiary is that loops are not unrolled in size optimised functions
and inline thresholds are lower.
- LTO with instrumented profiling still sees large increase in size.
Originally thought my changes weren't working with LTO but I think
that something else is happening.
-- Found out that the profiling information isn't being sent to the
LTO code-generator (although it should be present as IR annotations
from the objects.
-- There is an option to pass the sample profile through to the LTO
code-generator but not an instrumented profile file.
-- It seems like the LTO plugin doesn't use the new pass manager
unless a separate option is passed through to the code-generator.
-- It seems like Thin-LTO is where most of upstream development is
these days and there is a slightly different pass pipeline, and some
interaction with profiling. Worth some more experiments.
First draft made of incorporating YVR18 Jira discussion into
Confluence https://collaborate.linaro.org/display/TCWG/JIRA+Usage+and+Best+Practices
Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review:
+ Xilinx Versal SoC support
- investigated problem with a "suppress this warning patch" which
gcc 8 didn't like. It turns out that _Pragma() in GCC is a bit
of a disaster area; fortunately we only need to suppress a
warning here for clang, so we can just avoid using _Pragma() with GCC.
(cf GCC bugs 85153, 69558, 82335, 66099, 55578, 69543.
clang is not flawless here either: cf clang bugs 31999, 15129, 35154.
The clang false-positive warning we're working around is bug 39113.)
* VIRT-164 [improve Cortex-M emulation]
- stack-limit emulation patches have now gone into master, so this
epic can be closed out. Some v8M work will continue under
VIRT-268 (notably FP emulation); bugfixing and similar
small work will go under the general VIRT-65 maintainership epic.
* VIRT-215 ["run microvisors", aka support AArch32 Hyp mode]
- working through some of the HCR bits we don't implement, to see
if any of them are the cause of the failures I see with AArch32
hypervisors. (Sadly they don't seem to be.) Sent out patches
implementing HCR.{FB,DC,VI,VF,PTW} and fixing some syndrome
reporting corner cases where AArch32 differs from AArch64.
thanks
-- PMM
[VIRT-249 # SVE System Mode ]
Posted v3 (and hopefully final) patch set for system mode.
[Upstream]
Fixed a problem with softfloat division; 3 versions + pull posted.
Posted v3 of a cleanup to 128-bit atomics.
[GCC]
V2 of the -matomic-ool patch set posted.
r~
o LLVM
* Machine Outliner on ARM prototype:
- Fixed some Thumb2 issues
- Implemented Thumb1 support
- Debugging Thumb1 issues in Spec2K6
* Bots babysitting
o Misc
* Various meetings and discussions.
=== Work done during this past week ===
* One day annual leave
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ started cleaning up code and continued adding support for last syntax tweaks
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ After more testing committed fix for register allocator and
reverted following regression
+ fall back to workaround as register allocator lack information to
decide whether it's safe to not reload an address
+ start testing workaround more extensively
* TCWG-1470 / PR87374: upstream review
+ add missing documentation, improve related code slightly, submit
for external review again
Misc:
+ bits of line management
+ Doughnut session on OSS strategy
+ discussion around JIRA use in TCWG
=== Plan for week 41 ===
* TCWG-1379 / GCC PR85434 / CVE-2018-12886:
+ finish testing, and submit new stack protector patch for upstream review
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ finish change to support last syntax changes
+ extend testcase coverage (add tests for latest syntax change and
add more negative testing)
+ start cleaning up the code
* Try to reproduce perf issue mentioned in week #30's weekly report on
latest perf
* Line management
[TCWG-1473] Fix -fno-integrated-as and -mbig-endian (Linux Kernel
Build with clang)
- Patch in upstream review
[TCWG-1474] Fix out of range branch (CBZ) when -fimplicit-it (or
-fno-integrated-as) and certain kinds of inline assembly
- Patch in upstream review
[TCWG-1424] Code-size investigations with PGO
- Reworked the clang command line options and pass manager interface
so I could insert the pass prior to inlining.
- Benchmarks running over the weekend.
SVE Support ([VIRT-198])
========================
SVE Reviews
- reviewed and tested {PATCH v2 0/4} softfloat: Fix division
Message-Id: <20181003180711.19335-5-richard.henderson(a)linaro.org>
and v3
QEMU Tooling ([VIRT-252])
=========================
[VIRT-252] https://projects.linaro.org/browse/VIRT-252
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
QEMU plugin support ([VIRT-280])
- following discussion with team started adding plugin hooks to
[tracepoint clean-up]
- I think I need to resurrect and expand the cputlb de-macro stuff
to cleanly add memory tracing
- written hotblocks and tlbstats tools
- posted {RFC PATCH 00/21} Trace updates and plugin RFC Message-Id:
<20181005154910.3099-1-alex.bennee(a)linaro.org>
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
[tracepoint clean-up]
https://github.com/stsquad/qemu/tree/misc/dfilter-and-trace-tweaks-v2
Kernel Debug via gdbstub
- There was some discussion about improving debug experience with
kernel debugging
- for example while in KVM a single-step usually goes to the
exception table
- in TCG this isn't always the case (maybe time accounting is
better?)
- follow-up on x86 and kgdb experience :todo
- worth creating a STORY for this work? :todo
Upstream Work ([VIRT-109])
==========================
- started looking at {PATCH 0/7} Acceptance Tests: basic architecture
support Message-Id: <20181004151429.7232-1-crosa(a)redhat.com>
- get the upstream CI back on track :todo
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Other Tasks
===========
- Started drafting the QEMU Keynote/Status report for KVM Forum 2018
Completed Reviews [6/6]
=======================
{PATCH v3 0/3} softfloat tests based on berkeley's testfloat
Message-Id: <20180913213910.28189-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-28 Fri 19:40]
I'm happy with this
{PATCH v2 0/4} softfloat: Fix division
Message-Id: <20181003180711.19335-5-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-10-04 Thu 10:37]
some failures on emilio's tests
{Qemu-devel} {RFC PATCH v2 0/3} acceptance tests: Test firmware checking debug console output
Message-Id: <20181003183036.6716-1-philmd(a)redhat.com>
- CLOSING NOTE [2018-10-04 Thu 15:07]
Still broken for multiarch
{PATCH v2 0/4} per-TLB lock
Message-Id: <20181003200454.18384-1-cota(a)braap.org>
- CLOSING NOTE [2018-10-04 Thu 15:07]
Baring a few compile fixes it looks pretty stable in the soak tests.
{PATCH} fpu/softfloat: Replace countLeadingZeros32/64 with clz32/64
Message-Id: <1538118095-7003-1-git-send-email-thuth(a)redhat.com>
- CLOSING NOTE [2018-10-04 Thu 15:09]
Simple clean-up
{PATCH v3 0/4} softfloat: Fix division
Message-Id: <20181004175700.20847-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-10-05 Fri 16:59]
Looks good
Absences
========
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH 0/7} Acceptance Tests: basic architecture support
Message-Id: <20181004151429.7232-1-crosa(a)redhat.com>
* {Qemu-arm} {PATCH 00/13} target/arm: Implement v8M stack limit checks
Message-Id: <20181002163556.10279-1-peter.maydell(a)linaro.org>
* {Qemu-arm} {PATCH v2 00/15} gdbstub: support for the multiprocess extension
Message-Id: <20181001115704.701-1-luc.michel(a)greensocs.com>
* {Qemu-devel} {PATCH v2 0/9} target/arm: Rely on id regs instead of features
Message-Id: <20180927211322.16118-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH v2 00/15} target/arm: sve system mode patches
Message-Id: <20180926192323.12659-1-richard.henderson(a)linaro.org>
* {Qemu-arm} {PATCH v2 00/15} gdbstub: support for the multiprocess extension
Message-Id: <20181001115704.701-1-luc.michel(a)greensocs.com>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review:
+ bug fixes for aarch64 KVM debug support
+ various patches to avoid deprecated sysbus:init API
+ SVE system emulation support
- investigated a bug where system reset requested by a device
model was sometimes not firing -- seems to be a race condition
* VIRT-164 [improve Cortex-M emulation]
- picked up the half-finished patches for stack-limit emulation that
I'd written before going off on holiday, and completed them.
Sent the patchset out for review.
- sent patches for a couple of other minor bugs noticed in the process
thanks
-- PMM
== Progress ==
* FDPIC
- GCC: handling feedback on v2 patches
* GCC upstream validation:
- reported a few regressions
- dealing with some random results, again
- discussing collaboration with kernel-ci
* Linaro gcc-7 release
- backported fixes for bug #4007
* Newlib
- sent a few small patches to remove warnings when building for Arm and Aarch64
* misc (conf-calls, meetings, emails, ....)
- (internal) Wrote report about GNU Cauldron 2018
== Next ==
FDPIC:
- GCC: send v3 patches feedback
- uclibc-ng: look at how to test fdpic mode with openadk
Progress:
[VIRT-214 # SVE System Registers ]
Posted v2 patch set for eliminating redundancy between
feature bits and id registers.
[VIRT-249 # SVE System Mode ]
Posted v2 patch set, without the system registers included.
[Upstream]
First 3.1 tcg-next pull request.
Spent a day working on Emilo's suggestion to out-line the entire softmmu
load/store operation. I've placed a shed load of small code segments
within the tcg "prologue", which is within a direct call of the entire
code_gen_buffer. Emilio got some performance numbers from that which
look promising. Need to clean up the patch to work with 32-bit and win64.
[GCC]
V1 of my SUSE+ARM inspired -matomic-ool patch set posted. Includes some
significant improvements to atomic operations in the aarch64 backend.
Got some good feedback and am working my way through those.
r~
* Recovery from Cauldron, then from Connect
== Progress ==
* FDPIC
- GCC: handling feedback on v2 patches
* GCC upstream validation:
- reported a few regressions
- dealing with some random results, again
* Linaro gcc-7 release
- backported fixes for bug #4007
* Newlib
- checked warnings emitted by GCC during newlib build, will send small patches
* misc (conf-calls, meetings, emails, ....)
- Attended Linaro Connect YVR18, contributed to report
== Next ==
FDPIC:
- GCC: handle v2 patches feedback
- uclibc-ng: look at how to test fdpic mode with openadk
- look at how to use Linux kernel atomics
o LLVM
* Machine Outliner on ARM prototype:
- Improved stack fixup handling
- Completed Thumb2 support
- Fixed an issue in Thumb and ARM related to conditional execution
* Bots babysitting
o Misc
* Various meetings and discussions.
SVE Support ([VIRT-198])
========================
- generated a [narrow test case for fdiv_64 rounding error]
- doesn't hit much code but I possibly misunderstanding [the code]
AFAICT inc = ((frac & roundeven_mask) != frac_lsbm1 ? frac_lsbm1 :
0); seems reasonable
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[narrow test case for fdiv_64 rounding error]
https://github.com/stsquad/qemu/tree/testing/generic-op-tester
[the code]
https://github.com/stsquad/qemu/blob/testing/generic-op-tester/fpu/softfloa…
QEMU Tooling ([VIRT-252])
=========================
[VIRT-252] https://projects.linaro.org/browse/VIRT-252
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
QEMU plugin support ([VIRT-280])
- following discussion with team started adding plugin hooks to
[tracepoint clean-up]
- I think I need to resurrect and expand the cputlb de-macro stuff
to cleanly add memory tracing
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
[tracepoint clean-up]
https://github.com/stsquad/qemu/tree/misc/dfilter-and-trace-tweaks-v2
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v1 0/4} fixes for kvm/arm64 guest debug Message-Id:
<20180926112048.17778-1-alex.bennee(a)linaro.org>
- posted {PATCH} cpus: fix TCG kick timer leak Message-Id:
<20180927171724.30128-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Other Tasks
===========
- Administrava
- sorted out expenses for Connect
- organising travel/accommodation for KVM Forum 2018
Completed Reviews [1/1]
=======================
{PATCH v3 0/3} softfloat tests based on berkeley's testfloat
Message-Id: <20180913213910.28189-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-28 Fri 19:40]
I'm happy with this
Absences
========
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-devel} {RFC PATCH 00/13} target/arm: Derive cpu id regs from features
Message-Id: <20180915161738.25257-1-richard.henderson(a)linaro.org>
* {PATCH 00/20} target/arm: sve system mode patches
Message-Id: <20180809042206.15726-1-richard.henderson(a)linaro.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {RFC PATCH v2 00/23} KVM: arm64: Initial support for SVE guests
Message-Id: <1538141967-15375-1-git-send-email-Dave.Martin(a)arm.com>
* {PATCH 00/35} exec: drop BQL from interrupt handling
Message-Id: <20180917163103.6113-1-cota(a)braap.org>
* {PATCH v3 00/13} i386 + x86_64 mttcg
Message-Id: <20180911202823.21657-1-cota(a)braap.org>
--
Alex Bennée
[Connect]
Wrote up Connect Report with notes of presentations and hack-rooms,
for better or worse we have 20 pages of notes.
Wrote up Jira discussion
[TCWG-1468]
Made an example of how to use cmake, clang, newlib and a gcc-embedded
toolchain to build an example and run it on qemu.
[TCWG-1473] Linux kernel big-endian builds
Nearly have a fix that I'm happy with ready to submit.
[TCWG-1471] Fix the Armv6 Linux kernel build
Committed upstream today.
=== Work done during these past 3 weeks ===
* DSGHACK-25 (Support arithmetic on FileCheck regex variable):
+ all my tests pass, started to implement further minor changes to the syntax
* PR87374: external review
+ investigate bug, write patch, test it and send for external review
* GCC PR85434 / CVE-2018-12886: rework needed
+ Approved upstream but found when doing last minute testing after rebase
+ Testing on a wide number of targets a patch to register allocator
to properly ignore some operand when told to
* Linaro Connect Vancouver 2018
+ prepare talk, attend event and write up reports
* Regression testing of LLVM release:
+ extend script to do a LLVM release to be able to build from an
arbitrary branch
+ make weekly regression build from trunk
+ fix here-doc in regression job to test release when scripts it use change
Misc:
+ bits of line management
+ catching up on emails
=== Plan for week 40 ===
* GCC PR85434 / CVE-2018-12886:
+ finish testing, and get both register allocator fix and stack
protector fix committed
* PR87374: external review
+ add documentation and send back for external review
* DSGHACK-25 (Support arithmetic on FileCheck regex variable):
+ finish change to suport last syntax changes
+ extend testcase coverage (add tests for latest syntax change and
add more negative testing)
+ start cleaning up the code
* Try to reproduce perf issue mentioned in week #30's weekly report on
latest perf
* Line management
Progress:
* Post-travel/holiday catchup (email, expenses claims, code review,
team meetings etc)
(this was the lion's share of the time)
* VIRT-65 [QEMU upstream maintainership]
- some patches to fix clang warnings about taking the
address of a field in a packed struct
- make the compatibility "virt-2.10" machine really behave like the 2.10
QEMU's virt board: don't generate external aborts for accesses to bad
physical addresses. (It turns out a few misconfigured Linux
kernels do this.)
- noticed that we only have another 40 or so devices to convert
to be able to complete an API transition (sysbus init methods):
wrote this up for the list to nudge people into doing some conversions
thanks
-- PMM
Progress:
This week was Linaro Connect (Vancouver). Recordings are
online for most sessions I think; some may still be in the
process of being uploaded. For other presentations see:
https://connect.linaro.org/resources/yvr18/
Interesting presentations:
* "My other Machine is Virtual"
-- Alex's talk summarising QEMU's current tracing/debug facilities:
https://connect.linaro.org/resources/yvr18/yvr18-118/
* "SBSA QEMU"
-- Summary of work on an "enterprise" model in QEMU intended for use
as a development platform for firmware and other lower-level code.
https://connect.linaro.org/resources/yvr18/yvr18-511/
* "How to build a C++ processing tool using the clang libraries"
-- Peter Smith doing a fast pass through the clang library APIs
you can use for refactoring-type tools that operate on C++ source.
Watch the talk to figure out if this is something you want to
do at all; read the slides separately for the fine detail and
links to where to find more info, if the answer is "yes"...
https://connect.linaro.org/resources/yvr18/yvr18-223/
* "Diary of a drive-by coder: tips and tricks for working with upstream"
-- James Bottomley talks about successes and failures in upstreaming
one-off patches if you're not a member of the community. I also
asked in the Q&A about what communities can do to make life
easier for such contributors (answer mostly revolved around
better and clearer communication about the chances of a change
being accepted)
https://connect.linaro.org/resources/yvr18/yvr18-503/
* "An open source developer and a lawyer walk into a bar..."
-- Jilayne Lovejoy's keynote
(Personal takeaway: try to reduce my use of "IANAL, but...".)
https://connect.linaro.org/resources/yvr18/yvr18-200k2/
* Fujitsu's keynote on their new A64FX CPU:
https://connect.linaro.org/resources/yvr18/yvr18-400k1/
* Arm Architecture Enhancements in 2018
Matt Gretton-Dann's presentation of ARM v8A 8.5 features.
I was particularly encouraged to see that Arm have been able
to make public the system register and ISA XML on the same day
they announce the new features publicly.
https://connect.linaro.org/resources/yvr18/yvr18-104/
Useful meetings:
* discussion with RTH about handling CPU ID register fields
vs internal QEMU "enable this feature" bits (we have a bit of
an ugly mix of specifying the same thing in both places, and
also overriding ID reg fields from feature bits in some cases;
we'd like to achieve a bit more consistency in what we do...)
* discussion with RTH/Alex on instrumentation plugin APIs. I hope
we're now more or less on the same page about the general principles.
* QEMU roadmap sync with Alex/RTH/Maxim:
- finish v8M work
- heterogenous CPU support (for Musca board emulation)
- finish SVE
- fill in other v8.x missing emulation support
- instrumentation work
Other:
* Greensocs have sent out some QEMU patches to do with
modelling clock trees, which also touch a bit on reset.
QEMU's modelling of reset at the moment is pretty terrible,
so I had a think about how we might manage to do it better.
(Notably we currently only model power-on reset, and we don't
have a good answer for "device A in reset wants to assert a
signal that connects to device B, but there's no guarantee
about what order A and B will reset in". Does anybody know of
any good existing treatments of modelling device reset ?)
thanks
-- PMM
o LLVM
* Buildbots babysitting:
- Investigating armv7 bots failures, having hard time to reproduce the issue
* Machine Outliner on ARM prototype:
- worked on LTO integration
- more stack fixups to handle
o Misc
* Various meetings and discussions.
QEMU Tooling ([VIRT-252])
=========================
- thoughts after reviewing {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary
instrumentation prototype Message-Id:
<152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
- we want rich tooling but don't want to leak internals to plugins
- the proposed helper per insn is pretty limited/hacky
- I think we could expand exiting trace support with plugins
- plugin hook to trace points
- plugin either filters trace points or does in-situ analysis
- existing trace infrastructure used to export data
[VIRT-252] https://projects.linaro.org/browse/VIRT-252
Upstream Work ([VIRT-109])
==========================
- investigating CI failure in master:
- The [Travis builds have been broken for a while]
- meanwhile it looks like [atomic_8 issues have broken 32 bit
builds]
- reviewed {PATCH 0/6} i386 + x86_64 mttcg Message-Id:
<20180903171831.15446-1-cota(a)braap.org>
- posted {RFC PATCH 0/4} Add Nios II cross-compiler and enable
tests/tcg Message-Id:
<8346c1bb-9cb6-4c08-66a2-b5e5a31903d4(a)vivier.eu>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[Travis builds have been broken for a while]
https://travis-ci.org/qemu/qemu/builds
[atomic_8 issues have broken 32 bit builds]
https://app.shippable.com/github/qemu/qemu/dashboard
Other Tasks
===========
- Continued working on "My Other Machine is Virtual" talk for YVR18
- finished main talk, iterating and practising now
- also made a few [fixes and enhacements for tlb tracking]
- Administrava
- caught up with expense claims for SynQuacer
- organising for KVM Forum 2018
- organising/travel to Connect
[fixes and enhacements for tlb tracking]
https://github.com/stsquad/qemu/tree/misc/dfilter-and-trace-tweaks-v2
Completed Reviews [4/4]
=======================
{PATCH 0/6} target/arm: More sve-ish fixes
Message-Id: <20180810193129.1556-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-09-07 Fri 16:36]
Already in target-arm.next
{Qemu-devel} {PATCH 0/3} synchronization profiler
Message-Id: <20180813171132.21939-3-cota(a)braap.org>
- CLOSING NOTE [2018-09-07 Fri 17:41]
Already merged
{PATCH 0/6} i386 + x86_64 mttcg
Message-Id: <20180903171831.15446-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-10 Mon 10:18]
Quick pass, looks OK but a question about __thread w.r.t tcg globals
{PATCH v2 0/2} softfloat tests based on berkeley's testfloat
Message-Id: <20180908191735.22861-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-10 Mon 12:27]
Looks like an improvement on IBM test suite but needs a few more
tweaks.
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH v3 0/3} softfloat tests based on berkeley's testfloat
Message-Id: <20180913213910.28189-1-cota(a)braap.org>
* {PATCH v3 00/13} i386 + x86_64 mttcg
Message-Id: <20180911202823.21657-1-cota(a)braap.org>
* {PATCH v6 00/25} Fixing record/replay and adding reverse debugging
Message-Id: <20180912081747.3228.21861.stgit@pasha-VirtualBox>
* {Qemu-devel} {PATCH v2 00/11} convert CPU list to RCU
Message-Id: <374f82bc-1680-a59d-aa71-31e88e4936a2(a)redhat.com>
* {Qemu-arm} {PATCH 00/15} gdbstub: support for the multiprocess extension
Message-Id: <20180901124639.19735-1-luc.michel(a)greensocs.com>
* {Qemu-devel} {PATCH v4 0/5} Acceptance/functional tests
Message-Id: <20180530184156.15634-1-crosa(a)redhat.com>
--
Alex Bennée
Last week:
Holiday.
3 days at GNU Cauldron. Highlights:
* Talked with arm folk re the sve simd abi,
* Talked with arm folk re valgrind support for sve,
* Talked with riscv folk re their nascent vector extension,
* Peter Sewell's memory object semantics for defacto c.
This week:
Caught up on email backlog.
Queued a few patch sets for first 3.1 tcg-next pull.
Posted an rfc for adjusting arm id system regs vs feature bits.
r~
Hi Mathias,
I am not able to reproduce error in
https://objectstorage.prodstack4-5.canonical.com/v1/AUTH_77e2ada1e7a84929a7…
Do you have any instructions for reproducing it locally.
This is what I have done:
Downloaded https://www.python.org/ftp/python/2.7.4/Python-2.7.4.tgz
Applied following patch to build for aarch64:
diff -r 84cef4f1999a -r 05e8999a3901 Modules/_ctypes/libffi/fficonfig.py.in
--- a/Modules/_ctypes/libffi/fficonfig.py.in Mon Apr 29 16:09:39 2013 -0400
+++ b/Modules/_ctypes/libffi/fficonfig.py.in Tue Apr 30 01:00:34 2013 +0200
@@ -28,6 +28,7 @@
'PA': ['src/pa/linux.S', 'src/pa/ffi.c'],
'PA_LINUX': ['src/pa/linux.S', 'src/pa/ffi.c'],
'PA_HPUX': ['src/pa/hpux32.S', 'src/pa/ffi.c'],
+ 'AARCH64' : ['src/aarch64/ffi.c', 'src/aarch64/sysv.S'],
}
ffi_sources += ffi_platforms['@TARGET@']
./configure
Also tried ./configure --enable-pydebug and --disable-optimization
Also tried changing to -O0 manually in the make file
make
./python Lib/test/regrtest.py -v test_ctypes
Used gcc version 8.2.1 20180907 (GCC)
Results are OK.
Thanks,
Kugan
o LLVM
* Buildbots babysitting
* LLVM Kernel CI babysitting
* Machine Outliner on ARM prototype still on-going
o Misc
* More Jira gardening
* Various meetings and discussions.
Upstream Work ([VIRT-109])
==========================
- reviewed {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation
prototype Message-Id:
<152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
- reviewed {PATCH 0/6} qht improvements for 3.1 Message-Id:
<20180817232923.28899-1-cota(a)braap.org>
- investigating CI failure in master:
- The [Travis builds have been broken for a while]
- meanwhile it looks like [atomic_8 issues have broken 32 bit
builds]
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[Travis builds have been broken for a while]
https://travis-ci.org/qemu/qemu/builds
[atomic_8 issues have broken 32 bit builds]
https://app.shippable.com/github/qemu/qemu/dashboard
Other Tasks
===========
- Continued working on "My Other Machine is Virtual" talk for YVR18
- finished main talk, iterating and practising now
- also made a few [fixes and enhacements for tlb tracking]
- Administrava
- caught up with expense claims for SynQuacer
- organising for KVM Forum 2018
[fixes and enhacements for tlb tracking]
https://github.com/stsquad/qemu/tree/misc/dfilter-and-trace-tweaks-v2
Completed Reviews [2/2]
=======================
{Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
- CLOSING NOTE [2018-09-07 Fri 15:40]
Some interesting ideas but I think the interface needs to be a bit
richer and expose the tcg code generation to the plugins.
{PATCH 0/6} qht improvements for 3.1
Message-Id: <20180817232923.28899-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-07 Fri 16:35]
Good improvements to test coverage, one minor tweak needed
{PATCH 0/6} target/arm: More sve-ish fixes
Message-Id: <20180810193129.1556-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-09-07 Fri 16:36]
Already in target-arm.next
{Qemu-devel} {PATCH 0/3} synchronization profiler
Message-Id: <20180813171132.21939-3-cota(a)braap.org>
- CLOSING NOTE [2018-09-07 Fri 17:41]
Already merged
Absences
========
- Holiday (16th-28th August 2018)
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-arm} {PATCH 00/15} gdbstub: support for the multiprocess extension
Message-Id: <20180901124639.19735-1-luc.michel(a)greensocs.com>
* {PATCH 0/6} i386 + x86_64 mttcg
Message-Id: <20180903171831.15446-1-cota(a)braap.org>
* {Qemu-devel} {PATCH v4 0/5} Acceptance/functional tests
Message-Id: <20180530184156.15634-1-crosa(a)redhat.com>
* {Qemu-arm} {PATCH 00/10} target/arm: Some pieces of support for 32-bit Hyp mode
Message-Id: <20180814124254.5229-1-peter.maydell(a)linaro.org>
* {PATCH 00/20} target/arm: sve system mode patches
Message-Id: <20180809042206.15726-1-richard.henderson(a)linaro.org>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
--
Alex Bennée
[Linaro Connect]
- Wrote my presentation for the official track (on using Clang
libtooling and ASTMatchers)
- Started working on hackroom presentation on profile guided
optimisation in LLVM.
In both cases writing a presentation on something you don't know much
about forces you do a lot of learning.
Plans for next week:
- Finish hackroom presentation.
Spare time will be spent on reviews and llvm/clang bugs
=== Work done during this 3-day week ===
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ continue to rework patch, feature complete and most testcase pass
+ sent another external email to hammer a few details
* Arm new starter welcome and related faff
* GNU Tools Cauldron + travel from Thursday to Sunday
=== Plan for week 37 ===
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ fix last bugs, start testing and cleanup
* Try to reproduce perf issue mentioned in week #30's weekly report on
latest perf
* One day off
o LLVM
* Machine Outliner on ARM prototype:
- fixup and testcases work still on-going
- first benchmark results
* Buildbots babysitting
o Misc
* More Jira gardening
* Various meetings and discussions.
Other Tasks
===========
- Continued working on "My Other Machine is Virtual" talk for YVR18
- got working heatmaps for coverage
- writing up TCG memory tracing
Absences
========
- Holiday (16th-28th August 2018)
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH 0/6} qht improvements for 3.1
Message-Id: <20180817232923.28899-1-cota(a)braap.org>
* {Qemu-devel} {PATCH 0/3} synchronization profiler
Message-Id: <20180813171132.21939-3-cota(a)braap.org>
* {PATCH 0/6} target/arm: More sve-ish fixes
Message-Id: <20180810193129.1556-1-richard.henderson(a)linaro.org>
* {Qemu-arm} {PATCH 00/10} target/arm: Some pieces of support for 32-bit Hyp mode
Message-Id: <20180814124254.5229-1-peter.maydell(a)linaro.org>
* {PATCH 00/20} target/arm: sve system mode patches
Message-Id: <20180809042206.15726-1-richard.henderson(a)linaro.org>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
--
Alex Bennée
* very short week: off Monday/Tuesday
== Progress ==
* FDPIC
- uClibc-ng: patches committed upstream
- GCC: handling feedback on v2 patches
* GCC upstream validation:
- trunk build broken for a while on RHEL6 (gcc-4.4.7)
- fixed upstream just before I reported the problem
- my scripts now use gcc-5.4.0
* misc (conf-calls, meetings, emails, ....)
- book hotel/plane for GNU Cauldron and Connect
== Next ==
FDPIC:
- GCC: handle v2 patches feedback
- uclibc-ng: look at how to test fdpic mode with openadk
- Connect: prepare hacking room presentation
- GNU Cauldron 2018
=== Work done during this week ===
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ finished testing and submitted for external review
* TCWG-1428 (Support arithmetic on FileCheck regex variable): address comments
+ continue to rework patch
* Regression testing of LLVM release process:
+ Add support to build from a branch (incl. trunk)
+ Make weekly regression testing from trunk
+ start enabling regression testing of Linaro LLVM release process
when scripts it use change
* Prepare for becoming a line manager next week
=== Plan for week 36 ===
* Welcome new starter
* Finish enabling regression testing of Linaro LLVM release process
when scripts it use change
* DSGHACK-25 (Support arithmetic on FileCheck regex variable): address comments
+ continue to rework patch
* Try to reproduce perf issue mentioned in week #30s weekly report on
latest perf
[VIRT-249 # SVE system mode emulation ]
Fixed a bug in last week's reorg, reported by Laurent.
Fixed a bug in our risu scripts for generating sve memory ops;
I was able to replicate Laurent's failure in risu, finally, and
then fix it. Still need to clean up the risu patch for submission.
[Upstream]
Reviewed mips mxu tcg patch set.
Reviewed s390 afp tcg patch set.
r~
== This Week ==
* TCWG-1234: Hoisting and register pressure (4/10)
- Came up with another heuristic to avoid spill
- Verified it does not regress other test-cases (testsuite + private benchmarks)
* TCWG-319: Use vrecpe / vrecps to implement division (1/10)
- Rebased patch and validated it
- Seems like the issue of bad data alignment is also now seen with
armhf. Investigating
it further.
* PR83661 (2/10)
- Finished with patch prototype
* Public Holiday (2/10)
* Misc (1/10)
- Committed a typo fix in r263819
- Meetings
== Next Week ==
- Continue ongoing tasks
o LLVM
* Machine Outliner on ARM prototype:
- stack fixup support on-going
- test coverage in machine IR
* Buildbots babysitting
o Misc
* Jira gardening
* Various meetings and discussions.
[VIRT-198 # QEMU: SVE Emulation Support ]
Adjusted patch set based on Peter's review and upstreaming.
We talked about a method to initialize cpu config registers.
[Upstream]
Review:
nanomips round 11, now mostly pushed to master.
MPS2 patch set
raspi frame buffer patch set
Partway through a round 6 of the do_syscall split.
r~
Investigated yet another sanitizer related buildbot failure. This time
it looks like latent problems in the compiler-rt/cfi implementation
and tests provoked by the introduction of the Arm LLD bot.
- cfi requires LTO so it requires a bot using LLD or a bot configured
to run gold with the LTO plugin. Raised upstream PR on cfi.
[Linaro Connect]
Made some more progress on a clang-tool example to use for my
presentation on how to build a clang tool. Learned quite a bit more
about ast-matchers and the clang-ast.
[LLD]
Committed support for Armv5 and Armv6 in LLD.
[Miscellaneous]
Quite a heavy patch review week.
Planned absences:
On holiday on Tuesday
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ put some reviewed MPS device patches into master, did a v2 of the
rest and sent them out again; these are now in master
+ ditto with patches for missing AArch32-Hyp features
+ code review:
- rth's patchset fixing float/int-with-scaling conversion
- rth's patchset adding system mode support for SVE
- linux-user: netlink fixes
+ sent out a patchset that wires up the GICv2 virtualization
memory regions and IRQs on the remaining boards that need it;
got this into master
thanks
-- PMM
Note: annual leave tomorrow and Friday, as per my calendar
=== Work done during 3-day week ===
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ fix 2 more issues with retesting each time
* More knowledge transfer within Arm (writing a script to automate manual
task in GNU Arm Embedded Toolchain release to allow others to do it)
* TCWG-1428 / DSGHACK-25 (Support arithmetic on FileCheck regex variable):
address comments
+ continue to rework patch
* Enable weekly regression testing of LLVM release process jenkins job
* 2 days off annual leave
=== Plan for week 35 ===
* Enable regression testing of Linaro LLVM release process when scripts it
use change
* TCWG-1428 / DSGHACK-25 (Support arithmetic on FileCheck regex variable):
address comments
+ continue to rework patch
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ submit for external review
* Try to reproduce perf issue mentioned in week #30s weekly report on
latest perf
[VIRT-198 # QEMU: SVE Emulation Support ]
Fixed a double-rounding bug affecting scaled conversion
from integer to float.
[Upstream]
Posted a proposed fix for 128-bit atomic detection.
Posted v4 of linux-user syscall split.
Review of nanomips, round 9.
r~
* One day off
o GNU
* Committed Linaro version string and macros patch in ARM GCC 8 vendor branch
o LLVM
* libcxxabi exception address alignment test failure:
- Committed in trunk and merged into 7.0 branch
* Machine Outliner on ARM prototype:
- LR saving and stack fixup support on-going
* Buildbots babysitting
o Misc
* Jira gardening
* Various meetings and discussions.
Note: I'll be on holidays Thursday and Friday next week.
=== Work done during 3-day week ===
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ heavy testing
* TCWG-1337 / LLVM PR34170: get backport to LLVM 7 branch
* create design review for -mfpu=auto option in GAS
-> https://confluence.arm.com/display/CTP/Auto+FPU+for+GNU+as
* Knowledge transfer within Arm
* Misc:
+ GCC Linaro sync
* 2 days off taking care of my feverish child
=== Plan for week 34 ===
* Enable regression testing of Linaro release process
* TCWG-1428 (Support arithmetic on FileCheck regex variable): address
comments
+ continue to rework patch
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ investigate aarch64 glibc regression
* Try to reproduce perf issue mentioned in week #30s weekly report on
latest perf
4 day week, out on holiday Wednesday.
[TCWG Jira]
- Recommendations made on what to do with outstanding epics.
- Will be making the changes on Monday.
[Linaro Connect]
- Research for presentation on libtooling.
- Outline of presentation written and made a start on the first of the examples.
- Will be doing a further presentation in the hack-room on LLVM
profiling and code-size
Involved in more than the usual amount of reviews.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ got 3.0 release out of the door!
+ code review:
- lots of Cortex-M0 and micro:bit patches
- model of Freescale i.MX6 UltraLite 14x14 EVK Board
- hw/arm: make bitbanded IO optional on ARMv7-M
- imx_spi: Unset XCH when TX FIFO becomes empty
- hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj()
- imx_serial: Generate interrupt on receive data ready if enabled
- target/arm: Fix crash on conditional instr in it block
- supporting migration of pending-SError state in KVM
+ sent a patchset deleting the now-obsolete MMIO request_ptr APIs
+ some tidyup of JIRA issues
+ trying to add a SPARC box back into our build-and-test set
thanks
-- PMM
Hi, dear toolchain team
I'm working on a Cavium ThunderX and want to install the latest Linaro binary release 7.3.1, but it seems no aarch64 native binaries in https://releases.linaro.org/components/toolchain/binaries/latest/aarch64-li…
Can you help on this, thanks very much!
Best Regards, Yi
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
SVE Support ([VIRT-198])
========================
- looked at re-factoring fcvt tests to add tests for rth's recent
fixes
- see [my initial test branch]
- the idea is to make adding a new op test case minimal effort
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[my initial test branch]
https://github.com/stsquad/qemu/tree/testing/generic-op-tester
Other Tasks
===========
- Started working on "My Other Machine is Virtual" talk for YVR18
- use-case: find hot-block in pure CPU code
- use-case: trace disk activity on system boot
- Added another story to the [Instrumentation EPIC]
[Instrumentation EPIC] https://projects.linaro.org/browse/TCWG-1457
Absences
========
- Holiday (16th-28th August 2018)
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-devel} {PATCH 0/3} synchronization profiler
Message-Id: <20180813171132.21939-3-cota(a)braap.org>
* {PATCH 0/6} target/arm: More sve-ish fixes
Message-Id: <20180810193129.1556-1-richard.henderson(a)linaro.org>
* {Qemu-arm} {PATCH 00/10} target/arm: Some pieces of support for 32-bit Hyp mode
Message-Id: <20180814124254.5229-1-peter.maydell(a)linaro.org>
* {PATCH 00/20} target/arm: sve system mode patches
Message-Id: <20180809042206.15726-1-richard.henderson(a)linaro.org>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {PATCH 0/5} tests/vm: Improvements when KVM is not available
Message-Id: <20180717024827.27897-1-f4bug(a)amsat.org>
--
Alex Bennée
o GNU
* Submitted Linaro version string and macros patch for ARM GCC 8 vendor branch
o LLVM
* Built LLVM 7.0.0 RC1 ARM and AArch64 binaries
* Investigate infra issues with release builds
* libcxxabi exception address alignment test failure:
- Added some comments to help the review
* Machine Outliner on ARM prototype:
- Implemented saving LR in a register support
o Misc
* Various meetings and discussions.
[VIRT-198 # QEMU: SVE Emulation Support ]
Fixed a dozen-ish bugs pointed out by Laurent in direct email.
Reorganized the patch set, squashing !fixup; posted everything.
r~