The Linaro Binary Toolchain
============================
The Linaro GCC 7.1-2017.08-rc1 Release-Candidate is now available.
*Notice*: GCC 7.1 ABI change for arm*-*-* targets, and note for
aarch64*-*-* targets
>From GCC 7.1 release notes:
On ARM targets (arm*-*-*), a bug introduced in GCC 5 that affects
conformance to the procedure call standard (AAPCS) has been fixed. The
bug affects some C++ code where class objects are passed by value to
functions and could result in incorrect or inconsistent code being
generated. This is an ABI change. If the option -Wpsabi is enabled (on
by default) the compiler will emit a diagnostic note for code that
might be affected.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
GCC 5 and GCC 6 releases will continue to be affected by the ABI bug,
since changing ABI in these releases is not practical. A warning
enabled by -Wpsabi option was added to GCC 5 and GCC 6 toolchains to
diagnose codebases that might be affected by the ABI bug.
Additionally, this same bug was present in AArch64 backend in
development versions of GCC 7. There was no releases of GCC with this
bug present in AArch64 backend, therefore the release notes does not
mention this. However, be advised that any code bases built with
development versions of GCC 7 need to be recompiled with released
version of GCC 7 to conform to ABI.
For an explanation of GCC 7 series changes please see the following
website:
https://gcc.gnu.org/gcc-7/changes.html
For help in porting to GCC 7 please see the following explanation:
https://gcc.gnu.org/gcc-7/porting_to.html
Download release-candidate packages from:
(sources)
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.08-rc1/
(binaries)
http://snapshots.linaro.org/components/toolchain/binaries/7.1-2017.08-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and AArch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 7.1-2017.08-rc1
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.08-rc1/
FSF glibc 2.25 (release/2.25)
https://lists.gnu.org/archive/html/info-gnu/2017-02/msg00002.html
Newlib 2.5 (newlib-2_5_0 tag)
https://sourceware.org/ml/newlib/2016/msg01191.html
GNU Binutils 2.28 (linaro-local/linaro_binutils-2_28-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
FSF GDB 8.0 (gdb-8.0-branch)
https://sourceware.org/ml/gdb-announce/2017/msg00003.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 7 (as of Linaro GCC 7.1-2017.08-rc1)
===========================[ANNOUNCE] Linaro Binary Toolchain
Release-Candidate GCC 7.1-2017.08-rc1=======================
* The Linaro GCC 7.1-2017.07 snapshot added prefetching configuration
improvement for AArch64 targets and laid groundwork to enabling
prefetching in more cases.
* Previous MinGW hosted version of Linaro GCC C preprocessor failed to
convert character set used for string, character constants, etc. This
is fixed in this release.
Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8.
https://bugs.linaro.org/show_bug.cgi?id=3040
* Performance related backports from the following snapshots have been
included: Linaro GCC 7.1-2017.05, Linaro GCC 7.1-2017.06 and Linaro
GCC 7.1-2017.07.
# Progress #
* TCWG-1159,New design of GDB/GDBserver target description. [3/10]
Patches are still not reviewed. Keep going to change x86 target
descriptions. Post two patches to clean up them first.
* TCWG-561, Handle unavailable memory during frame unwinding. [3/10]
Patches are posted.
* PR 21818, GDB crashes with executable for armv5te. [1/10]
Patch is tested, and to be posted.
* Upstream review, [2/10]
** ADI patches review, advice on how to match the output in gdb tests,
** Some disassembly regression caused by my previous patches,
** Help people to triage their GDB issues because I don't have the env
to reproduce them.
* Misc, [1/10]
# Plan #
* TCWG-1162, Test GDB+OpenOCD with AArch64 boards.
Post my newlib patches upstream, and continue to test with
QEMU and OpenOCD respectively.
* TCWG-1159, New design of GDB/GDBserver target description
--
Yao Qi
o Back from vacation Wednesday.
== Progress ==
o Linaro GCC/Validation
* Discussed/checked needs for newlib and binutils to include in binaries
* Preparing RCs (release notes, ...)
* pinged my unreviewed upstream patches
* reviewed infra patches
o Misc
* Various meetings and discussions.
== Plan ==
o 2017.08 GCC 6 and 7 release candidates, backports, ...
== This Week ==
* malloc propagation (4/10)
- Resolved bootstrap comparison failure
- Patch passes validation with and without LTO.
- Working on handling indirect calls.
* type promotion (3/10)
- Created patche for resolving ICE with armv3/armv5t.
- Have got a hack-ish patch to address interference between type promotion and
widening_mul/bswap optimizations, but needs improvement.
* Misc (3/10)
- Meetings
- Visa interview
== Next Week ==
- Continue with malloc propagation, type promotion
# Progress #
* TCWG-1159,New design of GDB/GDBserver target description. [3/10]
Looks people who can review my patches is on holiday, so I committed
7 patches and leave the rest 19 patches there. Need to think about
how to make people more confident on these patches.
* PR 21717, PR 21555, fixed. Pushed to master and 8.0 branch.
[1/10]
* TCWG-1162, Test GDB+OpenOCD with AArch64 boards. [3/10]
I can run gdb regression tests with OpenOCD on HiKey. After I power
cycle the board, the first several tests can run, but the following
tests failed because the board goes to an odd state. Something wrong
in OpenOCD side.
Try GDB aarch64 bare-metal debugging with QEMU, and then find a bug
in newlib which doesn't initialize FPU, so some FPU instruction will
trigger und exception.
* TCWG-561, Handle unavailable memory during frame unwinding. [2/10]
Lear C++ move assignment and move constructor. Finish the code, and
testing the patches.
* Send my GDB target description talk abstract to Linaro SFO17.
* Misc [1/10]
# Plan #
* Mon and Tue off.
* TCWG-561, TCWG-1159.
--
Yao Qi
4 day week.
[TCWG-614] Range Extension Thunks
- Rebased due to upstream refactoring
- Pinged but no upstream review progress
[Compiler-rt]
Clang no longer always uses base PCS for all the builtins it expands
such as the _Complex helpers.
- Added tests to make sure RTABI 4.1.2 Floating Point helpers all use
softfp in Clang D35538 and llvm D35904.
- Reviewer pointed out useful script update_llc_test_checks.py that
can simplify writing of llc tests. Well worth checking out
[LLD]
Looks like lld use in Android may be becoming more likely, major
blocking feature is lack of Cortex-A53 erratum fix 843419.
- I've commented on the upstream PR https://bugs.llvm.org/show_bug.cgi?id=33463
- I've written some test cases and have started a prototype implementation
Submitted Linaro Connect presentation proposal for Functional Safety
and Development tools.
Plans:
In priority order:
- range extension thunks
- Cortex-A53 843419
- Compiler-rt
== Progress ==
* TCWG-1205 - Minor tweaks to Jenkins LLVM jobs [1/10]
- Sent a few patches to make the Jenkins jobs more friendly and/or
fix them for new changes in the upstream release script
* TCWG-1206 - Investigate timeouts on buildbots [1/10]
- Had some mysterious timeouts on some of the buildbots
- Didn't manage to reproduce, will keep an eye out in case it happens again
* TCWG-1199, 1200 - LLVM 5.0.0 for ARM and AArch64 [1/10]
- RC1 is out, there are some failures in some libunwind and
sanitizer tests; reported upstream
* TCWG-1194 - [ARM GlobalISel] Support simple, static globals [4/10]
- Committed some simple stuff and sent a patch for upstream review
* TCWG-1209 - [MIR] Print ARM constant pools [1/10]
- Printing target-specific constant pools is trivial, but testing is
a bit problematic
- All current MIR tests read in and then print out the same MIR,
which means that we'd have to add support for target-specific constant
pools in the parser as well
- This is complicated by the fact that at a first glance the parser
doesn't seem to handle any other target-specific stuff and I'm not
sure it's ok to pull ARMConstantPool into it
* Misc [2/10]
- Mailing lists, code reviews, meetings
== Plan ==
* Figure out what to do about TCWG-1209
* More code reviews and global isel
# Progress #
* TCWG-1159,New design of GDB/GDBserver target description. [1/10]
Commit one patch of v3. No review comments. Usually it means I don't
review patches, so other people don't review my patches.
* PR 21555. [3/10]
Think it again, and fix it with a better approach. Patches are posted.
* PR 21717. [2/10]
Fix a bug on getting/setting FPSCR on VFPv2. I am surprised that we don't
find it before. Testing patches.
* TCWG-1162, Test GDB+OpenOCD with AArch64 boards. [1/10]
Blocked by OpenOCD bugs. Chat with OpenOCD maintainer to make sure
these bugs are opened in the right place.
* TCWG-561, [3/10]
I finish the patches, but not confident because I use copy-and-swap idiom
for the first time. Need more time to bake it, write unit tests, etc. Maybe,
still need to read "More effective C++" further.
* TCWG-1162, Test GDB+OpenOCD with AArch64 boards.
Blocked by OpenOCD bugs. Chat with OpenOCD maintainer to make sure
these bugs are opened in the right place. Matthew (who contributed OpenOCD
AArch64) pinged me on irc, but he lost connection immediately. Probably, he
contact me for the OpenOCD bugs.
* Think about presenting GDB target description work in Linaro SFO17,
may add some SVE stuff if possible, to make it more attractive.
# Plan #
* TCWG-1159,
* PR 21717, 21555,
* TCWG-561,
* Register the presentation for Linaro SFO17,
--
Yao Qi
== Progress ==
* [ARM GlobalISel] Support globals [6/10]
- This is going to be very hairy because of all the different
relocation models (PIC, ROPI etc), differences between ELF and MachO,
and differences between targets with MOVT or without it
- Started adding support for simple, statically linked globals, it
might take me a while to get all the pseudoinstructions right even for
this simple case
* Misc [4/10]
- Meetings, mailing lists, code reviews, buildbots
== Plan ==
* More GlobalISel
* More code reviews
== Progress ==
* Infrastructure/validation:
- minor fixes in the release jobs
* Benchmarking:
- fixes on reporting scripts
- using more iterations didn't produce more stable results (still noise)
- trying to reboot the boards before running the benchs
* GCC upstream validation:
- further reduced noise ("random" pass/failures)
- sent a patch to fix an aarch64 problem with -mstrict-align
* misc (conf-calls, meetings, emails, ....)
== Next ==
Holidays until August 21st
[TCWG-614] Range Thunks
Finally managed to get some review on the entirety of the Range Thunks
patches. Have reorganised the patches and wrote some documentation to
make it easier to review. Responded to all review comments so far.
Compiler-rt
A long tail of frustration.
Managed to get a hello world semi-hosting test case running on the
latest QEMU running newlib-nano. This was much more difficult than I
expected due to:
- The semihosting startup code of newlib does a semi-hosting call for
top of memory regardless of whether the heap and stack location have
been identified in a linker-script.
- The QEMU semihosting response to top of memory is not helpful
leaving the stack location in an invalid memory location (latest QEMU
requires emulation of a board and not a generic machine)
- QEMU doesn't data-abort when writing to a stack location, so my
return address is helpfully read back as 0x0
Worked around by providing a large enough memory size to QEMU that the
semihosting call for top of memory returns 0, allowing newlib to use
the values in the linker script. Will probably need to spend some time
to write my own startup code that just uses the linker script for the
heap and stack.
Building compiler-rt for v6-m and v7-m has been much more difficult
than I expected as well. I've managed to find a configuration that
works, although it relies on some experimental work in moving
compiler-rt to the runtimes directory.
Plans for next week:
- LLD is top priority
- Get testing for compiler-rt working via qemu on v7-m, the recipe
that works for build does not support testing. I've got to either
extract the cmake magic flags or find a way to plumb through the runes
that make the tests work to the recipe I've got.
- On holiday Thursday, Friday and the following Monday
* Short week (Friday off)
== Progress ==
* Infrastructure/validation:
* Benchmarking:
- production scripts are now up-to-date, still observing noise on
some benchmarks
- fixed a couple of small issues with the scripts
* GCC upstream validation:
- working on further reducing noise ("random" pass/failures)
- reported/fixed a few regressions
- committed testsuite patch with de-require-stack-check
- looking at a problem with unaligned accesses
* misc (conf-calls, meetings, emails, ....)
== This Week ==
* PR78736 (2/10)
- Submitted patch upstream
* type-promotion (3/10)
- Scheduling path-splitting before type-promotion fixes the regression
with path-split-1.c
- Created patch to fix issues with type-promotion interfering with
widening_mul and bswap
optimizations
* malloc-propagation (4/10)
- Updated patch, passes bootstrap+test on x86_64
- Working through ICE's with lto-bootstrap
* Misc (1/10)
- Meetings
== Progress ==
* TCWG-1187 - [ARM GlobalISel] Support G_FCMP for s64 [5/10]
- Committed upstream
- Also refactored the existing code a bit
* TCWG-1190 - [ARM GlobalISel] Support G_BR and G_BRCOND [2/10]
- Committed upstream
* TCWG-1191 - Test zorg patch [1/10]
- Test a patch for running the test-suite with the CMake producer on
the buildbots
* Misc [3/10]
- Meetings, mailing lists, code reviews, buildbots
== Plan ==
* More GlobalISel
* More code reviews
# Progress #
* TCWG-1159,New design of GDB/GDBserver target description. [2/10]
v3 are posted, after fixing some regressions introduced by improper
merge. No comments from upstream yet.
* PR 21555. [2/10]
Has already a fix, but I am not satisfied. Post an RFC for a
discussion in general. My fix is to fix each GDB backend one by one,
while my RFC is about fixing it in GDB core side.
* TCWG-1162, Test GDB+OpenOCD with AArch64 boards. [4/10]
OpenOCD doesn't support semi-hosting, so I pass --specs=nosys.specs to
aarch64-none-elf gcc, but linker can't find a symbol from newlib.
Looks nobody tests aarch64-none-elf gcc with --specs=nosys.specs
before. Hack in newlib here and there, and get compiler/linker happy.
I can download code to HiKey via OpenOCD, but "continue" becomes
"single step". Open two OpenOCD bugs upstream. My work is blocked by
OpenOCD bugs.
* Upstream patches review. [2/10]
** Review sparc64 adi patch v3,
** Investigate and review the patch fixing GDB crashes on amd64-linux,
** Review Alan H.'s patch, and discuss on the design,
** Some conversation with Maciej on MIPS16 and microMIPS disassembler,
because my disassembler rework breaks MIPS.
# Plan #
* PR 21555,
* TCWG-1159
* TCWG-561,
# Issue #
* TCWG-1162 is blocked by OpenOCD bugs.
--
Yao Qi
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2017.07
snapshot of Linaro GCC 6 and 7 source packages.
o The GCC 7 series introduced an ABI change for ARM targets by fixing a bug
(present since GCC 5, see link below) that affects conformance to the procedure
call standard (AAPCS). The bug affects some C++ code where class objects are
passed by value to functions and could result in incorrect or inconsistent code
being generated. If the option -Wpsabi is enabled (on by default) the compiler
will emit a diagnostic note for code that might be affected by this ABI change.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
For an explanation of the changes please see the following website:
https://gcc.gnu.org/gcc-7/changes.html
o Linaro GCC 7 monthly snapshot[1] is based on FSF GCC 7.1+svn250046 and
includes performance improvements and bug fixes backported from mainline GCC.
The contents of this snapshot will be part of the 2017.08 stable[2] quarterly
release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.07/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 7.1+svn250046
* Backport of [Bugfix] [AArch32] PR target/71778 ICE using
non-constant argument to Neon intrinsic that requires constant
arguments
* Backport of [Bugfix] [AArch64] PR target/71663 aarch64 Vector
initialization can be improved slightly
* Backport of [AArch32] Enable FP16 vector arithmetic operations
* Backport of [AArch32] Fix ARM bootstrap failure due to an odd warning
* Backport of [AArch32] Modify idiv costs for Cortex-A53
* Backport of [AArch64] Add combine pattern for storing lane zero of a vector
* Backport of [AArch64] Add HF vector modes to lane-to-lane INS pattern
* Backport of [AArch64] Add prefetch configuration to aarch64 backend
* Backport of [AArch64] Adjust costs so udiv is preferred over sdiv
when both are valid
* Backport of [AArch64] Allow CMP+SHIFT when comparing with zero
* Backport of [AArch64] Allow const0_rtx operand for atomic
compare-exchange patterns
* Backport of [AArch64] Emit tighter strong atomic compare-exchange
loop when comparing against zero
* Backport of [AArch64] Enable -fprefetch-loop-arrays at given
optimization level
* Backport of [AArch64] Fix -fstack-check with really big frames on aarch64
* Backport of [AArch64] Fix subreg bug in scalar copysign
* Backport of [AArch64] Peephole for SUBS
* Backport of [AArch64] Simplify call, call_value, sibcall,
sibcall_value patterns
* Backport of [AArch64] Update prefetch tuning parameters for qdf24xx.
* Backport of [AArch64] Use SUBS for parallel subtraction and
comparison with immediate
* Backport of [Misc] Add debug counter for loop array prefetching
* Backport of [Misc] Improve debug output of loop data prefetching
* Backport of [Cleanup] [AArch32] Complete legend for ARM register
allocation in arm.h
* Backport of [Cleanup] [AArch32] Fix comment for
cmse_nonsecure_call_clear_caller_saved
* Backport of [Cleanup] [AArch32] Fix typo in comment in arm_expand_prologue
* Backport of [Testsuite] [AArch32] Add MOVT testing for ARMv8-M Baseline
* Backport of [Testsuite] Add dg-require-stack-check
* Backport of [Testsuite] Fix stack-check-1.c
o Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.4+svn250045 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the 2017.08 stable[2] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.07/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.4+svn250045
* Linaro BZ #3040 -- CC1 and cc1plus cannot convert UTF-8: Regenerate
intl configure
* Backport of [AArch64] Fix -fstack-check with really big frames on aarch64
* Backport of [Testsuite] Add dg-require-stack-check
* Backport of [Testsuite] Fix stack-check-1.c
o Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
[2]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
Achievements:
Some progress on Range Thunks. [TCWG-614]
- I have all the enabling patches that allow assignAddresses() to be
run multiple times committed.
- Need review for the actual range thunks implementation itself.
Compiler-rt [TCWG-1156]
- Clang (as opposed to llvm) is assuming that all builtins for ARM are
mandated to have a soft-float interface. I have a tentative patch but
need to test it a bit more first.
- Found out a bit more about the structure of how compiler-rt, and why
it behaves differently when I use the default target and
auto-detection of toolkit as opposed to supplying the target via
options.
-- There is quite a bit of hidden magic and hacks going on in the
default case, some of it I don't think is quite right. For example
Compiler-rt seems to conflate architecture with abi.
Set myself the task of getting compiler-rt tests running on v6-m with
testing on qemu.
- v6-m is the only auto-detected default target that I haven't been
able to reproduce results on.
- A review claimed that tests had been run on qemu, and I'm now trying
to work out how to reproduce this with clang and an arm-none-eabi
sysroot.
-- Not having a lot of luck so far, latest qemu only supports
emulation of 2 cortex-m3 dev-boards and I have yet to make a
standalone program that works [*]
-- I'm not looking forward to plumbing in the options to make the
arm-none-eabi testing work.
[*] I thought I would try semi-hosting first, but it turns out the
default semihosting startup code supplied with arm-none-eabi replaces
my heap and stack locations with a semi-hosting call to get top of
memory which qemu gives an inappropriate result for a dev-board
emulation with non contiguous memory. Would like to see if I can get
this working via a quick experiment to rewrite the start-up code,
although for the full tests I may fall back to retargeting the IO via
an emulated serial port.
Plans:
- First priority is range thunks for lld
- Second priority is getting a v6m test of compiler-rt to check for
any latent problems
- Submit clang patch when I know it works for all the supported platforms
- Look into v7-m support, particularly v7-m + single precision floating point.
# Progress #
* TCWG-1159, New design of GDB/GDBserver target description. [7/10]
It takes me a lot of time making the patch series v3 work, to address
review comments, to fix regressions, and to make sure each commit
doesn't break build. Almost done.
Looks 30 patches in one series is my limit, and wonder how does other
people manage large patch series.
* Help people runing GDB tests, and get some fails. It turns out we
encounter PR 21555. [1/10]
* Misc, [2/10]
# Plan #
* TCWG-1159
* PR 21555
* TCWG-561,
--
Yao Qi
== This Week ==
* PR78736 (4/10)
- Improved patch to not warn for enums with equal value ranges
- Caused fallouts in libgomp and libgfortran
- Large kernel fallout!
* type promotion (5/10)
- Looking at interference between path-splitting and type-promotion
optimizations
- miscompilation of memcpy-bi.c on
* Misc (1/10)
- Meetings
== Next Week ==
- Continue ongoing tasks
== Progress ==
* Infrastructure/validation:
- abe patch for bug #3040 committed, now we need to fix
regression-detection because it builds a toolchain that does not
support this fix (lacks a gcc patch)
- upgrade of dejagnu used for binutils validation fixed the random
errors we were seeing
* Benchmarking:
- production scripts were not up-to-date, but the new ones have a
conflict/dependency on ntp
* GCC upstream validation:
- working on further reducing noise ("random" pass/failures)
- reported/fixed a few regressions
- committed testsuite patch with de-require-stack-check
* misc (conf-calls, meetings, emails, ....)
== Progress ==
* TCWG-1155 - Move ASAN 39bit bot to GlobalISel [1/10]
- The bot is finally upstream and working well
* TCWG-1172 - [ARM GlobalISel] Support G_FCMP for s32 [7/10]
- Committed support for 32-bit floating point compares, both
hardware and software
* TCWG-1141 - Add "push" capability [1/10]
- Finally committed llvm-push
* Misc [1/10]
- Mailing lists, meetings, buildbots
== Plan ==
* TCWG-1187 - [ARM GlobalISel] Support G_FCMP for s64
== Activity ==
- Rebased and posted for review all my range-thunks work for LLD as
there had been some interest from some individuals on IRC in trying
out the patch.
-- Seems to work for them
-- Hoped that this might provoke upstream into looking and reviewing
the patches but no such luck.
- Landed the patch that sets _GLOBAL_OFFSET_TABLE_ so that FreeBSD can
link on ARM
- Some other small lld patches
- Investigations into whether an X86 patch might affect CFI generation
for AArch64.
Spent some time banging my head against the compiler-rt build system
to try and see if I can get a cross-compiled build and test run on
Qemu when my compiler-rt target != the default target (i.e. I want to
build clang with ARM and AArch64 targets and cross-build and test all
the ARM compiler-rt targets from that)
- Thwarted by what seems to be inconsistent decisions about
auto-detection of options, what is an architecture, target, sub-target
and abi.
- By passing in all auto-generated options by steam I'm still hitting
some problems with some tests that have an external assembly file.
Found numerous other small inconsistencies that I'll need to write up.
== Plans ==
- Ping the Range Thunks reviews again.
- Compiler-rt
Aim to get to the point where I can write a coherent mail to llvm-dev
explaining what I think is wrong and what I think needs changing.
== Progress ==
o Linaro GCC/Validation (7/10)
* Fixed AArch64 GCC options documentation
ARM part clean-up on-going
* libgomp/mingw patch: Upstream review pending
* pc-relative-literal-loads patch for GCC 6 branch: Upstream review pending
reviewed fxi for trunk.
* Following upstream discussions on stack clash CVE:
- One AArch64 specific commit done (backport in our branch on-going)
- Fix still under discussion upstream, nothing committed yet
* catching-up with re-association work
* libunwind support
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o backports for 2017.07, CVE, ...
== This Week ==
* Type promotion (6/10)
- Created patch to fix ICE with pr81083.c on ppc64
- Investigated mis-compilation of memcpy-bi.c on ppc64
* Malloc propagation (1/10)
- Working on patch based on feedback received.
* Public Holiday (2/10)
* Misc (1/10)
- Meetings
== Next Week ==
- Type promotion: Look at miscompilation bug, and investigate
performance regression for path
splitting optimization
- Malloc propagation
== Progress ==
* TCWG-1155 - Move ASAN 39bit bot to GlobalISel [1/10]
- Moved to the public silent master, ready for the final move on
Monday if it's stable until then
* TCWG-1172 - [ARM GlobalISel] Support G_FCMP [5/10]
- Most of the functionality is implemented, but I intend to do a lot
of refactoring before committing
* TCWG-1174 - [ARM GlobalISel] Support G_SELECT [1/10]
- Committed upstream
* Misc [3/10]
- Mailing lists, buildbots, discussions
== Plan ==
* Wrap up TCWG-1172
* More GlobalISel
* More code reviews
# Progress #
* TCWG-1159, New design of GDB/GDBserver target description. [4/10]
People agree on the direction this patch series goes to! Still
need to polish v3.
Started to write v3 to address comments, split patches, and rebase
patches, etc...
My Cauldron talk "A flexible GDB target
description for processor diversity " is registered.
* TCWG-561, Handle unavailable memory during frame unwinding. [2/10]
Decided how to do it, coding.
* Investigate the usage of obstack in GNU toolchain. [1/10]
We recently add a convenient class wrapper for obstack in GDB, and
I think it is better to "upstream" it to inlcude/ so that GCC can use
it as well. Did some archeology on C++ transition in GCC, find some
difficulties. Still good to know some GCC maintainers' preference on
C++.
* Travel, [1/10]
** US EVUS enrollment, to update my US visa information.
** Figure out the Cauldron flight.
* Misc, meeting, [2/10].
# Plan #
* TCWG-1159, patch v3.
--
Yao Qi
== Progress ==
* Infrastructure/validation:
- iterated on patch for bug #3040: 1 abe patch to use libiconv, 1
linaro-gcc-6 patch (partial backport to make enable-nls and libiconv
work together)
* Benchmarking:
- noticed large differences in bench results from one run to another
while looking at "deprecated it block" patch
- trying less aggressive configuration
* GCC upstream validation:
- working on further reducing noise ("random" pass/failures)
- reported/fixed a few regressions
- committed testsuite patch (for arm-neon flags)
* misc (conf-calls, meetings, emails, ....)
# Progress #
* TCWG-1159, New design of GDB/GDBserver target description. [3/10]
Update patches to address review comments. Commit three patches.
Need to post V3.
* TCWG-561, Handle unavailable memory during frame unwinding. [2/10]
Think about the plan.
* Upstream patches review. [3/10]
** Review IBM kernel-awareness patches.
** Review sparc64 adi patch.
** Review Alan's patch on removing MAX_REGISTER_SIZE. Evaluate other
better but expensive approach.
* Misc, [2/10]
Write a STL container allocator which uses stack instead of heap.
Underestimate the complexity of C++. Need to replace some std::vector
with my vector with stack_allocator in GDB. It should be also useful
to Alan.
# Plan #
* TCWG-1159, send v3.
* TCWG-561, Handle unavailable memory during frame unwinding.
--
Yao Qi
[TCWG-614] Range extension thunks
- No progress on upstream reviews from maintainers this week
I have received some interest on IRC and on at least one of the
reviews from other people wanting the feature so I'm hoping that this
may speed up the process.
- I've committed to rebasing and posting the full patch-set for review
so that interested people can take it and test.
PR31159 Tracked down why LLD wasn't correctly linking ARM BSD port
- lld only provides a dummy absolute value for _GLOBAL_OFFSET_TABLE_
- llvm-mc doesn't transform .word _GLOBAL_OFFSET_TABLE_ - . into
R_ARM_BASE_PREL like GNU as does, this relocation doesn't use the
value of _GLOBAL_OFFSET_TABLE_ . Instead we get R_ARM_REL32 which
needs _GLOBAL_OFFSET_TABLE_ to be set correctly. PR335511
- Patch accepted upstream will commit today
Misc:
- lld consultancy for Android
- Help to fix build error on clang for ARM colleague
- Query on lld behaviour with respect to .ARM.extab, I think lld
behaviour is within spec, but it may be producing larger files so
probably enough to argue the case for a small patch.
-No time to spend on compiler-rt this week
Plans:
- Post all the range-thunk patches for the people interested in it.
- Commit patches accepted last week
== Progress ==
* Out of office on Friday [2/10]
* TCWG-1155 - Move ASAN 39bit bot to GlobalISel [1/10]
- Committed a quick fix and started seeing green builds on this, we
can probably move it upstream soon
* TCWG-836 - Replace D01s by Scaleway boards [2/10]
- Set up a selfhost buildbot on one of the Scaleway boards
- It is very, very slow, I did some performance experiments but
there's probably more that can be attempted here
* TCWG-1172 - [ARM GlobalISel] Support G_FCMP [2/10]
- The hard float part is implemented, fiddling with the soft float now
- Forked some of that work into a different story for supporting G_SELECT
* TCWG-1174 - [ARM GlobalISel] Support G_SELECT [1/10]
- In progress
* Misc [2/10]
- Mailing lists, code reviews
- TCWG-1136 - LLVM 4.0.1 - Spun up and uploaded the final release candidate
- TCWG-1177 - Investigate failure on clang-cmake-aarch64-lld -
Bisected and reverted a commit upstream
== Plan ==
* More GlobalISel
* More buildbots
* More code reviews
== Progress ==
o Linaro GCC/Validation (7/10)
* Prepared a fix for libgomp/mingw build issue. Submitted upstream
* Analysed ubuntu bug report on unsupported relocations:
- https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1695093
- Identified it as upstream PR 79041
- Fix submitted upstream
* Following upstream discussions on stack clash CVE
- Releases re-spins will done once the issue will be fixed upstream
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o CVE, on-going patches and infra
== Progress ==
* Infrastructure/validation:
- looking at bug #3040
* Benchmarking:
* GCC upstream validation:
- working on further reducing noise ("random" pass/failures)
- reported a few regressions
- sent a couple of patches (testsuite, ARM_FEATURE_COPROC)
* misc (conf-calls, meetings, emails, ....)
== Progress ==
o Linaro GCC/Validation (7/10)
* backports and branch merges for linaro branches 5, 6 and 7
* released GCC 6 and 7 2017.06 sources snapshots
* Fxed GCC 5 branch merge
* analyzed various infrastructure instabilities
* Mingw32 libgomp build issue due to configure issue, working on a fix
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o complete GCC 5 sources snapshot
o Fix libgomp problem and continue on re-association
== Progress ==
* TCWG-1172 - [ARM GlobalISel] Support G_FCMP [2/10]
- In progress
* TCWG-1168 - [ARM GlobalISel] Support G_ICMP [3/10]
- Done, going to commit upstream
* TCWG-1136 - LLVM 4.0.1 [1/10]
- Spinned up rc3
* TCWG-1155 - Move ASAN 39bit bot to GlobalISel [2/10]
- Investigated the timeouts in the test-suite and reported upstream
- Sent a patch to increase the threshold for those tests on AArch64,
waiting for feedback
* TCWG-1166 - Investigate Clang diag-flags.cpp failure [1/10]
- Bisected and reverted upstream
* Misc [1/10]
- Mailing lists, meetings etc
== Plan ==
* Wrap up TCWG-1168 and 1172
# Progress #
* TCWG-1159, New design of GDB/GDBserver target description. [1/10]
Finish writing the commit log and changelog. Patches are posted.
* TCWG-1167, Test AArch32 GDB on AArch64 Linux kernel. [3/10]
Such configuration shows one regression. It is whether condition
checked failed UDF triggers Undefined Instruction Exception or not.
GDB's assumption is NO, but Peter M. told me that it is implementation
defined, so GDB has to handle both.
* gdb/objdump disassembler unification. Done. [1/10]
Commit the the left over patch.
* Pick up Alan H.'s C++ template patch, and post it again. Learned a
lot on C++ 11 default template parameter and SFINAE. Patch is
committed.
* Upstreams review. [3/10]
** Encourage people to build GDB with CLANG. Resist the objections
from other people, and write the "policy" about using other compilers
to build GDB.
** Review IBM's kernel-awareness v4 patches.
* Misc, [2/10].
# Plan #
Get chance to back to my interrupted works:
* TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode.
* TCWG-561, Handle unavailable memory during frame unwinding.
--
Yao Qi
== Progress ==
* Infrastructure/validation:
- still some random results, and still ssh connexion problems with
several machines
- improving abe-bisect script
* Benchmarking:
* GCC:
- 'deprecated IT-blocks' patch: looking at the generated code to
understand the regressions
* GCC upstream validation:
- reported a couple of regressions on trunk, a few bisects, helped
validating some ARM patches
- working on further reducing noise ("random" pass/failures)
- include qemu traces in the logs when a testcase aborts, to help debug
* misc (conf-calls, meetings, emails, ....)
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2017.06
snapshot of Linaro GCC 6 and 7 source packages.
o The GCC 7 series introduced an ABI change for ARM targets by fixing a bug
(present since GCC 5, see link below) that affects conformance to the procedure
call standard (AAPCS). The bug affects some C++ code where class objects are
passed by value to functions and could result in incorrect or inconsistent code
being generated. If the option -Wpsabi is enabled (on by default) the compiler
will emit a diagnostic note for code that might be affected by this ABI change.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
For an explanation of the changes please see the following website:
https://gcc.gnu.org/gcc-7/changes.html
o Linaro GCC 7 monthly snapshot[1] is based on FSF GCC 7.1+svn249190 and
includes performance improvements and bug fixes backported from mainline GCC.
The contents of this snapshot will be part of the 2017.08 stable[2] quarterly
release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.06/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 7.1+svn249190
* Backport of [Bugfix] [AArch32] PR target/71607 Fix ICE when loading constant
* Backport of [Bugfix] [AArch64] PR target/80671
config/aarch64/cortex-a57-fma-steering.c:416: bad statement order
* Backport of [Bugfix] PR tree-optimization/79697 unused realloc(0, n)
not eliminated
* Backport of [Bugfix] PR tree-optimization/80613 ICE in
is_gimple_reg_type with -O2
* Backport of [AArch32] Add a new target hook to compute the frame layout
* Backport of [AArch32] Add fuchsia support to libgcc
* Backport of [AArch32] FreeBSD arm libgcc config.host
* Backport of [AArch32] Model Cortex-A53 load forwarding
* Backport of [AArch64] Accept more addressing modes for PRFM
* Backport of [AArch64] Add aes and sha reservations for Thunderx2t99
* Backport of [AArch64] Add crc reservations for Thunderx2t99
* Backport of [AArch64] Improve float to int moves
* Backport of [AArch64] Set jump alignment to 4 for Cortex cores
* Backport of [AArch64] Tighten move constraints for symbolic operands
* Backport of [Misc] Check the alternate cost model just as costs_lt_p
* Backport of [Misc] Record equivalences for spill registers
* Backport of [Testsuite] [AArch32] Only test
tls-disable-literal-pool.c if target supports native TLS
* Backport of [Testsuite] [AArch32] Replace absolute line numbers in
gcc.target/arm
* Backport of [Testsuite] [AArch64] Replace absolute line numbers in
gcc.target/aarch64
o Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.3+svn249140 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the 2017.08 stable[2] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.06/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.3+svn249140
o Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
[2]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
== Progress ==
LLD
- Committed refactoring patches to enable long range thunks. This
should unblock progress towards upstreaming patches.
- Rebased and sent out for review first patches in series. Expecting
slow but steady progress as I hope to not need much more large scale
refactoring.
== Plans ==
Compiler-rt
- Investigated cross-compilation and testing via qemu user mode
emulation. It seems to be possible to do so, although fiddly to set up
Plans for this week:
- LLD long range thunks
- Build up a task list for compiler-rt
- Likely take Friday on holiday
== Progress ==
o Linaro GCC/Validation (7/10)
* Completed and released 7.1-2017.05 release
* Preparing backports for 2017.06 source snapshot
* Checked upstream status w/r to merge regression observed: issue fixed
* Investigating mingw32 libgomp build issue
* Switched abe/stable to abe/tested branch
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o 2017.06 snapshot
o Fix libgomp problem and continue on re-association
== Progress ==
* [ARM GlobalISel] Support AND, OR, XOR [TCWG-1157] [2/10]
- Committed upstream
* [ARM GlobalISel] Fix arm-irtranslator test [TCWG-1146] [1/10]
- Committed upstream
* [GlobalISel] Remove the G_SEQUENCE node [TCWG-1138] [1/10]
- Removed the G_SEQUENCE node from the ARM backend
* [ARM GlobalISel] Support mod [TCWG-1105] [2/10]
- Have some patches downstream for handling this
- Not sure it's the best way to go, so I've been asking for some
guidance before moving forward with it
* [Helpers] Add "push" capability [TCWG-1141] [2/10]
- Almost ready, will send a pull request next week
* Misc [2/10]
- Mailing lists, meetings, buildbot monitoring
- Opened a backport request for Ubuntu Xenial binutils for an lld
bug that is affecting our buildbots
== Plan ==
* More GlobalISel
* Check if our internal buildmaster works now, try to setup some buildbots
* One day off on Monday [2/10]
# Progress #
* GDB 8.0 is released! TCWG-1050. Done.
* GDB target description changes. [5/10]
It is needed for adding SVE in GDB. Change GDB target
description, and start from x86-linux. The more I write
the code, the more right I believe the change is. Patches
are done, but still need to complete commit log, changelog,
and polish the code.
Write an abstract about it for GNU Cauldron. Spend some time
thinking about a good title.
* Upstreams review. [1/10]
** Review some Alan H.'s patches.
** Review the OpenRISC patches.
* Misc, [2/10]
** Follow up the OpenOCD work. Create two epics for the following
work.
** Meetings.
# Plan #
* Post my target descriptions changes upstreams.
* Post some leftover patches about GDB and OBJDUMP disassembler
unification.
--
Yao Qi
Short week (Monday off)
== Progress ==
* Infrastructure/validation:
- reviews
- noticed ~random results in one binutils test on apm/tk1, didn't
understand the problem yet. Manual runs all succeeded :(
* Benchmarking:
- comparison script/job
- reviews
* GCC:
- benchmarking old 'deprecated IT-blocks' patch. Seems to confirm
large regressions on some benchmarks, and non-functional on at least
one bench.
- sent updated testsuite patch to support -march=armv5t runtestflags
after dejagnu update
- testing: checked a config --with-cpu=arm10tdmi instead of forcing
-march-armv5t via runtestflags, to see how the validation results
differ: not much, so if my previous patch is not accepted, I might
change the configurations I use for non-regression testing
- reported a couple of regressions on trunk
* misc (conf-calls, meetings, emails, ....)
Progress
- Long range thunks
Committed a couple of refactorings on .ARM.exidf and SHF_LINK_ORDER
support. With luck final patch for SHF_LINK_ORDER will be approved
next week
Submitted patches to convert existing Thunk Implementation to use
InputSectionDescriptions. Hopefully these ones are broken down into
small enough parts for upstream to look at.
- Tracked down https://bugs.llvm.org/show_bug.cgi?id=33136 libc++
failing ~100 tests with std::bad_cast exception when built in release
mode. Was down to global-merge incorrectly merging globals that were
not DSO local. Looks to have been fixed quickly
- llvm-mc
Helped out with D33436 review on how to do interworking branches in assembler
D33492 accepted, will commit next week.
Plans:
- Long range thunks
Continue with slow progress towards upstreaming
- Investigate compiler-rt
== Progress ==
o Linaro GCC/Validation (7/10)
* Deployed 7.1 release candidate
* Catching up with re-association development
* Preparing switch to abe/tested branch
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o release 7.1 2017.05
o Continue on re-association
== Progress ==
* [GlobalISel] AArch64 test-suite and self-host [TCWG-1074] [3/10]
- Reported and investigated a codegen issue introduced by one of
Quentin's patches, which was appearing while selfhosting with GlobalISel
- Ran the test-suite and self-host again after it was fixed
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033] [3/10]
- Committed the lowering part upstream
- Still needs support in the rest of the pipeline but that will be a
different issue
* [Helper scripts] Add "push" capability [TCWG-1141] [1/10]
- Started writing tests
* Misc [3/10]
- Meetings, mailing lists, babysitting the buildbots
- [GlobalISel] Run precommit for Daniel's patch [TCWG-1142]: did another
run for this
- LLVM 4.0.1 [TCWG-1136]: ran rc2 on ARM and AArch64
== Plan ==
* [ARM GlobalISel] Fix arm-irtranslator test [TCWG-1146]
* Replace D01s by Scaleway boards [TCWG-836]
* More GlobalISel stuff
== Progress ==
* Infrastructure:
- improvements in binutils Jenkins jobs, to track regressions rather
than always report 'failed'. Pass ratio can still be very low in some
configs (eg arm-pe)
* Benchmarking:
- work around problems with many simultaneous ssh connexions for
remote cross-compilation
* GCC:
- benchmarked old 'deprecated IT-blocks' patch.
- reported a few regressions in trunk
- looking at testsuite-isms: problems with some multilibs after
dejagnu upgrade (where multilib flags are now prepended, rather than
appended previously)
* misc (conf-calls, meetings, emails, ....)
== Next ==
* Short week (off Monday)
* Benchmarking scripts
* GCC
