== Progress ==
o Linaro GCC/Validation (7/10)
* Fixed AArch64 GCC options documentation
ARM part clean-up on-going
* libgomp/mingw patch: Upstream review pending
* pc-relative-literal-loads patch for GCC 6 branch: Upstream review pending
reviewed fxi for trunk.
* Following upstream discussions on stack clash CVE:
- One AArch64 specific commit done (backport in our branch on-going)
- Fix still under discussion upstream, nothing committed yet
* catching-up with re-association work
* libunwind support
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o backports for 2017.07, CVE, ...
== This Week ==
* Type promotion (6/10)
- Created patch to fix ICE with pr81083.c on ppc64
- Investigated mis-compilation of memcpy-bi.c on ppc64
* Malloc propagation (1/10)
- Working on patch based on feedback received.
* Public Holiday (2/10)
* Misc (1/10)
- Meetings
== Next Week ==
- Type promotion: Look at miscompilation bug, and investigate
performance regression for path
splitting optimization
- Malloc propagation
== Progress ==
* TCWG-1155 - Move ASAN 39bit bot to GlobalISel [1/10]
- Moved to the public silent master, ready for the final move on
Monday if it's stable until then
* TCWG-1172 - [ARM GlobalISel] Support G_FCMP [5/10]
- Most of the functionality is implemented, but I intend to do a lot
of refactoring before committing
* TCWG-1174 - [ARM GlobalISel] Support G_SELECT [1/10]
- Committed upstream
* Misc [3/10]
- Mailing lists, buildbots, discussions
== Plan ==
* Wrap up TCWG-1172
* More GlobalISel
* More code reviews
# Progress #
* TCWG-1159, New design of GDB/GDBserver target description. [4/10]
People agree on the direction this patch series goes to! Still
need to polish v3.
Started to write v3 to address comments, split patches, and rebase
patches, etc...
My Cauldron talk "A flexible GDB target
description for processor diversity " is registered.
* TCWG-561, Handle unavailable memory during frame unwinding. [2/10]
Decided how to do it, coding.
* Investigate the usage of obstack in GNU toolchain. [1/10]
We recently add a convenient class wrapper for obstack in GDB, and
I think it is better to "upstream" it to inlcude/ so that GCC can use
it as well. Did some archeology on C++ transition in GCC, find some
difficulties. Still good to know some GCC maintainers' preference on
C++.
* Travel, [1/10]
** US EVUS enrollment, to update my US visa information.
** Figure out the Cauldron flight.
* Misc, meeting, [2/10].
# Plan #
* TCWG-1159, patch v3.
--
Yao Qi
== Progress ==
* Infrastructure/validation:
- iterated on patch for bug #3040: 1 abe patch to use libiconv, 1
linaro-gcc-6 patch (partial backport to make enable-nls and libiconv
work together)
* Benchmarking:
- noticed large differences in bench results from one run to another
while looking at "deprecated it block" patch
- trying less aggressive configuration
* GCC upstream validation:
- working on further reducing noise ("random" pass/failures)
- reported/fixed a few regressions
- committed testsuite patch (for arm-neon flags)
* misc (conf-calls, meetings, emails, ....)
# Progress #
* TCWG-1159, New design of GDB/GDBserver target description. [3/10]
Update patches to address review comments. Commit three patches.
Need to post V3.
* TCWG-561, Handle unavailable memory during frame unwinding. [2/10]
Think about the plan.
* Upstream patches review. [3/10]
** Review IBM kernel-awareness patches.
** Review sparc64 adi patch.
** Review Alan's patch on removing MAX_REGISTER_SIZE. Evaluate other
better but expensive approach.
* Misc, [2/10]
Write a STL container allocator which uses stack instead of heap.
Underestimate the complexity of C++. Need to replace some std::vector
with my vector with stack_allocator in GDB. It should be also useful
to Alan.
# Plan #
* TCWG-1159, send v3.
* TCWG-561, Handle unavailable memory during frame unwinding.
--
Yao Qi
[TCWG-614] Range extension thunks
- No progress on upstream reviews from maintainers this week
I have received some interest on IRC and on at least one of the
reviews from other people wanting the feature so I'm hoping that this
may speed up the process.
- I've committed to rebasing and posting the full patch-set for review
so that interested people can take it and test.
PR31159 Tracked down why LLD wasn't correctly linking ARM BSD port
- lld only provides a dummy absolute value for _GLOBAL_OFFSET_TABLE_
- llvm-mc doesn't transform .word _GLOBAL_OFFSET_TABLE_ - . into
R_ARM_BASE_PREL like GNU as does, this relocation doesn't use the
value of _GLOBAL_OFFSET_TABLE_ . Instead we get R_ARM_REL32 which
needs _GLOBAL_OFFSET_TABLE_ to be set correctly. PR335511
- Patch accepted upstream will commit today
Misc:
- lld consultancy for Android
- Help to fix build error on clang for ARM colleague
- Query on lld behaviour with respect to .ARM.extab, I think lld
behaviour is within spec, but it may be producing larger files so
probably enough to argue the case for a small patch.
-No time to spend on compiler-rt this week
Plans:
- Post all the range-thunk patches for the people interested in it.
- Commit patches accepted last week
== Progress ==
* Out of office on Friday [2/10]
* TCWG-1155 - Move ASAN 39bit bot to GlobalISel [1/10]
- Committed a quick fix and started seeing green builds on this, we
can probably move it upstream soon
* TCWG-836 - Replace D01s by Scaleway boards [2/10]
- Set up a selfhost buildbot on one of the Scaleway boards
- It is very, very slow, I did some performance experiments but
there's probably more that can be attempted here
* TCWG-1172 - [ARM GlobalISel] Support G_FCMP [2/10]
- The hard float part is implemented, fiddling with the soft float now
- Forked some of that work into a different story for supporting G_SELECT
* TCWG-1174 - [ARM GlobalISel] Support G_SELECT [1/10]
- In progress
* Misc [2/10]
- Mailing lists, code reviews
- TCWG-1136 - LLVM 4.0.1 - Spun up and uploaded the final release candidate
- TCWG-1177 - Investigate failure on clang-cmake-aarch64-lld -
Bisected and reverted a commit upstream
== Plan ==
* More GlobalISel
* More buildbots
* More code reviews
== Progress ==
o Linaro GCC/Validation (7/10)
* Prepared a fix for libgomp/mingw build issue. Submitted upstream
* Analysed ubuntu bug report on unsupported relocations:
- https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1695093
- Identified it as upstream PR 79041
- Fix submitted upstream
* Following upstream discussions on stack clash CVE
- Releases re-spins will done once the issue will be fixed upstream
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o CVE, on-going patches and infra
== Progress ==
* Infrastructure/validation:
- looking at bug #3040
* Benchmarking:
* GCC upstream validation:
- working on further reducing noise ("random" pass/failures)
- reported a few regressions
- sent a couple of patches (testsuite, ARM_FEATURE_COPROC)
* misc (conf-calls, meetings, emails, ....)
== Progress ==
o Linaro GCC/Validation (7/10)
* backports and branch merges for linaro branches 5, 6 and 7
* released GCC 6 and 7 2017.06 sources snapshots
* Fxed GCC 5 branch merge
* analyzed various infrastructure instabilities
* Mingw32 libgomp build issue due to configure issue, working on a fix
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o complete GCC 5 sources snapshot
o Fix libgomp problem and continue on re-association
== Progress ==
* TCWG-1172 - [ARM GlobalISel] Support G_FCMP [2/10]
- In progress
* TCWG-1168 - [ARM GlobalISel] Support G_ICMP [3/10]
- Done, going to commit upstream
* TCWG-1136 - LLVM 4.0.1 [1/10]
- Spinned up rc3
* TCWG-1155 - Move ASAN 39bit bot to GlobalISel [2/10]
- Investigated the timeouts in the test-suite and reported upstream
- Sent a patch to increase the threshold for those tests on AArch64,
waiting for feedback
* TCWG-1166 - Investigate Clang diag-flags.cpp failure [1/10]
- Bisected and reverted upstream
* Misc [1/10]
- Mailing lists, meetings etc
== Plan ==
* Wrap up TCWG-1168 and 1172
# Progress #
* TCWG-1159, New design of GDB/GDBserver target description. [1/10]
Finish writing the commit log and changelog. Patches are posted.
* TCWG-1167, Test AArch32 GDB on AArch64 Linux kernel. [3/10]
Such configuration shows one regression. It is whether condition
checked failed UDF triggers Undefined Instruction Exception or not.
GDB's assumption is NO, but Peter M. told me that it is implementation
defined, so GDB has to handle both.
* gdb/objdump disassembler unification. Done. [1/10]
Commit the the left over patch.
* Pick up Alan H.'s C++ template patch, and post it again. Learned a
lot on C++ 11 default template parameter and SFINAE. Patch is
committed.
* Upstreams review. [3/10]
** Encourage people to build GDB with CLANG. Resist the objections
from other people, and write the "policy" about using other compilers
to build GDB.
** Review IBM's kernel-awareness v4 patches.
* Misc, [2/10].
# Plan #
Get chance to back to my interrupted works:
* TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode.
* TCWG-561, Handle unavailable memory during frame unwinding.
--
Yao Qi
== Progress ==
* Infrastructure/validation:
- still some random results, and still ssh connexion problems with
several machines
- improving abe-bisect script
* Benchmarking:
* GCC:
- 'deprecated IT-blocks' patch: looking at the generated code to
understand the regressions
* GCC upstream validation:
- reported a couple of regressions on trunk, a few bisects, helped
validating some ARM patches
- working on further reducing noise ("random" pass/failures)
- include qemu traces in the logs when a testcase aborts, to help debug
* misc (conf-calls, meetings, emails, ....)
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2017.06
snapshot of Linaro GCC 6 and 7 source packages.
o The GCC 7 series introduced an ABI change for ARM targets by fixing a bug
(present since GCC 5, see link below) that affects conformance to the procedure
call standard (AAPCS). The bug affects some C++ code where class objects are
passed by value to functions and could result in incorrect or inconsistent code
being generated. If the option -Wpsabi is enabled (on by default) the compiler
will emit a diagnostic note for code that might be affected by this ABI change.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
For an explanation of the changes please see the following website:
https://gcc.gnu.org/gcc-7/changes.html
o Linaro GCC 7 monthly snapshot[1] is based on FSF GCC 7.1+svn249190 and
includes performance improvements and bug fixes backported from mainline GCC.
The contents of this snapshot will be part of the 2017.08 stable[2] quarterly
release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.06/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 7.1+svn249190
* Backport of [Bugfix] [AArch32] PR target/71607 Fix ICE when loading constant
* Backport of [Bugfix] [AArch64] PR target/80671
config/aarch64/cortex-a57-fma-steering.c:416: bad statement order
* Backport of [Bugfix] PR tree-optimization/79697 unused realloc(0, n)
not eliminated
* Backport of [Bugfix] PR tree-optimization/80613 ICE in
is_gimple_reg_type with -O2
* Backport of [AArch32] Add a new target hook to compute the frame layout
* Backport of [AArch32] Add fuchsia support to libgcc
* Backport of [AArch32] FreeBSD arm libgcc config.host
* Backport of [AArch32] Model Cortex-A53 load forwarding
* Backport of [AArch64] Accept more addressing modes for PRFM
* Backport of [AArch64] Add aes and sha reservations for Thunderx2t99
* Backport of [AArch64] Add crc reservations for Thunderx2t99
* Backport of [AArch64] Improve float to int moves
* Backport of [AArch64] Set jump alignment to 4 for Cortex cores
* Backport of [AArch64] Tighten move constraints for symbolic operands
* Backport of [Misc] Check the alternate cost model just as costs_lt_p
* Backport of [Misc] Record equivalences for spill registers
* Backport of [Testsuite] [AArch32] Only test
tls-disable-literal-pool.c if target supports native TLS
* Backport of [Testsuite] [AArch32] Replace absolute line numbers in
gcc.target/arm
* Backport of [Testsuite] [AArch64] Replace absolute line numbers in
gcc.target/aarch64
o Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.3+svn249140 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the 2017.08 stable[2] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.06/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.3+svn249140
o Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
[2]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
== Progress ==
LLD
- Committed refactoring patches to enable long range thunks. This
should unblock progress towards upstreaming patches.
- Rebased and sent out for review first patches in series. Expecting
slow but steady progress as I hope to not need much more large scale
refactoring.
== Plans ==
Compiler-rt
- Investigated cross-compilation and testing via qemu user mode
emulation. It seems to be possible to do so, although fiddly to set up
Plans for this week:
- LLD long range thunks
- Build up a task list for compiler-rt
- Likely take Friday on holiday
== Progress ==
o Linaro GCC/Validation (7/10)
* Completed and released 7.1-2017.05 release
* Preparing backports for 2017.06 source snapshot
* Checked upstream status w/r to merge regression observed: issue fixed
* Investigating mingw32 libgomp build issue
* Switched abe/stable to abe/tested branch
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o 2017.06 snapshot
o Fix libgomp problem and continue on re-association
== Progress ==
* [ARM GlobalISel] Support AND, OR, XOR [TCWG-1157] [2/10]
- Committed upstream
* [ARM GlobalISel] Fix arm-irtranslator test [TCWG-1146] [1/10]
- Committed upstream
* [GlobalISel] Remove the G_SEQUENCE node [TCWG-1138] [1/10]
- Removed the G_SEQUENCE node from the ARM backend
* [ARM GlobalISel] Support mod [TCWG-1105] [2/10]
- Have some patches downstream for handling this
- Not sure it's the best way to go, so I've been asking for some
guidance before moving forward with it
* [Helpers] Add "push" capability [TCWG-1141] [2/10]
- Almost ready, will send a pull request next week
* Misc [2/10]
- Mailing lists, meetings, buildbot monitoring
- Opened a backport request for Ubuntu Xenial binutils for an lld
bug that is affecting our buildbots
== Plan ==
* More GlobalISel
* Check if our internal buildmaster works now, try to setup some buildbots
* One day off on Monday [2/10]
# Progress #
* GDB 8.0 is released! TCWG-1050. Done.
* GDB target description changes. [5/10]
It is needed for adding SVE in GDB. Change GDB target
description, and start from x86-linux. The more I write
the code, the more right I believe the change is. Patches
are done, but still need to complete commit log, changelog,
and polish the code.
Write an abstract about it for GNU Cauldron. Spend some time
thinking about a good title.
* Upstreams review. [1/10]
** Review some Alan H.'s patches.
** Review the OpenRISC patches.
* Misc, [2/10]
** Follow up the OpenOCD work. Create two epics for the following
work.
** Meetings.
# Plan #
* Post my target descriptions changes upstreams.
* Post some leftover patches about GDB and OBJDUMP disassembler
unification.
--
Yao Qi
Short week (Monday off)
== Progress ==
* Infrastructure/validation:
- reviews
- noticed ~random results in one binutils test on apm/tk1, didn't
understand the problem yet. Manual runs all succeeded :(
* Benchmarking:
- comparison script/job
- reviews
* GCC:
- benchmarking old 'deprecated IT-blocks' patch. Seems to confirm
large regressions on some benchmarks, and non-functional on at least
one bench.
- sent updated testsuite patch to support -march=armv5t runtestflags
after dejagnu update
- testing: checked a config --with-cpu=arm10tdmi instead of forcing
-march-armv5t via runtestflags, to see how the validation results
differ: not much, so if my previous patch is not accepted, I might
change the configurations I use for non-regression testing
- reported a couple of regressions on trunk
* misc (conf-calls, meetings, emails, ....)
Progress
- Long range thunks
Committed a couple of refactorings on .ARM.exidf and SHF_LINK_ORDER
support. With luck final patch for SHF_LINK_ORDER will be approved
next week
Submitted patches to convert existing Thunk Implementation to use
InputSectionDescriptions. Hopefully these ones are broken down into
small enough parts for upstream to look at.
- Tracked down https://bugs.llvm.org/show_bug.cgi?id=33136 libc++
failing ~100 tests with std::bad_cast exception when built in release
mode. Was down to global-merge incorrectly merging globals that were
not DSO local. Looks to have been fixed quickly
- llvm-mc
Helped out with D33436 review on how to do interworking branches in assembler
D33492 accepted, will commit next week.
Plans:
- Long range thunks
Continue with slow progress towards upstreaming
- Investigate compiler-rt
== Progress ==
o Linaro GCC/Validation (7/10)
* Deployed 7.1 release candidate
* Catching up with re-association development
* Preparing switch to abe/tested branch
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o release 7.1 2017.05
o Continue on re-association
== Progress ==
* [GlobalISel] AArch64 test-suite and self-host [TCWG-1074] [3/10]
- Reported and investigated a codegen issue introduced by one of
Quentin's patches, which was appearing while selfhosting with GlobalISel
- Ran the test-suite and self-host again after it was fixed
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033] [3/10]
- Committed the lowering part upstream
- Still needs support in the rest of the pipeline but that will be a
different issue
* [Helper scripts] Add "push" capability [TCWG-1141] [1/10]
- Started writing tests
* Misc [3/10]
- Meetings, mailing lists, babysitting the buildbots
- [GlobalISel] Run precommit for Daniel's patch [TCWG-1142]: did another
run for this
- LLVM 4.0.1 [TCWG-1136]: ran rc2 on ARM and AArch64
== Plan ==
* [ARM GlobalISel] Fix arm-irtranslator test [TCWG-1146]
* Replace D01s by Scaleway boards [TCWG-836]
* More GlobalISel stuff
== Progress ==
* Infrastructure:
- improvements in binutils Jenkins jobs, to track regressions rather
than always report 'failed'. Pass ratio can still be very low in some
configs (eg arm-pe)
* Benchmarking:
- work around problems with many simultaneous ssh connexions for
remote cross-compilation
* GCC:
- benchmarked old 'deprecated IT-blocks' patch.
- reported a few regressions in trunk
- looking at testsuite-isms: problems with some multilibs after
dejagnu upgrade (where multilib flags are now prepended, rather than
appended previously)
* misc (conf-calls, meetings, emails, ....)
== Next ==
* Short week (off Monday)
* Benchmarking scripts
* GCC
Progress
- Long range thunks
Made some more progress on the refactoring needed to merge the
representations for the script and non-script cases. Close to getting
the .ARM.exidx sections converted.
- Some thoughts on https://reviews.llvm.org/D33436 to do with
ARM/Thumb interworking in the assembler.
-- Discovered that gold and lld get the case of a relocation to a
Thumb non STT_FUNC symbol with bit 0 clear wrong. Both linkers attempt
to interwork (they shouldn't as the symbol is not STT_FUNC) but
identify the symbol as ARM due to bit 0 being clear. Luckily these are
corner cases only brought up by hand-written assembler.
- Investigation into https://bugs.llvm.org/show_bug.cgi?id=33136
libc++ failing ~100 tests with std::bad_cast exception when built in
release mode (clean upstream build uses debug).
-- Reduced failing test to std::cout << std::endl; the std::bad_cast
comes from an out of range index into a vector of available locales.
-- Current thought is that this could be a codegen bug as I can only
reproduce in Release (-O3) and not RelWithDebInfo (-O2).
Plans for next week:
- Long range thunks
Make more progress on refactoring. Should get .ARM.exidx patches
upstream, next step to convert long range thunks themselves.
- Work on diagnosing PR33136.
* Two days off (4/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* Deployed 6.3 and 5,4 2017.05 releases (source and binaries)
* Updated components for 7.1 2017.05 release candidate
* Finishing release notes before deployment
o Misc (1/10)
* Various meetings and discussions.
== Plan ==
o Deploy 7.1-rc1 and prepare release
o Upstream monitoring reporting
o Back on compiler development
== This Week ==
* TCWG-1005 (4/10)
- Reworking the patch with suggested improvements
* PR80806 (1/10)
- Rejected patch, based on discussions with Martin and Jeff
- Submitted patch to remove dead call to memset in value-prof.c
* type promotion (2/10)
- Discussions with Kugan
- Trying out different test-cases and going through the patch/ML discussions
* TCWG-1129 (1/10)
- Understanding EH in gcc
* Validation (1/10)
- Cross compiling boost for ARM
* Misc (1/10)
- Meetings
- Pinged patch for PR78736.
== Next Week ==
- GCC: TCWG-1005, type promotion, TCWG-1129, bugs
- Validation: Add Boost to tcwg-buildapp
# Progress #
* GDB 8.0 release. TCWG-1050, [1/10]
Blocked by one MingW build issue. Should be the last one.
* gdb and objdump disassembler unification. [3/10]
Patches are approved. Rebase them, re-test them, and push them in.
Clean up some leftovers.
* GDB target description changes. [5/10]
Finish the design in GDBserver. Finish the prototype of both GDB and
GDBserver. Re-org them to some extent.
* GDB crossbuild w/ docker. [1/0]
Inspired by QEMU build, take a look docker and think about how to use
docker to build/test GDB for different targets.
# Plan #
* Holiday, and back to office on 6th June.
* Post RFC v2 on GDB target description changes.
* Upstream the patches of clean up to gdb and objdump disassembler
unification.
--
Yao Qi
== Progress ==
* Bank holiday on Thursday [2/10]
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033] [5/10]
- The array stuff is ready to commit, but SVN was down this morning
so I'll commit next week
* [GlobalISel] Run precommit for Daniel's patch [TCWG-1142] [2/10]
- Ran precommit both manually and in Jenkins
- Had some trouble with Jenkins and with the patch (it was based on
the wrong revision)
- In the end it was still too slow, so I'll probably get another
patch next week
* Misc [1/10]
- Meetings, mailing lists, buildbots
== Plan ==
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033]
- Finally commit this thing!
* Add "push" capability to helper scripts [TCWG-1141]
- This will be useful for working with Jenkins
The Linaro Binary Toolchain
============================
The Linaro GCC 6.3-2017.05 Release is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release packages from:
(sources)
http://releases.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/
(binaries)
http://releases.linaro.org/components/toolchain/binaries/6.3-2017.05/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and Aarch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.3-2017.05
http://releases.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (linaro-local/linaro_binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 7.12 (gdb-7.12-branch)
https://lists.gnu.org/archive/html/info-gnu/2016-10/msg00007.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 6 (as of Linaro GCC 6.3-2017.05)
==============================================
* Previous versions of the Linaro GCC 6 toolchain, when -static
-E/—dynamic-list are passed to the linker, might create executables
with dynamic sections which aren’t supported by run-time. This was
exhibited in Perf Tools build system and has been fixed upstream and
backported into Linaro Binutils 2.27 branch.
Linaro bugzilla #2926 : Perf tools compiled statically for AArch64
with Linaro release 6.1 and later ones was not statically linked.
https://bugs.linaro.org/show_bug.cgi?id=2926
* The Linaro GCC 6.3-2017.03 snapshot fixed some ILP32 issues (TLS,
exception handling, …) and these have been incorporated into this
release.
* Previous versions of the Linaro GCC 6 toolchain were incorrectly
generating floating-point code for soft-float Linux targets
(arm-linux-gnueabi, and armeb-linux-gnueabi). This escaped detection
until recently because the soft-float targeted toolchains were
configured to use general-purpose registers for passing floating-point
values (which is what you would expect for soft-float toolchains) and
the intra-routine floating-code was not noticed.
The issue would only show up on targets that were run on hardware that
truly didn't have floating-point hardware where the kernel did not
trap and emulate floating-point routines. This has been solved in
Linaro GCC 6.3-2017.02-rc2 by configuring the toolchain (using
--with-float=soft) to generate code without any floating-point
instructions at all (-mfloat-abi=soft).
https://review.linaro.org/#/c/16968/2
This change should not break compatibility between existing binaries
compiled with these toolchains since the float-point parameter passing
ABI is still the same.
* A bug/regression in the compiler has been identified whereby the
target function that is invoked when calling a "weak" function
directly is the "strong" override, whereas when calling the function
via a pointer the "weak" implementation is used. This would be
noticed as inconsistent function invocation when invoking directly vs.
invoking via function pointer. This issue only affected 32-bit arm
targets. This regression has been fixed upstream and backported into
Linaro GCC 6.3-2017.02-rc2.
GCC PR target/78253: [5/6/7 Regression] [ARM] call weak function
instead of strong when called through pointer.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78253
Linaro bugzilla #2562: ARM GCC 5.2 call weak function instead of
strong when called through pointer
https://bugs.linaro.org/show_bug.cgi?id=2562
* MS Windows does not support symlinks and the MS Windows archive
extractor does not properly deep copy the symlink target
files/directories into the symlinked directory structure when
unpacking the toolchain archive. This causes problems with missing
dependencies when using the Linaro mingw toolchains, as identified in
the following bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
This has been solved by copying files rather than using symlinks when
the mingw targetted toolchain archives are created.
https://review.linaro.org/#/c/16415/
* Users of Linaro's toolchain have encountered problems when building
projects with Autotools (specifically libtool):
https://bugs.linaro.org/show_bug.cgi?id=2764
The Linaro binary toolchain release contained files with a .la suffix
as artifacts of the toolchain build process. These .la files are
helper files for libtool, but unlike a gcc install tree, they are not
position independent and contain full paths. Since these artifacts
contain absolute paths they can actually mislead user invocation of
libtool into not finding required libraries (because they reference
the build tree, not the install location) and hence breaking Autotools
builds. These *.la file artifacts have been removed from Linaro
toolchain binaries because they are unnecessary for users.
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M and these have been incorporated into this release.
* Compiling and statically linking some SPEC2006int tests against
tcmalloc have been failing due to a problem with glibc's memory
allocator function overrides. This was fixed upstream:
https://sourceware.org/bugzilla/show_bug.cgi?id=20432
Backported into Linaro glibc 2.23:
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 2665915cfc46aa6403bb2efd473c523d3167e0cb
Author: Andre Vieira (lists) <Andre.SimoesDiasVieira(a)arm.com>
Date: Thu Jun 16 12:23:51 2016 +0100
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit e7b1ee2ea6aa3ee1da41976407410e6202a098c5
Author: Wilco Dijkstra <Wilco.Dijkstra(a)arm.com>
Date: Thu May 12 16:16:58 2016 +0000
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit 5c02bcc086a96b174e1b9e1445a4a1770070107a
Author: Thomas Preud'homme <thomas.preudhomme(a)arm.com>
Date: Wed May 11 17:18:48 2016 -0400
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit 5c9403eaf40951f8a4f55ed65f661b485ff44be7
Author: David Hoover <spm2(a)dangerous.li>
Date: Thu Apr 21 07:12:24 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, Linaro GCC 6.3-2017.01,
Linaro GCC 6.3-2017.02, Linaro GCC 6.3-2017.03 and Linaro GCC
6.3-2017.04.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.03/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.04/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
# Progress #
* TCWG-178, confirm that longjmp.exp fails disappear on glibc with
--enable-systemtap. [1/10]
* GDB 8.0 release. TCWG-1050, [3/10]
** Fix a regression that command "tty" is missing.
** Review Thomas's patch handling non-FPU tests. Suggested to merge
it to 8.0 branch.
* Post my patches on gdb and objdump disassembler unification. [1/10]
All binutils patches are approved. I'll push them in if no comments
gdb side.
* GDB target description changes. [4/10]
People like my RFC, but Pedro requested the design and plan in
GDBserver, because he has concern that my patch seres put GDB into
an intermediate state. It will last a long time if we can't
provide the design in GDBserver.
* Upstream patches review. [1/10]
Review 10~ patches about dwarf pieces.
* Take care of Linux kernel awareness upstreams.
Sync with Omair, and ask to ping to IBM to update their patches.
# Plan #
* Continue the GDB target description change discussions.
* Push my approved patches.
--
Yao Qi
== Progress ==
o Linaro GCC/Validation (7/10)
* Completed and deployed release automation job
* Completed and deployed GCC 5, 6 and 7 2017.05 source snapshots
* Completed stable release binaries (5.4 and 6.3 2017.05),
ready for publication.
* Preparing 7.1 2017.05 release candidate
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Finish 7.1 rc
o Upstream monitoring reporting
o Off Thursday and Friday
== Progress ==
* [ARM GlobalISel] TableGen ISel for ADD/SUB [TCWG-1119] [1/10]
- Committed upstream
* [GlobalISel] AArch64 test-suite and self-host [TCWG-1074] [3/10]
- Found that we can't self-host anymore with GlobalISel, we get a
segfault in one of the tests
- After investigations it turned out to be because we run out of stack space
- Discussed upstream and did a couple more experimental runs with
various other patches / flags
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033] [3/10]
- Work in progress on supporting arrays
* Misc [3/10]
- Meetings, mailing lists, buildbots
- Investigated some timeouts that have started showing up in some of
our buildbots; will probably have to wrap up next week
== Plan ==
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033]
* [GlobalISel] AArch64 test-suite and self-host [TCWG-1074]
== This Week ==
* TCWG-1005 (6/10)
- Reworked patch based on upstream feedback
- Working through ICE's caused with the changes.
* PR80806 (2/10)
- Submitted patch upstream
* type promotion (1/10)
- Going thru Kugan's patch and mailing list discussions.
* Misc (1/10)
- Meetings
== Next Week ==
- TCWG-1005, gcc bugs
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2017.05
snapshot of Linaro GCC 5, 6 and 7 source packages.
o The GCC 7 series introduced an ABI change for ARM targets by fixing a bug
(present since GCC 5, see link below) that affects conformance to the procedure
call standard (AAPCS). The bug affects some C++ code where class objects are
passed by value to functions and could result in incorrect or inconsistent code
being generated. If the option -Wpsabi is enabled (on by default) the compiler
will emit a diagnostic note for code that might be affected by this ABI change.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
For an explanation of the changes please see the following website:
https://gcc.gnu.org/gcc-7/changes.html
o Linaro GCC 7 monthly snapshot[1] is based on FSF GCC 7.1+svn247824 and
includes performance improvements and bug fixes backported from mainline GCC.
The contents of this snapshot will be used for the first stable[2] quarterly
release in the GCC 7 series.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 7.1+svn247824
* Backport of [AArch32] Allow combination of aprofile and rmprofile multilibs
* Backport of [AArch32] Define TM_MULTILIB_CONFIG for ARM multilib
* Backport of [AArch32] Rename FPSCR builtins to correct names
* Backport of [AArch32] Set mode for success result of atomic compare and swap
* Backport of [AArch64] Enable AUTOPREFETCHER_WEAK with -mcpu=generic
* Backport of [AArch64] Improve address cost for -mcpu=generic
* Backport of [AArch64] Update alignment for -mcpu=generic
* Backport of [Testsuite] Require c99_runtime for pr78622.c
o Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.3+svn247789 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the 2017.08 stable[2] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.3+svn247789
* Backport of [Bugfix] [AArch32] PR target/71607: Fix ICE when loading constant
* Backport of [AArch32] Add support for -mpure-code option
* Backport of [AArch32] Enable Purecode for ARMv8-M Baseline
* Backport of [AArch32] Fix arm-netbsdelf bootstrap
* Backport of [AArch32] Fix pure-code test
* Backport of [AArch32] Fix testism with pure-code tests for non
Cortex-M targets
* Backport of [AArch32] Fix type for .init_array.* and .fini_array.* sections
* Backport of [AArch64] Fix type for 1-element load
* Backport of [AArch64] Model Cortex-A53 load forwarding
o Linaro GCC 5 monthly snapshot[1] is based on FSF GCC 5.4+svn247822 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the next maintenance release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.4-2017.05/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.4+svn247822
o Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
Achievements:
Spent all week on investigating a potential problem with the Gold
--fix-cortex-a53-843419 erratum fix (The ADRP on 0xff8/0xffc boundary)
- Managed to reproduce with a smaller example, although still using LTO
- Diagnosed the cause of object with errata stubs being relocated
after the stub table has been relocated
-- Most likely to hit LTO as the object from the LTO plugin will
always be last in the task queue, but the stub table is relocated when
the object that "owns" it is relocated, this is often not the LTO
object.
-- In theory it should be reproducible without LTO and a linker script
-- Workaround for LTO is to create an Output Section just for LTO (The
stub table is always owned by the LTO object)
Plans for next week:
- See if I can reproduce Gold errata problem without LTO
- Report Gold errata problem upstream
- Get back to LLD range thunk work
- Investigate SBREL32 relocation support in LLD, upstream PR32924
- Look at fixing missing Thumb2 modified immediate fixup PR28647
* Day off (2/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* GCC 5, 6 and 7 2017.05 source snapshots:
- Completed backports
- Troubleshot GCC 5 and 5 branch merges regressions
* Re-working release automation job
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Complete monthly snapshots and releases
o Continue release automation
Short week (1 day off)
== Progress ==
* Infrastructure:
- patch reviews
- worked around regression-detection failures caused by some tests
in tcwg-regression
- added job to check our gcc-7 toolchain when a component is updated
* Benchmarking:
- troubleshooting systems configs
- at last, first run on aarch64 triggered via jenkins
* Snaphots
- backports & reviews
* GCC:
- reported a few regressions upstream
* misc (conf-calls, meetings, emails, ....)
== Next ==
* benchmarking
== Progress ==
* Remove environment variables [TCWG-1114] [1/10]
- Committed
* [ARM GlobalISel] TableGen ISel for ADD/SUB [TCWG-1119] [5/10]
- Committed a change to the legalizer so that we widen narrow
operations (since we only have patterns for the 32-bit versions)
- Committed support for G_ANYEXT, which is introduced by the
legalizer while widening things and which we need to handle in the
rest of the pipeline
- Have a patch in upstream review fixing a TableGen bug
* [GlobalISel] AArch64 test-suite and self-host [TCWG-1074] [2/10]
- Ran the test-suite and self-host on AArch64 for GlobalISel -O0
- Committed a tiny fix for a test-suite application that was failing
because GlobalISel doesn't lower fabs to hardware operations, so we
had to link with -lm
* Misc [2/10]
- Buildbots (reverted stuff), meetings, mailing lists
- Helped organize another LLVM social in Stockholm; we got really
good feedback so far
== Plan ==
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033]
* Other GlobalISel stuff
* Probably wrap up TCWG-1074, we're really close to making the switch
# Progress #
* GDB 8.0 release. TCWG-1050, [1/10]
Nothing new. Make sure Linaro GCC 7 release can pick up GDB 8.
* SVE GDB. TCWG-1040, [6/10]
** Finish sve gdb target description doc, and send it to Alan.
The work needed in GDB side becomes more and more clear, however,
it is still unclear in GDBserver side.
** Post my patches about unit test to value/register conversion
gdbarch hooks.
** Post my RFCs to make GDB target descriptions more flexible.
* Misc, [3/10]
** Learn C++ template.
** Some patches review upstream.
# Plan #
* Upstream my GDB disassembler patch, which unify the disassembler
selection in both gdb and objdump.
* Back to the work on handling function pointer assignment in thumb
mode. TCWG-333.
--
Yao Qi
* Day off (2/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* Release Automation:
- 6.3 2017.05 RC1: Done
- Preparing Linaro GCC 7 snapshot and RC
* Backport for 2017.05 source snapshots
* Reviews...
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Make 2017.05 snapshots (6 and 7)
o Continue release automation
Progress:
- Re-implemented range thunks based on recent upstream changes and
sent for review. No comments as yet.
This is likely to be an ongoing conversation with upstream that won't
take all my time up so I've been looking at some additional stuff
outside of range thunks.
- Looked at PR28647 in llvm-mc, preventing openssl from being compiled
with clang. Investigated to the point where I know what we should do
next to fix. Next steps will be implementation.
- Looked into a problem reported internally in ARM in gold's erratum
--fix-cortex-a53-843419 on a large program using LTO. The patch is not
being applied correctly leading to segfaults at run-time. This is
likely to take some time to pin down as simple attempts to reproduce
have failed. There is an upstream PR reporting a similar set of
symptoms that looks like it could be the same thing but there is no
useful information or investigation in it:
https://sourceware.org/bugzilla/show_bug.cgi?id=21062
- Looked into lld PR32924, someone asking for RWPI support in lld,
someone at least is keen to get embedded systems support into lld.
Plans:
- Continue looking into above PRs
== Progress ==
* Monday off [2/10]
* [ARM GlobalISel] Use TableGen for inst selector [TCWG-1037] [1/10]
- Committed upstream
* Remove environment variables [TCWG-1114] [1/10]
- Almost ready to send another patch for review
* Lund Linux Conference [6/10]
== Plan ==
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033]
* Other GlobalISel stuff
* Monday off. [2/10]
# Progress #
*GDB 8.0 release, TCWG-1050. [2/10]
** Intel btrace python api patches are pushed in, and all intel
specific stuff are removed from the python apis before release,
Phew!
** GDBserver arm-linux software single step. More issues are found,
can't catch 8.0 release.
** 8.0 release candidate is created.
* SVE, TCWG-1040, [5/10]
** All my regcache class-fy patches are committed. Unblock some
Alan's patches.
** One patch review.
** Post preparatory patches for my value/register conversion unit
test patches.
** Think about how to change GDB target descriptions for SVE, and
write them down. Turns out these problems are not specific to
SVE, they are already there but SVE make them worse that we should
fix. Ongoing.
* Upstream review, [1/10]
** Review one kernel-awareness patch.
** Review OpenRISC GDB patches.
# Plan #
* Finish the doc about GDB target description changes for SVE, and
send it to Alan.
* Upstream my patches about unit test to value/register conversion
gdbarch hooks.
* Upstream my GDB disassembler patch, which unify the disassembler
selection in both gdb and objdump.
--
Yao Qi
