# Progress #
* TCWG-167, ARM reverse debugging bug fixes. [4/10]
Four patches are committed. All FAILs are fixed if test case is
compiled with -fomit-frame-pointer. Some FAILs when
-fno-omit-frame-pointer are caused by epilogue unwinder doesn't parse
epilogue correctly if FP is involved. File TCWG-562 to track it.
* TCWG-545, TCWG-547, patches are pending. Maintainer is busy on
something else.
* Triage the regression gdb.base/jit.exp. [1/10]
We need a pending patch series to address this issue. Ask Pedro how
to review them.
* TCWG-561, handle unavailable memory during frame unwinding. [3/10]
Think about it and write a prototype.
* Misc, patches review and meeting, [2/10].
# Plan #
* Take a look at the slow native arm-linux-gnueabihf gdb test.
* TCWG-562, Tweak epilogue unwinder to handle FP.
* TCWG-545, TCWG-547, ping.
* TCWG-561, finish the prototype.
--
Yao
My dear friends,
I'm trying to build C++ code for Linux running on am ARM Cortex A8 (TI
AM335x). For a first try, I'm using the simplest program I can think of:
/* main.cpp */
int main() {
return 0;
}
Under Linux with the 'normal' GCC, that works fine, but under Windows 7
with the Linaro toolchain, it fails with the following message:
C:\firedect\dev\workspace\Test-Linux-ARM_1> "\Program Files (x86)\GNU
Tools ARM Embedded\gcc-linaro-4.9-2016.02-i686-ming
w32_arm-linux-gnueabi\bin\arm-linux-gnueabi-g++.exe" main.cpp
c:/program files (x86)/gnu tools arm
embedded/gcc-linaro-4.9-2016.02-i686-mingw32_arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/4.9.4/../../../../arm-linux-gnueabi/bin/ld.exe:c:/program
files (x86)/gnu tools arm
embedded/gcc-linaro-4.9-2016.02-i686-mingw32_arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/4.9.4/../../../../arm-linux-gnueabi/lib/libstdc++.so:
file format not recognized; treating as linker script
c:/program files (x86)/gnu tools arm
embedded/gcc-linaro-4.9-2016.02-i686-mingw32_arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/4.9.4/../../../../arm-linux-gnueabi/bin/ld.exe:c:/program
files (x86)/gnu tools arm
embedded/gcc-linaro-4.9-2016.02-i686-mingw32_arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/4.9.4/../../../../arm-linux-gnueabi/lib/libstdc++.so:1:
syntax error
collect2.exe: error: ld returned 1 exit status
C:\firedect\dev\workspace\Test-Linux-ARM_1> "\Program Files (x86)\GNU
Tools ARM Embedded\gcc-linaro-5.3-2016.02-i686-ming
w32_arm-linux-gnueabihf\bin\arm-linux-gnueabihf-g++.exe" main.cpp
c:/program files (x86)/gnu tools arm
embedded/gcc-linaro-5.3-2016.02-i686-mingw32_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld.exe:c:/program
files (x86)/gnu tools arm
embedded/gcc-linaro-5.3-2016.02-i686-mingw32_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/lib/libstdc++.so:
file format not recognized; treating as linker script
c:/program files (x86)/gnu tools arm
embedded/gcc-linaro-5.3-2016.02-i686-mingw32_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld.exe:c:/program
files (x86)/gnu tools arm
embedded/gcc-linaro-5.3-2016.02-i686-mingw32_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/lib/libstdc++.so:1:
syntax error
collect2.exe: error: ld returned 1 exit status
As you can see, I have tested two versions of the toolchain, which show
the same behavior.
Do you have any idea what's going wrong here? I'd appreciate any help
you can provide!
--
Kind regards,
Gunnar Arndt
Hi list,
I hit another weird problem after use gcc 5.3 (If I use gcc 4.9, there is no any
issue) with android.
With arm gcc 5.3, the C++ apps crash in one class constructor call. And gdb
shows some vtbl items of the class are not relocated.
With arm gcc 4.9, if set breakpoint in that constructor, we could see the vtbl
items of the class are relocated.
And Yes. I know the android bionic loader take response to do relocation. But if
it works with gcc 4.9, I suppose bionic loader work well (unless gcc 5.3 create
some new situation not handled by it).
I attached the vtbl dump in gdb for gcc 5.3 and 4.9 both. We could see all valid
entries in vtbl are relocated in 4.9 dump. But not all entries in vtbl are
relocated in 5.3 dump (the address is not started with 0xf).
Suggestions/hints are welcome. Thanks a lot.
Regards
Yin, Fengwei
On Thu, Mar 31, 2016 at 5:12 AM, fengwei.yin <fengwei.yin(a)linaro.org> wrote:
> Because gcc 4.9 could build this file without any issue, I apply
> --save-temps
> with gcc 4.9. The ii file is attached. Can't see significant differences.
There is a patch in gcc-5 to make unified assembler syntax the
default. Unfortunately, it changes how extended asms work, which is
perhaps a bug. The message claims it doesn't affect extended asms,
but it does.
https://gcc.gnu.org/ml/gcc-patches/2015-11/msg01196.html
The interesting bit is the change to ASM_APP_OFF.
gcc-4.9 emits a .thumb after the extended asm to switch back into
thumb mode just in case. gcc-5.3 instead emits .syntax unified, which
doesn't change the arm/thumb mode, just the syntax supported. This is
arguably a bug, but this doesn't immediately help you. It could take
a little time to get gcc-5.x source fixed, and then the compiler
binary releases. Or alternatively we could fix the asm to work with
gcc 5.
Jim
== Progress ==
o Extended validation (7/10)
* Fixed and improved extended native validation
* Discussed proposed patch in dejagnu on process killing mechanism
* Testing a fix/workaround in GCC guality tests
* Re-implemented and tested fix for dejagnu remote layout
o Misc (3/10)
* Various meetings
== Plan ==
o Continue on extended validation
o Finalize DejaGNU patches, GCC ARMv8.1 builtins fix.
== This week ==
* Bugzilla 69008 - gcc emits unneeded memory access when passing trivial
structs by value (ARM) (3/10)
- Additional investigation and preliminary implementation
* Bugzilla 70089 - ARM/THUMB unnecessarily typecasts some rvalues on
memory store (1/10)
- Investigation
* TCWG-247 - Create Validation Job to run on GCC Trunk Committ (5/10)
- Began writing shell script.
* Misc meeting (1/10)
== Next week ==
* TCWG-247
- Make additional prgoress on prototype
* Bugzilla 69008 - gcc emits unneeded memory access when passing trivial
structs by value (ARM)
- Additional investigation and preliminary implementation
* Bugzilla 70089 - ARM/THUMB unnecessarily typecasts some rvalues on
memory store
- Investigation
* Vacation
- April 8 - April 12
== Progress ==
* Holiday (2/10)
* Support (1/10)
- Reapplying fix for PR16275 (D18701)
- Conclusion is that original approach will be the same as GCC
- Additional flags will have to be agreed upon across compilers
* Buildbot (2/10)
- Setting up LLDB buildbot with Omair
- Precarious infrastructure is unstable, hope it holds on until the
new rack is complete
* Background (5/10)
- Code review, meetings, discussions, general support, etc.
- More team management stuff (access/procedure/meeting with newcomers)
- Planning the lab move, resources, costs, schedule
* Monday off [2/10]
# Progress #
* TCWG-167, ARM reverse debugging bug fixes. [4/10]
Two patches are posted. Two patches are being tested. They fix
207 FAILs (242 -> 35) in gdb.reverse.
* TCWG-545, no progress, patches are pending for review.
* TCWG-547, [2/10]. Write a patch as Pedro suggested, so we have
sense which patch is better. No response.
* Misc, [2/10]
** Upstream discussions on get syscall number on execve exit. Can't
get such thing from kernel side, need to figure out how to do it
in GDB side.
** Investigate a little bit on 32-bit DWARF on AArch64.
# Plan #
* TCWG-167, TCWG-545, TCWG-547
--
Yao
== This Week ==
* LTO (7/10)
a) TCWG-534 (ipa-comdats):
- Patch posted upstream: https://gcc.gnu.org/ml/gcc/2016-03/msg00254.html
- Investigating ICE with patch for comdat-2.C
b) TCWG-128 (branch out of range error):
- Posted patch upstream:
https://gcc.gnu.org/ml/gcc-patches/2016-04/msg00032.html
c) intra-procedural vrp:
- Looking to implement replacement_order algorithm for early vrp from the paper:
https://engineering.purdue.edu/paramnt/publications/1381.pdf
* Validation (2/10)
- Reviews on tcwg-buildapp from Christophe and Maxim
- prototype job ran successfully.
* Misc (1/10)
- Meetings
== Next Week ==
* LTO:
- Try to implement replacement order algorithm for vrp
- Continue investigating ipa-comdats ICE and address upstream comments.
- Gather stats for chromium LTO build
* Validation:
- write script to build chromium
On Wed, Mar 30, 2016 at 6:26 PM, fengwei.yin <fengwei.yin(a)linaro.org> wrote:
> Thanks a lot for your quick response. The .ii file was attached.
In UnwindFromContext, there is an asm that forces the assembler into ARM mode.
if (ucontext == nullptr) {
int ret = (({ unw_tdep_context_t *unw_ctx = (&context_); register unsigned \
long *unw_base asm ("r0") = unw_ctx->regs; __asm__ __volatile__ ( ".align 2\nbx\
pc\nnop\n.code 32\n" "stmia %[base], {r0-r15}\n" "orr %[base], pc, #1\nbx %[ba\
se]" : [base] "+r" (unw_base) : : "memory", "cc"); }), 0);
The ".code 32" puts us in ARM mode.
GCC still thinks that we are in thumb mode though, and continues to
emit thumb instructions, some of which have no arm mode equivalent,
e.g. cbnz and cbz.
I don't see any convenient push/pop for thumb/arm mode. This is
probably a macro expanded into the asm. You could have two versions
of the asm, one that gets used when __thumb__ is defined and one that
gets used when __thumb__ is not defined. The __thumb__ version would
switch back into thumb mode at the end with a ".thumb" pseudo-op.
Or alternatively, don't build with -mthumb.
Jim
Hi folks,
I am trying to use arm gcc 5.3 to build part of android AOSP and hit
following issue with arm gcc 5.3:
The gcc cmd line is like:
/opt/work/acadine/mem_shrink/B2G-v2.5/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-5.3-linaro/bin/arm-linux-androideabi-g++
-I external/libcxx/include -I system/core/libbacktrace -I
out/target/product/linaro_arm/obj/SHARED_LIBRARIES/libbacktrace_intermediates
-I
out/target/product/linaro_arm/gen/SHARED_LIBRARIES/libbacktrace_intermediates
-I libnativehelper/include/nativehelper -I system/core/base/include -I
external/libunwind/include -isystem system/core/include -isystem
system/media/audio/include -isystem hardware/libhardware/include
-isystem hardware/libhardware_legacy/include -isystem
hardware/ril/include -isystem libnativehelper/include -isystem
frameworks/native/include -isystem frameworks/native/opengl/include
-isystem frameworks/av/include -isystem frameworks/base/include -isystem
out/target/product/linaro_arm/obj/include -isystem
bionic/libc/arch-arm/include -isystem bionic/libc/include -isystem
bionic/libc/kernel/uapi -isystem bionic/libc/kernel/uapi/asm-arm
-isystem bionic/libm/include -isystem bionic/libm/include/arm -c
-fno-exceptions -Wno-multichar -msoft-float -ffunction-sections
-fdata-sections -funwind-tables -fstack-protector -Wa,--noexecstack
-Werror=format-security -D_FORTIFY_SOURCE=2 -fno-short-enums
-no-canonical-prefixes -fno-canonical-system-headers -march=armv7-a
-mfloat-abi=softfp -mfpu=vfpv3-d16 -include
build/core/combo/include/arch/linux-arm/AndroidConfig.h -I
build/core/combo/include/arch/linux-arm/ -Wno-psabi -mthumb-interwork
-DANDROID -fmessage-length=0 -W -Wall -Wno-unused -Winit-self
-Wpointer-arith -Werror=return-type -Werror=non-virtual-dtor
-Werror=address -Werror=sequence-point -DNDEBUG -g -Wstrict-aliasing=2
-fgcse-after-reload -frerun-cse-after-loop -frename-registers -DNDEBUG
-UDEBUG -fvisibility-inlines-hidden -DANDROID -fmessage-length=0 -W
-Wall -Wno-unused -Winit-self -Wpointer-arith -Wsign-promo -std=gnu++11
-Werror=return-type -Werror=non-virtual-dtor -Werror=address
-Werror=sequence-point -DNDEBUG -UDEBUG -mthumb -Os -fomit-frame-pointer
-fno-strict-aliasing -fno-rtti -Wall -Werror -fPIC -D_USING_LIBCXX
-std=gnu++11 -Werror=int-to-pointer-cast
-Werror=pointer-to-int-cast -MD -MF
out/target/product/linaro_arm/obj/SHARED_LIBRARIES/libbacktrace_intermediates/UnwindCurrent.d
-o
out/target/product/linaro_arm/obj/SHARED_LIBRARIES/libbacktrace_intermediates/UnwindCurrent.o
system/core/libbacktrace/UnwindCurrent.cpp
And I got error:
/tmp/ccZ40ViQ.s: Assembler messages:
/tmp/ccZ40ViQ.s:1752: Error: selected processor does not support ARM
mode `cbnz r6,.L91'
/tmp/ccZ40ViQ.s:1758: Error: selected processor does not support ARM
mode `cbnz r0,.L92'
/tmp/ccZ40ViQ.s:1763: Error: selected processor does not support ARM
mode `cbz r1,.L107'
/tmp/ccZ40ViQ.s:1941: Error: selected processor does not support ARM
mode `cbz r6,.L100'
But if I use the arm gcc 4.9, there is no any build issue.
the "-dumpspecs" output of gcc 5.3 was attached. Thanks.
Regards
Yin, Fengwei
The Linaro Binary Toolchain
============================
The Linaro GCC 4.9-2016.02 Release is now available.
Notice: All Linaro GCC 4.9 series toolchain users should migrate to
the latest version of the Linaro GCC 4.9 toolchain in order to
mitigate potential security exposure to CVE-2015-7545. See the NEWS
section below for details.
Download release packages from:
http://releases.linaro.org/components/toolchain/gcc-linaro/4.9-2016.02/http://releases.linaro.org/components/toolchain/binaries/4.9-2016.02/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 4.9-2016.02
FSF eglibc 2.19 (eglibc.git/linaro_eglibc-2_19)
Linaro newlib 2.1.0-2014.09 (linaro_newlib-branch)
Linaro binutils 2.24 (linaro_binutils-2_24-branch)
FSF GDB 7.10 (gdb-7.10-branch)
Linaro Linux Version 3.17-2014.10 (linux-linaro-3.17-2014.10)
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search
NEWS for Linaro GCC 4.9-2016.02
================================
* The armv8l-linux-gnueabihf targetted toolchain is now built using
--with-mode=thumb (like all of the other cross toolchains) rather than
the default which is ARM mode.
* Applied fix for CVE-2015-7545 - A stack-based buffer overflow in
glibc's getaddrinfo() was corrected in glibc 2.23 and backported into
Linaro eglibc 2.19 (linaro_eglibc-2_19).
https://sourceware.org/ml/libc-alpha/2016-02/msg00416.html
* See the following Linaro GCC snapshot:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/4.9-2015.10/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
--
Ryan S. Arnold | Linaro Toolchain Engineering Manager
ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net
The Linaro Binary Toolchain
============================
The Linaro GCC 4.9-2016.02-rc1 Release-Candidate is now available.
Notice: All Linaro GCC 4.9 series toolchain users should migrate to
the latest version of the Linaro GCC 4.9 toolchain in order to
mitigate potential security exposure to CVE-2015-7545. See the NEWS
section below for details.
Download release-candidate packages from:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/4.9-2016.02-rc1/http://snapshots.linaro.org/components/toolchain/binaries/4.9-2016.02-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 4.9-2016.02-rc1
FSF eglibc 2.19 (eglibc.git/linaro_eglibc-2_19)
Linaro newlib 2.1.0-2014.09 (linaro_newlib-branch)
Linaro binutils 2.24 (linaro_binutils-2_24-branch)
FSF GDB 7.10 (gdb-7.10-branch)
Linaro Linux Version 3.17-2014.10 (linux-linaro-3.17-2014.10)
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search
NEWS for Linaro GCC 4.9-2016.02-rc1
====================================
* Applied fix for CVE-2015-7545 - A stack-based buffer overflow in
glibc's getaddrinfo() was corrected in glibc 2.23 and backported into
Linaro eglibc 2.19 (linaro_eglibc-2_19).
https://sourceware.org/ml/libc-alpha/2016-02/msg00416.html
* See the following Linaro GCC snapshot:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/4.9-2015.10/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
--
Ryan S. Arnold | Linaro Toolchain Engineering Manager
ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net
== Progress ==
* Validation
- extended validation: updated ABE patch after review
- investigating how to actually separate stdout/stderr streams in dejagnu
- still seeing random results (mostly in the sanitizers tests) in
the Cambridge lab
* GCC
- no progress on Win32-hosted toolchain bug: cannot reproduce it
from a manually built toolchain
- advSIMD/Neon intrinsics tests: cleanup on-going
- bug 2125: forwarded upstream, quickly fixed by R.Biener, backport
in progress
- Misc (conf-calls, meetings, emails, ...)
== Next ==
* Validation:
- more on extended validation
- random tests investigation
- more on stdout/stderr
* GCC:
- trunk monitoring, report regressions if needed
- intrinsics tests cleanup
o Easter Monday off (2/10)
== Progress ==
o Extended validation (5/10)
* Worked on benchmarking integration
* Analyzed failures due to --tarbin and --check ABE's flags
* Analyzed native AArch32 timeout (due to guality/GDB testcase)
o Misc (3/10)
* Various meetings
== Plan ==
o Continue on extended validation
o Finalize DejaGNU patches, GCC ARMv8.1 builtins fix.
== Progress ==
* Type promotion pass (6/10)
- Fixed major false positive uninit warnings
= Changed tree-ssa-uinit to handle SEXT_EXPR
= preserving TREE_NO_WARNING set by SRA
= Somemore fixes to preserve debug loc
- There are still some more but this is mainly due to how
tree-ssa-uinit is designed
- Working through the output patterns; some are simple changes but
some needs more analysis
- Planning to create a branch with the latest version for easy review
* Bugs (1/10)
- PR70359
* Misc (1/10)
- GCC Lists
* Public holiday (2/10)
== Plan ==
* Type promotion pass benchmarking
* Perf with LTO
== This week ==
* Bugzilla 69663 - [ARM] Implement overflow arithmetic standard names (4/10)
- Resolved all thumb2 failures
- Posted new patch upstream
* TCWG-247 - Create Validation Job to run on GCC Trunk Commits (1/10)
- Investigation into Python API for discovering when Jenkins builders
are idle
* Laptop hardware failure debugging (2/10)
- Requested a new laptop from Arm
* Misc meeting (1/10)
* Good Friday holiday (2/10)
== Next week ==
* TCWG-247
- Create prototype implementation
== This Week ==
* LTO (4/10)
- Committed r234490 to fix PR70366
- Spent unnecessary time tracking down known (invalid) bug PR65778
- LTO and branch out of range error:
- patch to introduce max partition size param
- experimenting with partition sizes to find value close to 16 mb limit.
* Validation (2/10)
- Pushed script to it's own repo
- Reviews from Christophe on tcwg-buildapp job
* Public Holidays (4/10)
== Next Week ==
- Continue ongoing tasks
== Progress ==
* Support (2/10)
- Investigating a bit more PR16275, need some bigger changes in Clang/LLVM
* Background (6/10)
- Code review, meetings, discussions, general support, etc.
- Planning for a bigger team (git, Jenkins, infrastructure, documentation)
- Receiving new team members, planning start up tasks
- Android NDK discussion, investigation
Realising my activity report has been almost useless for the past month or so...
# Progress #
* TCWG-532, done. [1/10]
Canonicalize ARM syscall patch is committed.
* TCWG-167, patch is posted for review. [4/10]
Add ARM epilogue unwinder in GDB, which fixes many gdb.reverse test
fails.
* TCWG-545, V2 are posted. [1/10]
* TCWG-547, [2/10] patches are reviewed, almost OK, but some changes are
needed.
* Talk with Jojo Ma.
* Open tickets to install buildbot-slave on gcc compile farm for GDB
buildbot setup.
# Plan #
* Holiday on Friday and next Monday.
* TCWG-167, TCWG-545, TCWG-547.
--
Yao
== Progress ==
* Validation
- extended validation: submitted ABE patch for discussion
- noticed random results on some tests in the Cambridge lab.
maybe caused by excessive load on the tester, or stdout/stderr problems
- investigating how to actually separate stdout/stderr streams in dejagnu
* GCC:
- branch merge review for 2016.03 snapshot
- AdvSIMD/Neon intrinsics tests: more cleanup, wondering about
poly128_t prototypes
* Misc (conf calls, meetings, emails, ....)
== Next ==
* Validation:
- more on extended validation
- random tests investigation
- more on stdout/stderr
* GCC:
- trunk monitoring, report regressions if needed
- intrinsics tests cleanup
== This Week ==
* LTO (3/10)
a) section anchors:
- prototype patch to bind functions to global vars
- looked at balanced partitioning
b) chromium LTO build fails with ICE on trunk for arm-linux-gnueabihf:
http://pastebin.com/sX6yKLBP
c) ipa-comdat
- Looked at the pass.
- trying to address TODO: put symbol in it's own comdat section
* Validation (1/10)
- prototype job in bash.
* Holidays (6/10)
== Next Week ==
Continue ongoing tasks
Port to microinstance - TCWG-432 [5/10]
* Non-lab side of minimal trust benchmarking
* More investigation of runtime anomalies
* Reordered builder phases to do useful work while waiting for targets
* Updated everything to work with benchmarking LAVA user (rather than
running as me)
Automated backport benchmarking - TCWG-352 [2/10]
* Cycles of review/development/testing
Controlled image builds - TCWG-360 [1/10]
* More failures to get image to boot on Juno
Log critical data - TCWG-349 [1/10]
* Everything now logged, except where it depends on TCWG-360
Misc - [1/10]
=Plan=
Finish non-lab side of minimal trust benchmarking
Commit backport benchmarking, review permitting
Tweak microinstance in reaction to lab work
More Juno image work
More runtime anomaly work
=Availability=
Off from this Friday, back for three days from Monday 4th April
Return to ARM on Thursday 7th April
== This week ==
* Bugzilla 69663 - [ARM] Implement overflow arithmetic standard names (5/10)
- Resolved 50% of thumb2 failures
- Resolved issues with overlapping registers and not setting
condition codes
- Wrote compile only test cases that pass validation
* TCWG-247 - Create Validation Job to run on GCC Trunk Commits (2/10)
- Investigation into Python API for discovering when Jenkins builders
are idle
* Linaro connect recovery day (2/10)
* Misc meeting (1/10)
== Next week ==
* Bugzilla 69663 - [ARM] Implement overflow arithmetic standard names
- Resolve remaining thumb2 issues
* TCWG-247
- Create prototype implementation
= Progress ==
* Day off (2/10)
- After Connect, recuperating, jet lagging
* EuroLLVM (6/10)
- Flying Wed to Barcelona, attending conference
- Back on Saturday
* Background (2/10)
- Code review, meetings, discussions, general support, etc.
- Planning for a bigger team (git, Jenkins, infrastructure)
* Sick on Monday [2/10]
# Progress #
* AArch64/ARM linux syscall for process record. [2/10] TCWG-532
ARM patch (fixing the register for syscall arg pass) is committed.
Canonicalize ARM syscall patch is posted for review.
* Support range stepping on arm-linux. [4/10] TCWG-545
Preparatory patches fixing bugs when "single step the instruction
branch to itself" are being reviewed. Pedro thinks my patches may
not work in some rare cases, and I spend some time writing the case
and prove it won't happen.
* Misc [2/10]
** file expense,
** upstream patch review,
# Plan #
* TCWG-532
* TCWG-545
--
Yao
The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2016.03 snapshot of the Linaro GCC 5 source package.
This monthly snapshot[1] is based on FSF GCC 5.3+svn234210 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2016.05
stable [1] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.03/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.3+svn234210
* Backport of [Bugfix] [AArch64] [Linaro #1994] Disable
pcrelative_literal_loads with fix-cortex-a53-843419
* Backport of [Bugfix] [AArch64] [Linaro #2123] Fix dependency of gcc-plugin.h
* Backport of [Bugfix] [AArch32] PR target/62554 target/69610 Fix for ARMv3
* Backport of [Bugfix] [AArch32] PR target/69161: Don't ignore mode
when matching comparison operator in cstore-like patterns
* Backport of [AArch32] Enable instruction fusion of AES instructions
on ARM for Cortex-A53 and Cortex-A57
* Backport of [AArch64] Add missing return in aarch64_internal_mov_immediate
* Backport of [AArch64] Enable instruction fusion of dependent AESE;
AESMC and AESD; AESIMC pairs
* Backport of [AArch64] Fix installed plugin headers for aarch64, m68k and c6x
* Backport of [AArch64] GCC 6 regression in vector performance. - Fix
vector initialization to happen with lane load instructions
* Backport of [AArch64] Restrict 16-bit sqrdml{sa}h instructions to FP_LO_REGS
* Backport of [Testsuite] [AArch64] add check for aarch64 in
check_effective_target_section_anchors
* Backport of [Testsuite] Print markers to stderr to avoid races with
sanitizer output
* Backport of [Misc] Fix ChangeLog for 233518
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
[2]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
== Progress ==
o BKK16 remote (5/10)
* Followed TCWG sessions
* Extended validation:
- worked with Kugan
- implemented job for native validation
o GCC dev. (4/10)
* Remote validation sanitizing:
- iterate on the output pattern fix
- testing a fix for stderr/stdin ordering issue
* Gave some support on __sync builtins, preparing a fix for armv8.1
o Misc (1/10)
* Various meetings
== Plan ==
o GCC 5 branch merge, and 2016.03 snapshot
o Continue on-going tasks
Port to microinstance - TCWG-432 [17/10]
* Investigating difference between LAVA and 'desktop Juno' runtimes
** Some of this was down to piles of /dev/console output - redirecting
to file improved SPEC build time by 75%!
** Some cases make sense, others remain unexplained
** Might just go away if we update the Juno image
* Wrote up how to do benchmarking for minimal-trust cases
** Needs both lab and development work
* Merged another large tranche of changes back to benchmarking branch
** Microinstance more or less functional, main instance benchmarking
seems unbroken
** But some more tweaks to make as Lab work happens
* Prepared backport benchmarking for merge
Misc [3/10]
=Plan=
* Submit backport benchmarking for review
* Tweak uinstance in reaction to lab work
* Implement the non-lab side of minimal-trust benchmarking
* Return to looking at Juno image generation
* Look some more at LAVA/desktop runtime differences
* Implement small improvements, if time
== This week ==
* Bugzilla 69663 - [ARM] Implement overflow arithmetic standard names (3/10)
- Resolved thumb2 failures
- Negdi2 was not generating instruction to set condition codes
* Bugzilla 70008 - [ARM] Reverse subtract with carry can be generated in
thumb2 mode (1/10)
- Created new patch using new predicate that matches arm and thumb2
constraints
- Received approval to GCC 7 stage 1
* Bugzilla 70014 - [ARM] Predicate does not match constraint
(*subsi3_carryin_const) (1/10)
- Fix checked into trunk
* Linaro Connect meetings (5/10)
== Next week ==
* Bugzilla 69663 - [ARM] Implement overflow arithmetic standard names
- Create compile only test cases and re-run validation testing
- Post new patch upstream
Hey,
Regarding the GCC ABI 5 issue, I was wondering what's the policy
behind updating packages on stable updates for both Debian and Ubuntu.
Our time frame is a bit constrained, and we definitely will have to
take some hard decisions in the next six months, so I'd like to
understand everything that is at stake before I have my own opinion.
LLVM has a 6 month major cycle, releasing around February / August.
Major releases are allowed to break the ABI. Major breakages need one
release warning period.
Ubuntu has a 6 month release cycle, around April / October. IIUC,
major releases are allowed to have new versions of packages, but
updates for the next few years have to keep within the same major
release.
Debian has a -1 years release cycle (heh), and has the same major /
minor policy, which makes it a lot harder to update major versions.
However, I believe unstable is still not closed, nor will be in August
this year, so updating to LLVM 3.9 will not be a problem, but it will
mean users will have to wait a bit more to get a working LLVM.
The time frame is then:
3.8.0 released March (without the fix)
Ubuntu X released April
3.9.0 releases August (hopefully with a fix)
Ubuntu X+1 released October
Debian freezes ??
LLVM 3.8.1 ??
If we don't back-port GCC ABI 5 into 3.8.1, Ubuntu users will not have
the fix ever, unless you *can* update to 3.9.0 in August.
Ubuntu X+1 will be fine using 3.9, as will Debian after August, unless
you guys freeze before that.
I believe both Debian and Ubuntu have a trunk-based LLVM package for
experimental use only, and it would be bad, but not completely broken,
to recommend users to use that meanwhile.
If Debian freezes *before* 3.9.0 is out, or if Ubuntu can't update to
3.9.0 on April's release, then we'll have a strong reason to back-port
the change to 3.8.x. If not, even though it will be uncomfortable for
users until August, the argument is not that strong and will be hard
to get it through.
Any comments? Ideas? Does any of that make sense?
cheers,
--renato
Hi,
I have been comparing the stock gcc 5.2 and the Linaro 5.2 (Linaro GCC
5.2-2015.11-1) and have noticed a difference with the __sync
intrinsics.
Here is the simple test case
--- cut here ---
int add_int(int add_value, int *dest)
{
return __sync_add_and_fetch(dest, add_value);
}
--- cut here ---
Compiling with the stock gcc 5.2 (-S -O3) I get
---------
add_int:
.L2:
ldaxr w2, [x1]
add w2, w2, w0
stlxr w3, w2, [x1]
cbnz w3, .L2
mov w0, w2
ret
---------
Wheras with Linaro gcc 5.2 I get
---------
add_int:
.L2:
ldxr w2, [x1]
add w2, w2, w0
stlxr w3, w2, [x1]
cbnz w3, .L2
dmb ish
mov w0, w2
ret
---------
Why the extra (unnecessary?) memory barrier?
Also, is it worthwhile putting a prfm before the ldaxr. EG
add_int:
prfm pst1strm, [x1]
.L2:
ldaxr w2, [x1]
See the following thread
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-July/355996.html
All the best,
Ed
== Progress ==
o GCC dev. (7/10)
* Remote validation sanitizing:
- fixed last issues in dejagnu patch and submitted it uptsream
- 2 more cleanup/fix dejagnu patches submitted and merged upstream
- proposed a fix/workaround for the output pattern issues (>400
failures removed with this patch)
o Misc (3/10)
* Various meetings
* internal discussions
== Plan ==
o Try to follow connect remotely
o Extended validation work
== Progress ==
* GCC bugs:
- #2073 tried to reproduce it with a manually-built toolchain. No luck
* GCC validation:
- added support to choose simulated cpu (different from --with-cpu)
* GCC:
- completing Neon intrinsics tests, to prepare cleanup
* Validation:
- small improvements
* Misc (conf calls, meetings, emails, ...)
== Next ==
Remote Connect
== Progress ==
* Support (5/10)
- Working on PR17193
- Continue review on D17141
* Background (5/10)
- Code review, meetings, discussions, general support, etc.
- Connect preparations
- GCC ABI 5 discussions
- Assessing Swift calling convention impact ARM back-end
- Interviews
# Progress #
* TCWG-545, Handle "branch-to-self" instruction in single stepping.
[5/10] Patches are posted upstream for review.
* TCWG-532, one patch is committed and one patch is posted for review.
[2/10]
* Tweak ARM process record. [2/10]
Two patches are pushed in. Many test fails are fixed.
* FSF patches review. [1/10].
# Plan #
* Linaro Connect.
--
Yao
Hi,
I have just switched to gcc 5.2 from 4.9.2 and the code quality does seem to have improved significantly. For example, it now seems much better at using ldp/stp and it seems to has stopped gratuitous use of the SIMD registers.
However, I still have a few whinges:-)
See attached copy.c / copy.s (This is a performance critical function from OpenJDK)
pd_disjoint_words:
cmp x2, 8 <<< (1)
sub sp, sp, #64 <<< (2)
bhi .L2
cmp w2, 8 <<< (1)
bls .L15
.L2:
add sp, sp, 64 <<< (2)
(1) If count as a 64 bit unsigned is <= 8 then it is probably still <= 8 as a 32 bit unsigned.
(2) Nowhere in the function does it store anything on the stack, so why
drop and restore the stack every time. Also, minor quibble in the
disass, why does sub use #64 whereas add uses just '64' (appreciate this
is probably binutils, not gcc).
.L15:
adrp x3, .L4
add x3, x3, :lo12:.L4
ldrb w2, [x3,w2,uxtw] <<< (3)
adr x3, .Lrtx4
add x2, x3, w2, sxtb #2
br x2
(3) Why use a byte table, this is not some sort of embedded system. Use
a word table and this becomes.
.L15:
adrp x3, .L4
add x3, x3, :lo12:.L4
ldr x2, [x3, x2, lsl #3]
br x2
An aligned word load takes exactly the same time as a byte load and we
save the faffing about calculating the address.
.L10:
ldp x6, x7, [x0]
ldp x4, x5, [x0, 16]
ldp x2, x3, [x0, 32] <<< (4)
stp x2, x3, [x1, 32] <<< (4)
stp x6, x7, [x1]
stp x4, x5, [x1, 16]
(4) Seems to be something wrong with the load scheduler here? Why not
move the stp x2, x3 to the end. It does this repeatedly.
Unfortunately as this function is performance critical it means I will
probably end up doing it in inline assembler which is time consuming,
error prone and non portable.
* Whinge mode off
Ed
== Progress ==
o GCC dev. (7/10)
* Remote validation sanitizing:
- Implemented and tested a pure dejagnu fix (the actual
implementation works fine for GCC but might be an issue in a different
context, a cleaner fix almost done)
- Found a latent issue in GCC profiling test harness
* ARM and AArch64 backends LRA cleanup:
- Looked at the remaining artifacts, will prepare a patch for GCC 7
o Misc (3/10)
* Various meetings
* internal discussions
== Plan ==
o Finalize and submit dejagnu fix
Port to microinstance - TCWG-432 [7/10]
* Merged last few months of development back to benchmarking branch
* Restored support for multiple targets per builder
* Updated builder landed, altered jobs to work with it
** Removed assumption that host filesystem is non-persistent
** Stacked up test runs for the weekend
Transfer secret management to LAVA [1/10]
* LAVA jobs now use a within-LAVA key to access sources
Misc [2/10]
* Unsuccessful fiddling with heat-monitoring tools on Juno
* Usual background of mail and meetings
=Plan=
* Fallout from weekend test runs
** Some failure is going on, need to investigate
* Update docs and Jenkins configs w.r.t. last week's activity
* Further investigation on a couple of LAVA issues that are causing me pain
** Un-deserializable bundles
** Inaccessible image reports
* Continue assessing target stability/looking at inconsistent results