== Progress ==
* Public holiday (2/10)
* zero/sign extension - TCWG-521 (2/10)
- Looked at profile results
- Starting aarch64 benchmarking
* TCWG-620 (2/10)
- Ran into missing pattern issue
- Discussed it with Maxim and Jim
* TCWG-753 (2/10)
- orted few issues with my backporting set-up after talking to Yvan
- Started all the backports
- Backport testing in progress
* Bug 1373 (1/10)
- Backport testing in progress
* Misc (1/10)
- gcc-patchs and gcc-bugs list
== Plan ==
* TCWG-620 and TCWG-521
Holiday: 03/04 [2/10]
# Progress #
* aarch64 gdb, 8 FAILs are fixed but 6 FAILs are introduced by the new
test case. [2/10]
** KFAIL two tests in gdb.threads/no-unwaited-for-left.exp for remote
target. Done.
* TCWG-509, arm gdb, 1034 FAILs of -marm, 1008 FAILs of -mthumb, and
627 FAILs of -mfloat-abi=soft/-marm/-march=armv4t. [4/10]
** Look at fails in gdb.threads/non-stop-fair-events.exp. Root cause is
almost identified, and patches are being tested.
* TCWG-757, FSF GDB, [1/10]
** Review two committed patches causing some problems for arm. Will
raise questions on them later. Looks I need to allocate more time on
upstream reviewing to prevent these arm-unfriendly patches go in.
* meeting, [1/10]
# Plan #
* Take more care on arm gdb.
* Upstream patches review, especially on all-stop-on-top-of-non-stop
patch set.
* Fix the rest of 10+ fails in aarch64 gdb.
--
Yao
== Issue ==
* none
== Progress ==
* [TCWG-762] - GCC Maintenance (9/10)
- Linaro bugzilla 1399 identified as an upstream bug (PR65647)
Now fixed on trunk and backported in FSF 4.9, will be in our
branch in the coming branch merge.
* [TCWG-699] Backports
- Committed them into our SVN FSF repo.
* Misc (1/10)
- Various meetings
== Plan ==
- FSF branch merge
- Back on a Thumb2 insn fix
== Progress ==
LLDB development
-- Completed implementation and submited native Linux register context
for Arm upstream [3/10] [TCWG-650]
-- Completed implementation and submitted POSIX register context for
Arm upstream [3/10] [TCWG-755]
-- Fixing LLDB build and dev environment issues [1/10]
Miscellaneous [3/10]
-- 3rd April Swap day for 23rd March Public Holiday
-- Meetings, emails, discussions etc.
== Plan ==
LLDB development
-- Bug Fixing and Test result improvement.
-- Patch reviews and upstream commits.
Miscellaneous
-- Try LLDB armhf builds and figure out a way to do gcc 4.8 softfloat build.
4 day work week (03-Apr good Friday) (2/10)
* ASAN 32bit allocator failures on amd-01 (4/10)
Completed analyzing failures. Sent a patch to Address sanitizes
community for review. Applied patch to latest LLVM trunk and ran
tests. found one failure. But it was due to the test case assuming
that return value from "getpwnam_r" all is always zero. Fixed the
test case by removing the assert and all LLVM tests passes.
[ Renato tested the patch on APM (39 bit VA) ].
* Again there is some discussion in GCC bugzilla on deciding which
allocators to use for Aarch64 42 bit VA*.
I have a patches for both allocators and posted it to ASAN group
64 bit allocators wont work on juno. So for ASAN there is a need to
have some kind of dynamic address space detection mechanism. Set the
allocators type and required mappings at runtime for Aarch64.
But that needs to be decided by ASAN group whether to do that or use
my 32 bit allocator patch . I am planning to stop it here and wait as
suggested by renato.
* Get TSAN building for Aarch64 on 42-bit VMA systems. (2/10) (-pie mode only)
Applied patch that I had on GCC tree on LLVM trunk. Build failed need
to set kVdsoBeg and kMadviseRangeBeg. I set some default value to
allow TSAN build to complete. right now clang does not recognize
aarch64 target for aarch64 although I enabled it under TSAN. looking
at the issue.
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe, Ryan, status meet
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
== Plan ==
* Get TSAN building for Aarch64 on 42-bit VMA systems. (-pie mode only)
* Document TSAN/ASAN work and patch details in wiki.
== Issues ==
* ASAN patch cannot be up streamed unless we decide on allocator to use.
== This week ==
* TCWG-619
- v8 LTO build with different options for x86 and aarch64.
- Reported upstream v8 LTO build failure on ARM.
- Tried to build chromium with FSF gcc, linaro binary release and
linaro-4.9-branch
* PR49551
- Not able to reproduce ICE with latest trunk (r221871).
* Misc
- College assignments submission and term end.
== Next Week ==
* TCWG-619
- Build chromium with linaro-4.9-branch and trunk.
- Prepare stats for LTO build with different options for v8 on x86 and aarch64
- Try building chromium with LTO with FSF trunk for arm
* TCWG-639:
- Add enhancement to header file flattening script.
== Progress ==
Friday holiday
* Automation Framework (CARD-1378 2/10)
- Power cut in the office
- Fixing gateway, rebooting machines
- Mob management
* LLVM ARM Maintenance (CARD-1833 2/10)
- ARMTargetParser review
* Background (4/10)
- Code review, meetings, discussions, etc.
- All LLVM buildbots broken (one still)
- Trying to merge Android round/exception
- https://android-review.googlesource.com/#/c/125910/1
- Not that easy, will need bigger changes and tests to go in
== Plan ==
* Long holidays
* EuroLLVM
* Back on the 15th
Hi,
I did some tests on the following function
--- CUT HERE ---
int fibo(int n)
{
if (n < 2) return 1;
return (fibo(n-2) + fibo(n-1));
}
--- CUT HERE ---
and I discovered that it is faster -O2 than -O3. This is with gcc 4.9.2.
Looking at the disassembly I see it is using FP registers to hold
integer values. The following is a small extract.
.L3:
fmov w0, s8
sub w25, w25, #1
cmn w25, #1
add w0, w0, w27
fmov s8, w0
bne .L19
add w0, w0, 1
b .L2
Recompiling with -mgeneral-regs-only generates a huge improvement.
The following are the times I get on various partner HW. I have
normalised the -O2 times to 1 second so that I do not disclose actual
partner performance data:
Partner 1: -O2 = 1sec, -O3 = 1.13sec, -O3 -mgeneral-regs-only = 0.72sec
Partner 2: -O2 = 1sec, -O3 = 0.68sec, -O3 -mgeneral-regs-only = 0.60sec
Partner 3: -O2 = 1sec, -O3 = 0.73sec, -O3 -mgeneral-regs-only = 0.68sec
Partner 4: -O2 = 1sec, -O3 = 0.83sec, -O3 -mgeneral-regs-only = 0.84sec
So, in general, -O3 does actually do better than -O2, but in all cases
performance is better if I stop it using FP registers for int values.
I have put a tarball of the test program along with 3 binaries and 3
disassemblies here:-
http://people.linaro.org/~edward.nevill/fibo.tar
All the best,
Ed.
Hi,
I'm seeing the following build error trying to build from the current master
branch (1ac806b) of http://git.linaro.org/toolchain/binutils-gdb.
make[3]: *** No rule to make target `-L../zlib', needed by `run'. Stop.
make[3]: *** Waiting for unfinished jobs....
make[3]: Leaving directory `gdb/sim/arm'
The following commit predating the zlib changes appears to build without error.
b19a8f8545100a08ee2a64c05631aff6f651faa1
Thanks,
Chris
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
catomics - TCWG-436 [5/10]
* Got pointed at a suitable set of benchmarks, results still underwhelming
* However, patches were using relaxed atomics rather than no atomics at all
* Fiddled abe into building sysroots for me (I get libstdc++ that way)
Misc - [5/10]
* Tidied up some 'perf shotgun' scripting from the juno cache
investigation, so I've got the tools for next time
* Started sorting out my backups - but didn't finish before build-01's
death destroyed a bunch of work
* Raised priority of sorting out my backups, now just a matter of
waiting on some large rysncs
* Pieced my world back together on dev-01
=Plan=
Holiday Wednesday, public holidays next Friday and Monday
See how catomics do when we're conditionally-not-atomic-at-all
Investigate a bit to see if I can see if there's a reason we were
using relaxed atomics
Resurrect Jira benchmarking on dev-01
* Will include some porting, scripts don't work out of box on dev-01
One day off on Friday. [2/10]
# Progress #
* aarch64 gdb, the number of FAIL is reduced to 26 on aarch64-linux!
there are still about 10+ FAILs can be fixed. [4/10]
** TCWG-726, fails in gdb.base/break-interp.exp. Fixed.
Remove prelink package from juno board as aarch64 isn't supported.
** TCWG-681, fails in savedregs.exp. Patch is committed.
** PR 18139. Patches are committed.
* arm gdb, 938 fails for -mfloat-abi=soft and 1014 fails for
-mfloat-abi=hard. Analysing fails. [2/10]
* GDB kernel-awareness meeting with ST. [1/10]
Understand the definition of "kernel-awareness", and will
discuss about the design upstreams later.
* TCWG-716, investigate LLDB perf testing. [1/10] Done.
** LLDB already had something about performance testing, in
lldb/test/benchmarks/ and lldb/tools/lldb-perf.
** TestCompileRunToBreakpointTurnaround.py compares the speed of LLDB
and GDB, but in an incorrect way.
# Plan #
* Take more care on arm gdb test fails.
* Fix the rest of aarch64 gdb fails.
--
Yao
== Issue ==
* none
== Progress ==
* Infrastructure and Validation (1/10)
* GCC Upstream (6/10)
- PR63587 and PR64871 committed in FSF 4.9 branch.
- PR64208 patch review is OK, but needs to be validate on an iWMMXT platform
(pinged some Marvell people).
- Submitted a fix for arm_subsi3_insn (alternatives issue). This is
a stage1 patch.
- Identified another insn which has alternatives issues in Thumb2.
* Release and Backports (1/10)
- Backflip maintenance
- 12 Backports for 2015.04 (CARD TCWG-699)
* Misc (2/10)
- Various meetings
- ST internal year review
== Plan ==
- Continue upstream work.
* ASAN/TSAN run on 42 bit VA Aarch64 (TCWG-634) (6/10)
Sent a patch that enables ASAN tests with 64 bit allocator on
amd-01 (AMD Seattle). All ASAN test passes in LLVM.
But on juno platform 39 bit VA does not have enough memory to map
hence we need to stay on 32 bit allocator.
Discussed with ASAN community and it is been decided to use 32 bit
allocator as default. They are not ok with having a mechanism to
detect VA and swutch allocators based on that.
Started looking at failures on amd-01 (AMD steatle) with 32 bit alloctor.
None of the ASAN tests ran when I switched to 32 bit allocator on amd-01.
Reason there is a spin mutex lock which is waiting for the memory
allocation to complete, but assertion failure makes it to wait
infinitely.
After fixing map range the assertion failure is gone but I keep
getting some failures with 32 bit allocator "on".
Bug869: Continued to look at ABS_EXPR cases (2/10).
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe, Ryan, status meet
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
== Plan ==
*Continue to fix TSAN/ASAN 32bit allocator failures on amd-01 .
* Bug869
== Progress ==
* Type promotion pass (zero/sign extension elimination) - TCWG-547 (2/10)
- Ran more benchmarks and gathered more data (will post the results)
- Need to run perf to analyse regressions
* Bug 1373 (1/10)
- Set-up back-porting infrastructure
- Ran into some issues
* TCWG-486 (6/10)
- Discussed with Jim and identified the issues and possible fixes
- Getting closer to an acceptable fix
- Need to run benchmarking
* Misc (1/10)
- gcc-patchs and gcc-bugs list
== Plan ==
* TCWG-620 and TCWG-547
== Progress ==
LLDB development
-- Patch submission and build testing LLDB Arm SysV ABI classes
[1/10] [TCWG-643]
-- Patch submission and build testing LLDB AArch64 SysV ABI classes
[1/10] [TCWG-715]
-- Implemented native Linux register context for Arm [3/10] [TCWG-650]
-- Implemented POSIX register context for Arm [3/10] [TCWG-755]
-- Migrated LLDB wiki to collaborate.linaro.org and updated howtos
[1/10] [TCWG-640] [TCWG-641] [TCWG-583]
-- Another try on doing a native LLDB build on arm [1/10] [TCWG-647]
Miscellaneous [1/10]
-- Meetings, emails, discussions etc.
== Plan ==
LLDB development
-- Complete implementation and submit native Linux register context
for Arm upstream
-- Complete implementation and submit POSIX register context for Arm upstream
-- Patch reviews and upstream commits.
-- Start work on LLDB arm integration, testing and bug fixing.
Miscellaneous
-- Try LLDB armhf builds and figure out a way to do gcc 4.8 softfloat build.
== This Week ==
* TCWG-619:
- LTO and non-LTO builds of v8 and chromium on x86, arm, and aarch64 native and
x86->arm, x86->aarch64 cross.
- LTO build for v8 on arm native and with x86->arm cross works with linaro-4.8,
but not with linaro-4.9. Also appears to fail for trunk.
- Issues in building chromium cross x86->arm - undefined reference to
clock_gettime.
* PR 49551
- Patch approved by Charles.
== Next Week ==
- v8 LTO build with different lto options.
- Investigate LTO build failure for v8 on arm.
- LTO and non-LTO builds for chromium on x86, arm and aarch64.
- Submit patch to PR49551 for upstream review after testing on x86, arm.
== Progress ==
* Validation
- worked on stabilization of abe and jenkins jobs
* Backports
- a few reviews
* Misc
- meetings, conf-calls, emails, ...
== Next ==
* Validation: hopefully make the staging, then stable branches
== Progress ==
* Automation Framework (CARD-1378 5/10)
- Moving LLVM lab into llvm.tcwglab subnet
- Passing down my knowledge to the lab team
- Helping them set up the new builders
* Background (5/10)
- Code review, meetings, discussions, etc.
- Upgrading APM's compiler/binutils
- Writing LLVM Getting started wiki page
- Helping Adhemerval setup
== Plan ==
* Go back working on LLVM
== Progress ==
qemu-system experiment [4/10]
Tried to set up qemu-system for reliable simulated validation of tests
which don't work under qemu-user. Mostly works, but there is arcane
interaction between DejaGNU, gcc testsuite and board files which make
it a bit flakey. Interesting experiment, but I've dropped it for now
as there still niggles to iron out.
Misc [4/10]
Patch review for Prathamesh
Backporting stuff
ABE bugzilla stuff
Benchmarking results
Emails/doc review about Lab infrastructure
Holiday Friday [2/10]
== Plans ==
Holiday Monday
Investigate autovectorization
Next backport
== Progress ==
LLDB development
-- Implemented LLDB Arm SysV ABI classes [3/10] [TCWG-643]
-- Implemented LLDB AArch64 SysV ABI classes [3/10] [TCWG-715]
-- Started implementation of Arm native register context [1/10] [TCWG-650]
-- Figure out steps to run lldb-remote testsuite on Arm and AArch64
[1/10] [TCWG-640] [TCWG-641]
-- Try to build lldb-server natively on chromebook [1/10] [TCWG-647]
Miscellaneous [1/10]
-- Meetings, emails discussions.
-- Updates to wiki pages for LLDB howtos
== Plan ==
LLDB development
-- Complete implementation and submit LLDB Arm SysV ABI classes upstream
-- Complete implementation and submit LLDB AArch64 SysV ABI classes upstream
-- Further progress on implementation of native register context
-- Begin implementation of POSIX monitor register context for arm.
Miscellaneous
-- Migrate LLDB pages to collaborate.linaro
ASAN/TSAN run on 42 bit VA Aarch64 with 64 bit allocators (TCWG-634) (6/10)
* Juno does not have space for kernel allocator map demanded by
ASAN, So we need to remain on 32 bit allocators only.
* amd-01 went offline. So moved to internal machine in AMD.
Debugging LLVM test failures in GDB showed that ASLR should be
turned off and also the shadow offset is set at 1<<36 and is not
changing when I fix it in asan_mappings.h file .
Manually changing shadow offset to 1<<39 fixes some segfaults.
Bug869: Continued to look at ABS_EXPR cases (2/10).
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe, Ryan
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
== Plan ==
*Continue to fix TSAN/ASAN 64 bit allocator failures on amd-01 .
* Bug869
== Issue ==
* none
== Progress ==
* Infrastructure and Validation (1/10)
- Validate staging builders, still some issues with guality tests
* GCC Upstream (5/10)
- PR64208 submitted a patch that fixes the LRA ICE for iwmmxt target.
- PR63587 and PR64871 submitted patches that backport the fixes into
FSF 4.9 branch. Patches approved, to be committed.
* Release and Backports (3/10)
- Finished Backflip improvements, dev branch merged into master.
- Presented this new features, stacked backports process and conflict
handling during our GCC team weekly meeting.
* Linaro Bugzilla (-/-)
- #1322 - Identified it as already resolved on our 4.8 branch.
* Misc (110)
- Various meetings
== Plan ==
- Continue on upstream bugzillas, backports and validation.
catomics - TCWG-436 [6/10]
* Started a series of runs on a local board I'd borrowed
** Then had to give it back before they'd really got anywhere
* Got some, possibly dubious, results back from A15 from previous week
** If the results are worth anything, they suggest that catomics don't
achieve anything
* Started again with a subset of SPEC on juno-01, as it was on my desk
for the weekend anyway
** Results again underwhelming
** Maybe I picked the wrong subset, maybe A57 is too smart
Misc [4/10]
* Including a little 'juno cache effects' followup, a little juno-01
work, and a lot of mail catchup
=Plan=
* Get back to benchmark automation
** Apply a bunch of small improvements I've got on a branch
** Get a working Jenkins backport benchmarking prototype
** Sort out sources/results storage
* Think about why catomics may not be showing any effect
** Starting to believe that this is a red herring
** But might be interesting to try 'little' class cores
** But that does involve finding a reliable target I can hold for a long time
Juno cache effects - LDTS-1238 [6/10]
* Seems to be mainly due to (expected) instruction scheduling
limitations, and prefetcher effects
* Reported back, hopefully this will wrap up now
catomics - TCWG-436 [1/10]
* Shepherding benchmark runs in LAVA, usual problems with ssh-agent,
juno contention and random target failure
* Almost no actual data produced
benchmark automation - TCWG-360 [1/10]
* User support, some discussion about extent of our juno usage
* Something weird happened in Jenkins, _might_ have been a one-off due
to slaves moving around
Misc - [2/10]
* Featuring juno-01 fixing
TCWG-619:
- Cross compiled v8 on ARM using linaro toolchain (binary release).
- Built chromium LTO native
- Building v8 on ARM with LTO results in ICE at lto_tag_to_tree_code.
- Buiilding v8 (without LTO) with linaro-4.9-branch results in ar error.
- Cross compiling chromium on ARM with LTO using linaro toolchain
segfaults ld
- Using gcc-nm, gcc-ar works as a work-around for "plugin needed to
handle lto object" error
TCWG-621:
- Finished refactoring sel-sched-ir.h
* Bugs
- PR49951: Modified patch to fix few test-cases.
* Misc:
- Internal college event on Saturday.
== Next Week ==
- TCWG-619
- Test patch for PR49951 and submit upstream.
- Refactor lra-int.h
== Progress ==
* type promotion pass (zero/sign extension elimination) - TCWG-547 (6/10)
- Fixed LTO testcase failure
- Native testing on arm chromebook found three more failures
- Fixed all of them
- Setup spec2006 on chromebook
- spec2006 with -O3 -mfpu=neon -march=armv7-a -fno-common shows some
(12 of them) regressions even though there are some gains (17 of them).
- GEOMEAN is the same.
- 437.leslie3d regresses 18% for -O3 but improves 16% if I use -O2 in
both the original and with the patch
- some optimizations like vectorization could be impacted (?)
- restarted the full benchmarking at -O2
* TCWG-620 (1/10)
- read more documents and looked at code samples
* TCWG-486 (2/10)
- Latest trunk didn’t work with the patch I had
- Original patch Zhenqiang also behaves similar. Looking into it.
* Misc (1/10)
- gcc-patchs and gcc-bugs list
== Plan ==
* TCWG-620 and TCWG-547
== Progress ==
* Thursday off (2/10)
* Buildbots (CARD-1823 1/10)
- Fixing llvm-apm-01 (disk problem)
- Fixing llvm-d01-04 (my bad)
* Releases (CARD-1431 1/10)
- Spinning release 3.5.2 RC1, all green
* Automation Framework (CARD-1378 3/10)
- A lot of time wasted in infra shenanigans
* Background (3/10)
- Code review, meetings, discussions, etc.
- Reviewing, testing and committing ARM11 patch by Tinti
- Getting ircproxy to work
- Broken bots a-plenty
== Plan ==
* Fork LLVM lab out of TCWG
* Zillions of patches to review
* Continue target description changes
* Welcome Adhemerval, setup LLD track
* Catch up with Omair on LLDB
# Progress #
* aarch64 gdb , TCWG-652, [7/10]
** TCWG-663, TCWG-680: closed, as patches are committed
** TCWG-681, TCWG-664: in progress, patches are posted upstream for
review.
The current FSF mainline GDB on aarch64-linux only has 46 FAILs
in the remote testing!
* arm gdb remote testing on pandaboard, [1/10]
There are 3584 FAILs! Have no chance to triage them yet.
* fsf gdb, [2/10]
** Clean up gdbarch method cannot_step_breakpoint.
** Take a look at the state of C++ move in GDB. Offer some help on this
project.
* misc [1/10]
** Meeting and internal trainings.
# Plan #
* Other cards under TCWG-652.
* TCWG-682, Investigate on GDB/LLDB performance.
* Write up some slides to help people understand what GDB can
do for the incoming meeting.
--
Yao
Hi all
I am trying to compile poky-dizzy-12.0.1(MACHINE ?= "beaglebone") using
meta-toolchain.
so i downloaded dizzy from
http://downloads.yoctoproject.org/releases/yocto/yocto-1.7.
1/poky-dizzy-12.0.1.tar.bz2
meta-linaro from
https://git.linaro.org/openembedded/meta-linaro.git
I have changed bblayers.conf as below
# LAYER_CONF_VERSION is increased each time build/conf/bblayers.conf
# changes incompatibly
LCONF_VERSION = "6"
BBPATH = "${TOPDIR}"
BBFILES ?= ""
BBLAYERS ?= " \
/home/praveenk/work/poky-dizzy-12.0.1/meta \
/home/praveenk/work/poky-dizzy-12.0.1/meta-yocto \
/home/praveenk/work/poky-dizzy-12.0.1/meta-yocto-bsp \
/home/praveenk/work/poky-dizzy-12.0.1/meta-linaro/meta-linaro-toolchain \
"
BBLAYERS_NON_REMOVABLE ?= " \
/home/praveenk/work/poky-dizzy-12.0.1/meta \
/home/praveenk/work/poky-dizzy-12.0.1/meta-yocto \
I added required changes in local.conf
MACHINE ?= "beaglebone"
DEFAULTTUNE = "cortexa8hf-neon"
PREFERRED_PROVIDER_glibc ?= "glibc"
PREFERRED_VERSION_gcc ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-cross ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-cross-initial ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-cross-intermediate ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-cross-canadian ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-crosssdk ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-crosssdk-initial ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-crosssdk-intermediate ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-runtime ?= "linaro-4.9%"
PREFERRED_VERSION_nativesdk-gcc-runtime ?= "linaro-4.9%"
PREFERRED_VERSION_libgcc ?= "linaro-4.9%"
PREFERRED_VERSION_nativesdk-libgcc ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-cross-canadian-${TRANSLATED_TARGET_ARCH} ?=
"linaro-4.9%"
but still it is building gcc-4.9 instead of gcc-linaro-4.9
below is the log
WARNING: Could not copy license file COPYING: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING'
WARNING: Could not copy license file COPYING: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING'
WARNING: Could not copy license file COPYING3: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING3'
WARNING: Could not copy license file COPYING3: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING3'
WARNING: Could not copy license file COPYING3.LIB: [Errno 2] No such file
or directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING3.LIB'
WARNING: Could not copy license file COPYING3.LIB: [Errno 2] No such file
or directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING3.LIB'
WARNING: Could not copy license file COPYING.LIB: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING.LIB'
WARNING: Could not copy license file COPYING.LIB: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING.LIB'
WARNING: Could not copy license file COPYING.RUNTIME: [Errno 2] No such
file or directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING.RUNTIME'
WARNING: Could not copy license file COPYING.RUNTIME: [Errno 2] No such
file or directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING.RUNTIME'
ERROR: Function failed: do_configure (log file is located at
/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/libgcc/linaro-4.9-r2014.11/temp/log.do_configure.26074)
ERROR: Logfile of failure stored in:
/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/libgcc/linaro-4.9-r2014.11/temp/log.do_configure.26074
Log data follows:
| DEBUG: Executing python function sysroot_cleansstate
| DEBUG: Python function sysroot_cleansstate finished
| DEBUG: SITE files ['endian-little', 'bit-32', 'arm-common',
'common-linux', 'common-glibc', 'arm-linux', 'arm-linux-gnueabi', 'common']
| DEBUG: Executing shell function autotools_preconfigure
| DEBUG: Shell function autotools_preconfigure finished
| DEBUG: Executing python function autotools_copy_aclocals
| DEBUG: Python function autotools_copy_aclocals finished
| DEBUG: Executing shell function do_configure
| 0 blocks
| chmod: cannot access
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/libgcc/configure':
No such file or directory
| WARNING: exit code 1 from a shell command.
| ERROR: Function failed: do_configure (log file is located at
/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/libgcc/linaro-4.9-r2014.11/temp/log.do_configure.26074)
ERROR: Task 692
(/home/praveenk/work/poky-dizzy-12.0.1/meta-linaro/meta-linaro-toolchain/recipes-devtools/gcc/
libgcc_linaro-4.9.bb, do_configure) failed with exit code '1'
== Progress ==
LLDB development
-- Got lldb-server executable running on aarch64 target but debug
connection not working [1/10] [TCWG-640]
-- Got lldb-server executable running on arm target [1/10] [TCWG-641]
-- Started collecting missing pieces for arm lldb linux run control
support [2/10]
-- Written wiki pages for LLDB developer process [1/10]
GDB Development
-- Started writing tests for arm-gdb instruction recording [0.5/10] [TCWG-677]
-- Started writing tests for aarch64-gdb instruction recording
[0.5/10] [TCWG-517]
Miscellaneous [3/10]
-- Trying out 96board network setup with powered usb ethernet dongle
-- Emails/Meetings etc
-- Sick Day on Friday 13th March
== Plan ==
More work for ARM and AArch64 support in LLDB
Do some more work on arm/aarch64 gdb instruction recording tests
== Progress ==
LLDB Development
-- Tried lldb-server cross build for AArch64 target on x86 host
[1/10] [TCWG-640]
-- Tried lldb-server cross build for ARM target on x86 host [4/10] [TCWG-641]
GDB Development
-- Started writing tests for arm-gdb instruction recording [3/10] [TCWG-677]
-- Started writing tests for aarch64-gdb instruction recording
[1/10] [TCWG-517]
Miscellaneous [1/10]
-- Some work on setting up 96board for testing lldb-server
-- Emails/Meetings etc
== Plan ==
More work for ARM and AArch64 support in LLDB
Do some more work on arm/aarch64 gdb instruction recording tests
* ASAN/TSAN run on 42 bit VA Aarch64 with 64 bit allocators (TCWG-634) (3/10)
Tried various allocator sizes in juno, still fails.
On amd-01, Debugging LLVM test failures in gdb.
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe. status call.
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
* AMD internal meeting (4/10)
* Half day off on 12/3/2015(1/10)
== Plan ==
*Continue TSAN/ASAN support look why 64 allocator on juno is failing .
* Bug869
== Progress ==
Off sick [4/10]
Backporting [2/10]
. unexpected conflicts and test failures meant that previous attempts
were abandoned
. will try again for 2015.04
Benchmarking [1/10]
. one config failed, restarted in Jenkins
. accessing Jenkins benchmarks still requires help from Bernie due to
permissions
Misc [3/10]
. emails about bugs
. meetings
. verification of lab fixes
== Progress ==
* Linaro bugs (2/10)
#1325
* type promotion pass (zero/sign extension elimination) - TCWG-547 (5/10)
- tried to improve some of the aspects and made it more aggressive
- improved handling of CASE_CONVERT
- tried it on CoreMark and it reduces the number of instructions
in per object file basis.
- bootstrapped the latest improvement on x86-64 and regression tested
on x86-64, ARM and AARCH64. noticed few LTO failures on ARM and AARCH64.
Looking into it.
- Plan to run spec2k again
- Current version at linaro-dev/type-promotion-pass
(https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=refs/heads/linaro-dev/typ…)
* Misc (1/10)
- gcc-patchs and gcc-bugs list
* Public Holiday (2/10)
== Plan ==
* TCWG-620 and TCWG-547
== This week ==
* TCWG-619:
- Cross compiled chromium for ARM without LTO
- Ran into issues with native and ARM lto build of chromium
* GCC Modularization Project:
* TCWG-621:
- Begun refactoring sel-sched-ir.h
* TCWG-639:
- Fixed issue with header flattening script.
* Bugs:
- 1178: Another triage, got reviewed from Charles.
* Backports:
- r218232, r218525.
== Next week ==
* Continue investigating LTO build issues on ARM and x86.
* submit patch to 1178 upstream.
* Target hook conversion
== Progress ==
* Automation Framework (CARD-1378 4/10)
- Restarting more dead machines
- Discussing more infrastructure
- Investigating PDU deamon
* Maintenance (CARD-1833 4/10)
- Making the case for all table-gen files to be built
- This would allow us to create TargetDescription
- Which would ease target-specific knowledge on all tools
- And common up the parser for fpu/cpu/arch features
- Adding commit message guidelines to developer policy
* Background (4/10)
- Code review, meetings, discussions, etc.
- Discussions about CMake, options, etc
- Cleaning up gateway, moving LLVM services to llvm server
- Making serial connections work for LLVM machines
- Fiddling with HiKey board
== Plan ==
* Continue TargetDescription changes
* Continue PDU investigations
* Move serial to abe, so we can work around auth issues
# Progress #
* aarch64 gdb , TCWG-652, [6/10]
** TCWG-663: Patches are posted upstream for review. Bernie gives me a
pandaboard and set it up. I can do HW breakpoint testing for both
aarch64 and arm.
** TCWG-670: Patch is posted upstream for review. Takes some time
to understand aarch64 syscall name and number.
** Write some bash scripts to test my gdb patches.
* fsf gdb patch review [2/10]
** Review and approve catch syscall code refactor.
* misc [2/10]
** two meetings.
# Plan #
* Other cards under TCWG-652.
* Investigate on GDB/LLDB performance.
* TCWG-660: Teach ABE to import systemtap and build glibc with
--enable-systemtap.
--
Yao
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2015.03
engineering release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2015.03 is the twelfth Linaro GCC source package
release in the 4.9 series. It is based on FSF GCC 4.9.3-pre+svn221341
and includes performance improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler. The Linaro TCWG provides
stable[1] quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include
* Linaro bugzilla PR fixed : #1149, #1291, #1314
* Updates to GCC 4.9.3-pre+svn221341
* Backport of PR tree-optimization/61607
* Backport of PR tree-optimization/64878
* Backport of PR bootstrap/63204
* Backport of PR ipa/63196
* Backport of PR tree-optimization/64083
* Backport of PR tree-optimization/64284
* Backport of PR middle-end/64246
* Backport of Abstract away marking loops for removal
* Backport of Sanity check removed loops
* Backport of [AArch64] Tighten predicates on SIMD shift intrinsics
* Backport of [AArch64] Wire up vqdmullh_laneq_s16 and vqdmullh_laneq_s32
* Backport of [AArch32/AArch64] Improve modeled latency between FP operations
and FP->GP register moves
* Backport of [AArch64] Adjust generic move costs
* Backport of [AArch64] Add range-check for Symbol + offset addressing
* Backport of [AArch64] Add vector pattern for __builtin_ctz
* Backport of [AArch64] Bics instruction generation for aarch64
* Backport of [AArch64] additional bics patterns
* Backport of [AArch64] Fix wrong-code bug in right-shift SISD patterns
* Backport of [Haifa Scheduler] Fix latent bug in macro-fusion/instruction
grouping
* Backport of [testsuite] Fix vaddl and vaddw tests
* Backport of [testsuite] revert changes on check_effective_target_arm_*_ok
* Backport of [testsuite] new set of Neon intrinsics tests
* Backport of [testsuite] fix vbic/vorn Neon tests
* Backport of [testsuite] Add explicit dependency on Neon Cumulative Saturation
flag
* Backport of [testsuite] Be more verbose, and actually confirm that a test was
checked.
* Backport of [testsuite] Add vld1_lane tests
* Backport of [testsuite] Add vldX_dup test.
* Backport of [testsuite] Add vmla and vmls tests.
* Backport of [testsuite] Add vmla_lane and vmls_lane tests.
* Backport of [testsuite] Add vtrn tests. Refactor vzup and vzip tests.
* Backport of [testsuite] Add vmlal and vmlsl tests.
* Backport of [testsuite] Add vmlal_lane and vmlsl_lane tests.
* Backport of [testsuite] Add vmlal_n and vmlsl_n tests.
* Backport of [testsuite] Add vqdmlal and vqdmlsl tests.
* Backport of [testsuite] Add vqdmlal_lane and vqdmlsl_lane tests
* Backport of [testsuite] Add vqdmlal_n and vqdmlsl_n tests.
* Backport of [testsuite] Add vsli_n and vsri_n tests.
* Backport of [testsuite] Add vsubl tests, put most of the code in common with
vaddl in vXXXl.inc.
* Backport of [testsuite] Add vsubw tests, putting most of the code in common
with vaddw
* Backport of [testsuite] Add vmovn tests.
* Backport of [testsuite] Add vmul_lane tests.
* Backport of [testsuite] Add vmul_n tests.
* Backport of [testsuite] Add vmull tests.
* Backport of [testsuite] Add vmull_lane tests.
* Backport of [testsuite] Add vmull_n tests.
* Backport of [testsuite] Add vqdmulh tests.
* Backport of [testsuite] Add vqdmulh_lane tests.
* Backport of [testsuite] Add vqdmulh_n tests.
* Backport of [testsuite] Add vqdmull tests.
* Backport of [testsuite] Add vqdmull_lane tests.
* Backport of [testsuite] Add vqdmull_n tests.
* Backport of [testsuite] Add vsubhn, vraddhn and vrsubhn tests.
* Backport of [testsuite] Add vmla_n and vmls_n tests.
* Backport of [testsuite] Add vpadd, vpmax and vpmin tests.
* Backport of [testsuite] Add vmovl tests.
* Backport of [testsuite] Add vmnv tests.
* Backport of [testsuite] Add vpadal tests.
* Backport of [testsuite] Add vpaddl tests.
* Backport of [testsuite] Add vmax, vmin, vhadd, vhsub and vrhadd tests.
The release tarball will be available on: http://releases.linaro.org/
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
Hi,
Linaro GCC 4.9 2015.01 source package has been respun and deployed on:
http://releases.linaro.org/15.01/components/toolchain/gcc-linaro/4.9
This package release contains two fixes for Linaro bugzilla's PR:
* #1291 - ICE (segmentation fault) on arm-linux-gnueabihf
* #1314 - ICE (in in expand_expr_addr_expr_1, at expr.c:7634) on
arm-linux-gnueabihf
You can find the original 2015.01 announcement below
Regards,
Yvan
---------------------------------------------------------------------------------------------------------------------
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2015.01
engineering release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2015.01 is the tenth Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.3-pre+svn219502 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler. The Linaro TCWG provides
stable[1] quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include
* Linaro bugzilla PR fixed : #902
* Updates to GCC 4.9.3-pre+svn219502
* Backport of [AArch64] Support SISD variants of SCVTF,UCVTF
* Backport of [AArch64] Fix ICE in aarch64_float_const_representable_p
* Backport of [AArch64] Switch to sched-pressure by default.
* Backport of [AArch64] Add scheduler for ThunderX
* Backport of [AArch64] Remove crypto extension from default for cortex-a53,
cortex-a57
* Backport of [AArch64] doloop pattern for -fmodulo-sched
* Backport of [AArch32] Add execution tests of ARM REV intrinsics.
* Backport of [AArch32] Post-indexed addressing for NEON memory access
* Backport of [AArch32] Improve 64 bit division performance (serie)
* Backport of [AArch32] Revert 215321 backport.
* Backport of [AArch32/AArch64] Add ACLE 2.0 predefined macros
* Backport of PR tree-optimization/54742 - extend jump thread for finite state
automata
* Backport of PR target/61997 - cc1plus ICE with aarch64 target using PCH and
builtin functions
* Backport of PR target/63724 - Fix up BSL expander for floating point types
* Backport of [LRA] Relax one gcc_assert in lra-eliminate for fixed register
* Backport of Add clobber_reg function
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the
full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
== Progress ==
* Linaro bugs (6/10)
#1291 #1293, #1314
* Home PC crashed and required hardware upgrade and software
re-installation (2/10)
* Improve register allocation for AArch64 (TCWG-620) - (1/10)
- preparations for benchmarking of proposed changes
* Misc (1/10)
- gcc-patchs and gcc-bugs list
== Plan ==
* TCWG-620 and TCWG-547
* ASAN/TSAN run on 42 bit VA Aarch64 with 64 bit allocator (TCWG-634) (5/10)
* Bug 869 (2/10)
* Bug 1266(1/10)
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe. status call.
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
== Plan ==
* TSAN/ASAN support look why 64 allocator on juno is failing .
* Look at ASAN failures if 64 allocator is enabled on amd-01.
* AMD internal meeting on Tuesday and Wednesday
== Progress ==
* Automation Framework (CARD-1378 5/10)
- Setting up new servers
* Background (5/10)
- Code review, meetings, discussions, etc.
- Updating some LLVM dev scripts
- Adding tools checks to LNT
- EuroLLVM Paper selection
- LLDB/ARM meetings
- Bisecting lots of failures in all bots
== Plan ==
Go back developing LLVM for a change...