- linaro-toolchain - lists.linaro.org

by Virendra Kumar Pathak

Hi Linaro Toolchain Group, I am comparing execution time (run time) of sin() trigonometric function between following glibc (including libm) libraries for aarch64 (juno cortex a57) : Linaro glibc 2.19, Linaro eglibc 2.19, eglibc 2.19 (from http://www.eglibc.org/) and Linaro glibc 2.21. My observation for execution time of sin(): with Linaro glibc 2.19 and eglibc 2.19 = 1m24.703s (approx) whereas, with Linaro eglibc 2.19 & Linaro glibc 2.21 = 0m25.243s (approx) Has Linaro optimized the libm functions for aarch64 in Linaro eglibc 2.19 ? If yes, please point me to relevant reference from where I can find more information on them. Since the eglibc development from version 2.19 has stopped, will Linaro maintain its own development version of glibc ? I am using below snippet code and linux 'time' command to calculate the time. void sin_func(void) { double incr = 0.732; double result, count = 0.0; printf("%s\n", __func__); while (count < 105414350.0) { result = sin(count); count += incr; } } Thanks. -- with regards, Virendra Kumar Pathak

10 years, 10 months

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[Activity] June 29 - July 3

by Charles Baylis

Sick leave [2/10] (TCWG-775) NEON error messages [2/10] . validated patch, posted upstream (TCWG-831) vectorization/addressing modes [3/10] . reading/comparison of ARM vs AArch64 rtx_cost functions Misc [3/10] email etc

10 years, 10 months

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[ACTIVITY] 29 June - 03 July 2015

by Omair Javaid

== Progress == LLDB development [TCWG-855] [8/10] -- Figure out build steps for building cross lldb-server with arm-linux-genueabihf-g++ -- Debugging of lldb-server communication packets for fixing lldb-server armhf crash problem. -- Comparison with androidabi version to figure out missing pieces Miscellaneous [2/10] -- Ubuntu reinstall on laptop -- Follow up on Czech Republic visa -- Meetings, emails, discussions etc. == Plan == LLDB development -- Work on lldb-server for armhf and try to figure out crash problems [TCWG-855]

10 years, 10 months

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[ACTIVITY] Week 27

by Yvan Roux

End of sick leave (will work 100% from home until my cast is removed). == Progress == o Upstream GCC (2/6) * Back to ongoing patches o Linaro GCC release (7/6) * Reviewed FSF branch merge into 4.8/4.9 branches * Reviewed patches for tcwg-realease script * Sent a first batch of backports for 5.1 Still pending due to validation infra. issues o Misc (1/6) * Various meetings == Plan == - Continue ongoing tasks

10 years, 10 months

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[ACTIVITY] 29 June - 3 July 2015

by Yao Qi

* One day off on Fri. [2/10] # Progress # * TCWG-805, aarch64 native debugging multi-arch support. [5/10] Patches (part1) are posted upstream for review, need to rewrite some of them. The rest of them are OK and can be pushed in after 7.10 branch is created. Watchpoint support in multi-arch debugging. Both kernel and GDB need some fixes. Ongoing. * Complete the document of aarch64 tracepoint work. [1/10] * FSF GDB. [2/10] Review intel mpx patch again, and read something on intel mpx stuff. # Plan # * TCWG-805, update some patches in part 1 patch series, and continue the multi-arch watchpoint work. -- Yao

10 years, 10 months

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[ACTIVITY] 29 June - 3 July 2015

by Kugan

== Progress == * Add REG_EQUAL note for arm_emit_movpair (1/10) - Updated and reposted - https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00295.html - https://gcc.gnu.org/ml/gcc-patches/2015-06/msg02066.html * Factor conversion out of COND_EXPR - TCWG-849 (3/10) - https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00246.html * TACT -TCWG-851 (2/10) - Small examples now seem to work. - Have to do cross testing * Git work flow for upstream patches -TCWG-848 (1/10) - Updated based on review * Misc (3/10) - Looked up LLVM documents - Looked at the TODO list Renato provided - gcc-patches, gcc-bugs list - Meetings == Plan == - GCC Bugs - TACT driven optimization exploration for gcc - Linaro bug 1318

10 years, 10 months

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[activity] 29 Jun - 3 July 2015

by Prathamesh Kulkarni

== This Week == * TCWG-856 (2/10) - submitted patch to flatten cfgloop.h: https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00277.html * TCWG-777 (4/10) - Modified pass to not generate redundant stores - Investigating ICE caused by the pass during gcc build - Discussions for possible approaches with Christophe and Kugan - Reading thru documentation on optabs and ccmp patches * Misc (4/10) - Patch sent upstream which fixes segfault in gcc for -dx option. - Filed upstream binutils bug for "branch range out of error" - Conference calls - Travel to Mumbai for US Visa OFC appointment == Next Week == - Word towards committing cfgloop.h flattening patch - Continue working on TCWG-830, TCWG-777, TCWG-847

10 years, 10 months

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[ACTIVITY]

by Renato Golin

== Progress == * Maintenance (CARD-1833 4/10) - ADD/SUB with negative immediates solved by a year old patch from ARM, sigh. On to the next bug... :( - Working on https://llvm.org/PR20700 * Buildbots (CARD-1823 2/10) - Moving benchmark bot to CMake, fixing deepcopy bug in environment that broke new builds - Restarting a few bots that crashed * Background (4/10) - Code review, meetings, discussions, etc. - A lot of code review this week... - Blocking disrespectful web spiders in llvm.org - Emacs now almost works as I expect == Plan == * Continue PR20700 * Have a look at Polybench * Look for some more bugs to fix

10 years, 10 months

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[ACTIVITY] 29th - 3rd June

by Bernie Ogden

Benchmarking presentation [7/10] * More reading * Ran through a couple more drafts Misc [3/10] * Featuring a bug in my backup scripts that took ~1/10 to fix =Plan= Back to benchmark automation as main activity Presentation in the background

10 years, 10 months

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[ACTIVITY] 29 June - 3 July 2015

by Christophe Lyon

== Progress == * linaro-4.8-2015.06 and linaro-4.9-2015.06 releases (2/10) - branch merges + validation (the 4.9 one needed several iterations) - prepared src tarballs * linaro-5.1-2015.07 (1/10) - backports reviews - problems with new validation infra * Neon intrinsics: (2/10) - added vget_lane tests. Some variants fail on armeb. * Infra/release/backports (2/10) - patches + reviews * Misc (3/10) - meetings, conf-calls, emails == Next == * Off Monday * backports, release, validation: update doc * upstream work

10 years, 10 months

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[ACTIVITY] 22 - 26 June 2015

by Omair Javaid

== Progress == LLDB development -- Support for running lldb on arm hard float abi targets [TCWG-855] [7/10] -- Built lldb-server for armhf trusty chromebook -- Figured out problem with lldb-server showing up i386-linux-gnu as target triple. -- Verfied load of arm-elf executable and breakpoint setting. -- LLDB GDBserver dies while trying to run the target. Miscellaneous [3/10] -- Playing with highkey board and setup chromebook with armhf and armel chroots on ssd. -- Preparing document for Czech Republic visa -- Meetings, emails, discussions etc. == Plan == LLDB development -- Further progress and try to fix run control on armhf targets [TCWG-855]

10 years, 10 months

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[Weekly] 22-26 JUNE 2015

by Michael Collison

== This week == * TCWG-146 - Detect smin/umin idion (1/10) - Patch sent upstream for approval * TCWG-140 - Transform end of loop conditions to min_expr (4/10) - Patch and investigating validation regressions * TCWG-833 - Exploit Wide Add operations when appropriate (4/10) - Investigation into why vectorizer does not exploit wide adds * Misc (1/10) - Conference calls - Conference call with Kugan and Prathamesh to discuss GCC Git workflow - Conference call with Charles and Prathamesh to discuss autovectorization == Next week == - Vacation

10 years, 10 months

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[ACTIVITY] 22-26 June

by Charles Baylis

== Progress == (TCWG-831) post-indexed addressing [3/10] . vectorization project kick-off call . code browsing/reading to understand mailing list feedback about previous patch (TCWG-775) NEON error messages [6/10] . completed conversion of some ARM intrinsics to give same error messages as AArch64 work . reworked tests so they can be shared between AArch64, ARM. . re-submitted previous patch with updated tests Misc [1/10] email, irc, gerrit reviews, connect travel booking, AArch64 qemu big-endian experiment == Plans == submit patch for work done so far on ARM NEON error messages cortex-a53 workarounds

10 years, 10 months

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[ACTIVITY] 22nd - 26th June

by Bernie Ogden

Benchmark automation - TCWG-360 [3/10] * Created a partial Jenkins prototype * Considered some security issues Benchmarking presentation [5/10] * Drafted some slides, did some reading Misc [2/10] =Plan= More of the above

10 years, 10 months

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[ACTIVITY] 22-26 June 2015

by Kugan

== Progress == * TCWG-849 (1/10) - Committed improvement for VRP https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=225108 * Add REG_EQUAL for arm_emit_movpair (4/10) - Posted patches for review * TACT -TCWG-851 (3/10) - Started with the small examples. - Ran into an error while tuning; looking into it * Git work flow for upstream patches -TCWG-848 (1/10) - Had a chat with Michael and Prathamesh - Tried the work-flow and now started documenting them * Misc (1/10) - gcc-patches, gcc-bugs list - Meetings == Plan == - GCC Bugs - TACT driven optimization exploration for gcc

10 years, 10 months

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[ACTIVITY] 22-26 June 2015

by Prathamesh Kulkarni

* TCWG-830 (4/10) - Observing tree dumps - Peeling for alignment happens at -O3 but not at -O2 -ftree-vectorize Reason: in vect_enhance_data_refs_alignment() for: a) -O2 -ftree-vectorize: max_allowed_peel == 0 b) -O3: max_allowed_peel == (unsigned) -1; which equals UINT_MAX and therefore peeling gets allowed. - Workaround: Pass -param vect-max-peeling-for-alignment=0 - Peeling for alignment with O2 can be enabled by passing -fvect-cost-model (we don't want this!) Reason: opts.c: /* Tune vectorization related parametees according to cost model. */ if (opts->x_flag_vect_cost_model == VECT_COST_MODEL_CHEAP) { maybe_set_param_value (PARAM_VECT_MAX_VERSION_FOR_ALIAS_CHECKS, 6, opts->x_param_values, opts_set->x_param_values); maybe_set_param_value (PARAM_VECT_MAX_VERSION_FOR_ALIGNMENT_CHECKS, 0, opts->x_param_values, opts_set->x_param_values); maybe_set_param_value (PARAM_VECT_MAX_PEELING_FOR_ALIGNMENT, 0, opts->x_param_values, opts_set->x_param_values); } The above if condition becomes false when -fvect-cost-model is passed. - Proposed patch (untested): http://pastebin.com/ftp0mrwH Patch follows the workaround and passes --param vect-max-peeling-for-alignment=0 if unaligned access is supported. * TCWG-777 (4/10) - Observing tree and rtl dumps - Workaround: for -O1 pass -fno-tree-fre -fno-tree-dominator-opts Test-case: http://pastebin.com/cjBcSpiT Generated assembly at -O1 without workaround: http://pastebin.com/jmQGZhN9 Generated assembly at -O1 with workaround: http://pastebin.com/JGj05z66 Is that the expected output for no unnecessary temps in assembly with workaround ? Is it profitable over the assembly generated without workaround ? - Approach currently taken: a) New pass "remove-temps" (for lack of better name), after nrv (added as last gimple pass). b) Transforms: if (ssa_var != 0) to new_ssa_var = SSA_NAME_DEF_STMT (ssa_var) if (new_ssa_var != 0) This "unfolds" cse on expressions within if, which was done by fre (and if fre was disabled then by dom pass). c) However this approach results in dead stores. eg: _8 = flags_7(D) & 1; if (_8 != 0) ... is transformed to: _8 = flags_7(D) & 1; _32 = flags_7(D) & 1; if (_32 != 0) ... so store to _8 is dead store. I tried to run dse after remove-temps but that didn't work. RTL 194r.jump eliminates the above dead store as "trivially dead insn". However I don't think it's a good idea to have dead stores like these in gimple and rely on RTL to eliminate them. I could try to make the pass bit smarter to not generate redundant stores like _32 != 0 in above case. d) Patch (no intent to commit as-is): http://pastebin.com/AGXnSkrZ Generated assembly at -O1 with the patch: http://pastebin.com/VmHCVpGC Patch eliminates temporaries at -O1 but not at -O2. I have not yet figured out the reason for that. For if (flags & 1), In dfinish pass for -O1, the generated RTL is from zeroextractsi_compare0_scratch while for -O2, the generated RTL is from andsi3_compare0 e) Is this a problem also on x86 ? x86 generated assembly with -O1: http://pastebin.com/XMeTXXwK * Misc (2/10) - Getting familiar with vectorizer and NEON gcc intrinsics - Reviewed git tutorials and starting preparation of git doc - Conference calls == Next Week == - Continue working on TCWG-830 and TCWG-777 - Header file flattening - Travel to Mumbai on 2nd July (Thursday) for US Visa OFC appointment.

10 years, 10 months

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[ACTIVITY]

by Renato Golin

== Progress == * Maintenance (CARD-1833 4/10) - Found the trail on the ADD/SUB with negative immediate - Submitting RFC for discussion (http://llvm.org/PR20978) - Bugzilla farming - More LNT investigations (http://llvm.org/perf/ unstable) * Releases (CARD-1431 1/10) - Building, testing and uploading 3.6.2 RC1 * Background (5/10) - Code review, meetings, discussions, etc. - More stride vectorizer code review (lnN/stN implementation) - More lab discussions (routers, lab split, new link) - Changing my dev env to emacs (huge mind set flip) == Plan == * Continue with ADD/SUB change * Continue with Emacs setup * Move benchmark bot to CMake * Some other bugs

10 years, 10 months

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[ACTIVITY] 22-26 June 2015

by Yao Qi

* One day off on Thu [2/10] # Progress # * Linaro GDB [4/10] ** TCWG-805, aarch64 native debugging multi-arch support. Prepare for the patches submission. It is a big patch series, and think about how to upstream them. Write commit log including the rationale of the changes. * FSF GDB [2/10] ** FSF GDB 7.10 release. Audit some GDB regressions caused by intel mpx stuff. ** PR 18605. Write a patch and it is in testing. ** Other patches review. * Misc [2/10] ** File expense report for Grenoble travel. ** Some discussions on aarch64 tracepoint. # Plan # * TCWG-805, upstream some patches on multi-arch debugging. -- Yao

10 years, 10 months

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[ACTIVITY] 22-26 June 2015

by Christophe Lyon

* One day off (Wed) (2/10) == Progress == * linaro-5.1-2015.06 snapshot (1/10) - dealt with tags, release notes - shared it with B&B * 4.8-2015.06 branch merge (1/10) - investigated regression: incorrect automatic merge - fixed, validation on-going * 4.9 branch (2/10) - updated our git linaro-4.9-branch to match the svn one - ready for branch merge, will be done right after fsf release * Misc (4/10) - meetings, conf-calls, emails, reviews (GCC backports, ABE, backflip) == Next == * more reviews for new backports * backports, release, validation: update doc * hopefully upstream work

10 years, 10 months

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[TCWG] clang/llvm build - tips and advices

by Adhemerval Zanella

Recently I came across two excellent post about accelerating clang/llvm build with different compiler/optimization [1] [2]. I tried some of author advices getting very good results. Basically I moved to optimized clang build, changed to gold linker and used another memory allocator than system glibc one. Results in build time for all the clang/llvm toolchain is summarized below (my machine is a i7-4510U, 2C/4T, 8GB, 256GB SSD): GCC 4.8.4 + gold (Ubuntu 14.04) real 85m17.640s user 257m1.976s sys 11m35.284s LLVM 3.6 + gold (Ubuntu 14.04) real 34m4.909s user 128m43.382s sys 3m51.643s LLVM 3.7 + gold + tcmalloc real 32m56.707s user 121m40.562s sys 3m52.358s Gold linker also shows a *much* less RSS usage, I am able to fully use make -j4 while linking in 8GB without issue any swapping. Two things I would add/check for the posts: 1. Change from libc to tcmalloc showed me a 3-4% improvement. I tried jemalloc, but tcmalloc is faster. I am using currently system version 2.2, but I have pushed an aggressive decommit patch to enable as default for 2.4 that might show lower RSS and latency (I will check it later). 2. First I try to accelerate my build by offloading compilation using distcc. Results were good, although the other machine utilization (i7, 4C/8T, 8GB) showed mixes cpu utilization. The problem was linking memory utilization using ld.bfd, which generates a lot of swapping with higher job count. I will try using distcc with clang. [1] http://blogs.s-osg.org/an-introduction-to-accelerating-your-build-with-clan… [2] http://blogs.s-osg.org/a-conclusion-to-accelerating-your-build-with-clang/

10 years, 10 months

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[ACTIVITY] 15th-19th June

by Bernie Ogden

Benchmark automation - TCWG-360 [7/10] * Arndales stopped booting ** Package servers for elderly filesystem had gone ** Investigated some approaches to creating more stable filesystems ** Realized I could just updated image to point at old-releases, so did that for now * _More_ time thinking about interactions with Jenkins & LAVA. Fathi gave me some Jenkins jobs to prototype in. * Brain-dumped some of the present state of things into Collaborate Misc - [3/10] =Plan= Jenkins prototyping

10 years, 10 months

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RE: windows binary builds with gdb-python enabled?

by duane＠duaneellis.com

>> Using Python to script GDB makes it much more efficient to do testing. >> Having a Python-disabled build of GDB prevents this. I use the example of the gdb-python scripts for the linux kernel. They are very useful, these do not work when using GDB from windows. -Duane

10 years, 10 months

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windows binary builds with gdb-python enabled?

by duane＠duaneellis.com

It seems the prebuilt windows releases of GDB do not enable Python. Are there plans to release a python-enabled-gdb in the windows builds? If not, what are the roadblocks to this? Thanks Example: $ ./aarch64-linux-gnu-gdb.exe GNU gdb (Linaro GDB 2015.02-3) 7.8-2014.09-1-git Copyright (C) 2014 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html> This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "--host=i686-w64-mingw32 --target=aarch64-linux-gnu" Type "show configuration" for configuration details. For bug reporting instructions, please see: <https://bugs.launchpad.net/gcc-linaro>. Find the GDB manual and other documentation resources online at: <http://www.gnu.org/software/gdb/documentation/>. For help, type "help". Type "apropos word" to search for commands related to "word". (gdb) python > >Scripting in the "Python" language is not supported in this copy of GDB. (gdb) quit

10 years, 10 months

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[Weekly] 15-19 JUNE 2015

by Michael Collison

== This week == * Sprint recovery day (2/10) * TCWG-140 - Transform end of loop conditions to min_expr (6/10) - Investigated match.pd change added by Andrew Pinski * TCWG-734 - GCC Autovectorization (1/10) - EPIC Review * Misc (1/10) - Conference calls == Next week == - Call with Charles and Prathamesh for Autovectorization planning - Begin developing patch for TCWG-140 - Benchmark TCWG-146 patch - TCWG-832 investigation

10 years, 10 months

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[ACTIVITY] 15-19 June

by Kugan

== Progress == * Upstream GCC Bugs(5/10) - PR66554 - PR64130 - PR60001 * Misc (3/10) - Started experimenting with TACT - gcc-patches, gcc-bugs list - Meetings * Sprint recovery (2/10) == Plan == - GCC Bugs - TACT driven optimization exploration for gcc

10 years, 10 months

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[ACTIVITY] 15-19 June

by Prathamesh Kulkarni

== This week == * cfgloop.h flatten (2/10) - Rebased and tested on top of Andrew's patch - bootstrapped on x86_64-unknown-linux-gnu - building on all targets in config-list.mk in progress * TCWG-777 (2/10) - Problem is still present on trunk - Original test-case: http://pastebin.com/UTv8g3aA - Original test-case assembly for -O1: http://pastebin.com/815TgDjV - Possibly reduced test-case: http://pastebin.com/UGUteX4a - Assembly for reduced test-case for -O1: http://pastebin.com/edKu6CxH - x86 assembly for reduced test-case for -O1: http://pastebin.com/9APbJeLr - Workaround: To disable CSE in branch conditions make flags volatile. This prevents storing result of ands to temporary but leads to worse code-gen. - Possible approaches from (https://bugs.launchpad.net/gcc-linaro/+bug/851258): a) teach PRE not to fold in such cases ? I don't know how. b) Write a new tree-ssa pass that "unfolds" cse on result of test conditions. Check if operand in if (operand != 0) is a result of test condition. eg: _8 = flags & 1; if (_8 != 0) goto true_branch else goto false_branch In this case we could add an attribute to _8 say "unfold". If we again come across if (_8 != 0) at a later point, and it's marked with "unfold", we can create a new ssa var with definition of _8. so it becomes: _9 = flags & 1; if (_9 != 0) ... which will "undo" CSE on test conditions. Does this sounds reasonable ? Should we do it on all test conditions ? I don't understand "suitable compare insn" a target should have in above link. * TCWG-145 (2/10) - Optimization is already implemented in PRE pass. - Verified for various test-cases in eembc. - Currently gcc does not convert global statics to locals - remove-local-statics-7.c not handled currently by gcc: (https://gcc.gnu.org/ml/gcc-patches/2008-07/msg01007.html) - Desirable to have ipa dead-store analysis to avoid stores to static vars: https://gcc.gnu.org/ml/gcc-patches/2008-07/msg01609.html https://gcc.gnu.org/ml/gcc-patches/2008-07/msg01602.html - continuing to look for cases where static-to-locals wins over PRE. * Misc (4/10) - Built firefox on x86 non-LTO - Read thru tree-ssa-dse.c, IPA, LTO doc - US Visa application - Setting up home office == Issues == Not able to connect to #linaro-tcwg thru ircproxy.linaro.org , password invalid. == Next Week == - TCWG-830 - TCWG-835 - TCWG-844 - continue investigating branch out of range error issue. - Work towards committing cfgloop.h patch

10 years, 10 months

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[ACTIVITY] 15-19 June

by Charles Baylis

== Progress == Sprint recovery [2/10] (TCWG-775) NEON intrinsics error messages [7/10] . familiarisation with differences between ARM and AArch64 NEON/SIMD backends . started porting error reporting changes to ARM NEON backend . pinged patch for AArch64 work Misc [1/10] == Plans == continue NEON error messages vectorization work discussions

10 years, 10 months

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[ACTIVITY]

by Renato Golin

== Progress == * Maintenance (CARD-1833 1/10) - Looking at AArch64 ADD->SUB a bit more * Buildbots (CARD-1823 6/10) - Moving LNT bot to CMake - Setting up LLD and LLDB buildbots - Investigating LNT instability / Perf buildbot * Background (3/10) - Code review, meetings, discussions, etc. - Reviewing more stride vectorizer patches (back-end) == Plan == * Try to get some development going back again...

10 years, 10 months

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[ACTIVITY] 15 - 19 June 2015

by Yao Qi

# Progress # * Linaro GDB [7/10] ** TCWG-805, aarch64 native debugging multi-arch support. Aarch64 GDB works well debugging Aarch32 programs, except on handling fork/vfork and watchpoint. Test harness uses ldd which doesn't handle aarch32 too. Report a kernel issue that it doesn't get TLS base right through ptrace in compat mode. Got a patch to fix it. * FSF GDB [3/10] ** Push in a fix to unbreak arm native gdb build. ** Post a patch to fix a bug on using PTRACE_GETREGSET on arm-linux. ** GDB 7.10 release. Branch isn't created. Test results of arm and aarch64 look good. # Plan # * TCWG-805, start to push some preparatory patches upstream. * Off on Thu. -- Yao

10 years, 10 months

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new gas feature: section name substitution sequence

by Nicolas Pitre

Hello toolchain people, I created a patch on top of upstream binutils for a feature I need which should be universally useful as well. Now I have 3 questions for you: 1) Does it look sane enough? 2) If so, could you integrate it in the Linaro release? 3) Would you be willing to promote it upstream? Comments appreciated. Here's the patch: ----- >8 Subject: [PATCH] gas: introduce section name substitution support When gas is invoked with --sectname-subst, the occurrence of %S in a section name will be substituted by the name of the current section. For example: .macro exception_code .pushsection %S.exception [exception code here] .popsection .endm .text [code] exception_code [...] .section .init [init code] exception_code [...] In the first exception_code invocation the .text.exception section is created while in the second invocation it is the .init.exception section that is created. This is useful e.g. to discriminate between anciliary sections that are tied to .init code and can be discarded at run time when initialization is over vs anciliary sections tied to .text sections that need to stay resident. This would also allow for actually omitting __exit sections from the Linux kernel binary when modules are configured in even when exit marked code generates exception table entries. Signed-off-by: Nicolas Pitre <nico(a)linaro.org> diff --git a/gas/ChangeLog b/gas/ChangeLog index 57fc30a..0189bb2 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2015-06-03 Nicolas Pitre <nico(a)linaro.org> + + * as.c (show_usage): Document --sectname-subst. + (parse_args): Add --sectname-subst. + * as.h (flag_sectname_subst): New. + * config/obj-elf.c (obj_elf_section_name): Add %S substitution. + * doc/as.texinfo: Document it. + 2015-06-03 Matthew Wahab <matthew.wahab(a)arm.com> * config/tc-arm.c (arm_archs): Add "armv8.1-a". diff --git a/gas/as.c b/gas/as.c index 2a8923f..fecfcd2 100644 --- a/gas/as.c +++ b/gas/as.c @@ -284,6 +284,8 @@ Options:\n\ fprintf (stream, _("\ --size-check=[error|warning]\n\ ELF .size directive check (default --size-check=error)\n")); + fprintf (stream, _("\ + --sectname-subst enable section name substitution sequences\n")); #endif fprintf (stream, _("\ -f skip whitespace and comment preprocessing\n")); @@ -447,6 +449,7 @@ parse_args (int * pargc, char *** pargv) OPTION_EXECSTACK, OPTION_NOEXECSTACK, OPTION_SIZE_CHECK, + OPTION_SECTNAME_SUBST, OPTION_ALTERNATE, OPTION_AL, OPTION_HASH_TABLE_SIZE, @@ -481,6 +484,7 @@ parse_args (int * pargc, char *** pargv) ,{"execstack", no_argument, NULL, OPTION_EXECSTACK} ,{"noexecstack", no_argument, NULL, OPTION_NOEXECSTACK} ,{"size-check", required_argument, NULL, OPTION_SIZE_CHECK} + ,{"sectname-subst", no_argument, NULL, OPTION_SECTNAME_SUBST} #endif ,{"fatal-warnings", no_argument, NULL, OPTION_WARN_FATAL} ,{"gdwarf-2", no_argument, NULL, OPTION_GDWARF2} @@ -848,6 +852,10 @@ This program has absolutely no warranty.\n")); else as_fatal (_("Invalid --size-check= option: `%s'"), optarg); break; + + case OPTION_SECTNAME_SUBST: + flag_sectname_subst = 1; + break; #endif case 'Z': flag_always_generate_output = 1; diff --git a/gas/as.h b/gas/as.h index 6de319e..635b2c5 100644 --- a/gas/as.h +++ b/gas/as.h @@ -589,6 +589,9 @@ COMMON enum size_check_warning } flag_size_check; + +/* If section name substitution sequences should be honored */ +COMMON int flag_sectname_subst; #endif #ifndef DOLLAR_AMBIGU diff --git a/gas/config/obj-elf.c b/gas/config/obj-elf.c index 4d7a8a7..78dc6d9 100644 --- a/gas/config/obj-elf.c +++ b/gas/config/obj-elf.c @@ -917,6 +917,27 @@ obj_elf_section_name (void) name = (char *) xmalloc (end - input_line_pointer + 1); memcpy (name, input_line_pointer, end - input_line_pointer); name[end - input_line_pointer] = '\0'; + + while (flag_sectname_subst) + { + char *subst = strchr (name, '%'); + if (subst && subst[1] == 'S') + { + int oldlen = strlen (name); + int substlen = strlen (now_seg->name); + int newlen = oldlen - 2 + substlen; + char *newname = (char *) xmalloc (newlen + 1); + int headlen = subst - name; + memcpy (newname, name, headlen); + strcpy (newname + headlen, now_seg->name); + strcat (newname + headlen, subst + 2); + xfree (name); + name = newname; + } + else + break; + } + #ifdef tc_canonicalize_section_name name = tc_canonicalize_section_name (name); #endif diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index 5710e1c..be13b6a 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -6259,6 +6259,36 @@ For ELF targets, the @code{.section} directive is used like this: .section @var{name} [, "@var{flags}"[, @@@var{type}[,@var{flag_specific_arguments}]]] @end smallexample +@cindex --sectname-subst +If the @samp{--sectname-subst} command-line option is provided, the @var{name} +argument may contain a substitution sequence. Only @code{%S} is supported +at the moment, and substitutes the current section name. For example: + +@smallexample +.macro exception_code +.section %S.exception +[exception code here] +.previous +.endm + +.text +[code] +exception_code +[...] + +.section .init +[init code] +exception_code +[...] +@end smallexample + +The two @code{exception_code} invocations above would create the +(a)code{.text.exception} and @code{.init.exception} sections respectively. +This is useful e.g. to discriminate between anciliary sections that are +tied to setup code to be discarded after use from anciliary sections that +need to stay resident without having to define two @code{exception_code} +macros just for that purpose. + The optional @var{flags} argument is a quoted string which may contain any combination of the following characters: @table @code Nicolas

10 years, 10 months

5
17
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[ACTIVITY] 15-19 June 2015

by Christophe Lyon

* 1 day off (2/10) == Progress == * Neon intrinsics tests - committed last batch of tests - need to think about tests for vget_lane which are still missing, but not high priority * linaro-gcc-5.1-2015.06 snapshot (4/10) - committed branch merge with upstream gcc-5-branch - prepared snapshot & updated release scripts * Upstream maintenance (1/10) - backported a fix from Michael to 4.8 and 4.9 branches - backported fix for PR62308 to 4.9 branch - most of the time spent on bootstrapping on aarch64 HW - started looking at some recent new tests having trouble dealing with some multilib variants * Misc (3/10) - meetings, conf-calls, emails, ... == Next == * linaro-gcc-5.1-2015.06 snapshot - build release notes - create a proper tag * backports, release, validation: - update doc according to our new process * validation: - take unstable tests into account * upstream maintenance: - check recent regressions

10 years, 10 months

1
0
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[ACTIVITY]

by Renato Golin

== Progress == * Maintenance (CARD-1833 2/10) - Initial work on ADD<->SUB for negative imm in asm * Buildbots (CARD-1823 6/10) - Adding test-suite to CMake buildbot (D10244) - Bisecting broken self-hosting vfp3 bots * Background (2/10) - Code review, meetings, discussions, etc. - Some more meetings about infrastructure... - LLVM status and plan for next half * Sprint Week in Grenoble == Plan == * Continue with CMake LNT changes * Carry on with ADD/SUB change * Revive ASM warnings discussion

10 years, 10 months

1
0
0 0

mfpu=neon and -march=native on aarch64-linux-gnu toolchain

by Virendra Kumar Pathak

Hi Linaro Toolchain Group, I have questions regarding -mfpu=neon and -march=native w.r.t aarch64 linaro native toolchain (aarch64-linux-gnu) I found gcc is not accepting these flags. On juno Board: gcc -mfpu=neon hello.c -o hello gcc: error: unrecognized command line option '-mfpu=neon' gcc -march=native hello.c -o hello hello.c:1:0: error: unknown value 'native' for –march Am I missing something ? Please help. Below is the machine details uname -a Linux juno 3.10.55.0-1-linaro-lt-vexpress64 #1ubuntu1~ci+141022094025 SMP Wed Oct 22 09:41:06 UTC 2014 aarch64 aarch64 aarch64 GNU/Linux gcc -v Using built-in specs. COLLECT_GCC=gcc COLLECT_LTO_WRAPPER=/usr/local/apps/gcc-native/gcc-linaro-5.1-2015.06.06.native-i686-mingw32_aarch64-linux-gnu/bin/../libexec/gcc/aarch64-linux-gnu/5.1.1/lto-wrapper Target: aarch64-linux-gnu Configured with: '/home/user_name/vpathak/build_abe/snapshots/gcc.git~linaro-4.9-branch/configure' SHELL=/bin/sh --with-bugurl=https://bugs.linaro.org --with-mpc=/home/user_name/vpathak/build_abe/builds/destdir/aarch64-linux-gnu --with-mpfr=/home/user_name/vpathak/build_abe/builds/destdir/aarch64-linux-gnu --with-gmp=/home/user_name/vpathak/build_abe/builds/destdir/aarch64-linux-gnu --with-gnu-as --with-gnu-ld --disable-libstdcxx-pch --disable-libmudflap --with-cloog=no --with-ppl=no --with-isl=no --disable-nls --enable-multiarch --disable-multilib --enable-c99 --with-arch=armv8-a --disable-shared --enable-static --with-build-sysroot=/home/user_name/vpathak/build_abe/sysroots/aarch64-linux-gnu --enable-lto --enable-linker-build-id --enable-long-long --enable-shared --with-sysroot=/home/user_name/vpathak/build_abe/builds/destdir/aarch64-linux-gnu/aarch64-linux-gnu/libc --enable-languages=c,c++,fortran,lto --enable-fix-cortex-a53-835769 --enable-checking=release --disable-bootstrap --with-bugurl= https://bugs.linaro.org --build=x86_64-unknown-linux-gnu --host=aarch64-linux-gnu --target=aarch64-linux-gnu --prefix=/home/user_name/vpathak/build_abe/builds/destdir/aarch64-linux-gnu Thread model: posix gcc version 5.1.1 (GCC) Thanks. -- with regards, Virendra Kumar Pathak

10 years, 11 months

2
3
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gcc-5 git branch

by Virendra Kumar Pathak

Hi Linaro Toolchain Group, I see two git branches for GCC-5 at https://git.linaro.org 1. https://git.linaro.org/toolchain/gcc.git/shortlog/refs/heads/gcc-5-branch 2. https://git.linaro.org/toolchain/gcc.git/shortlog/refs/heads/linaro/gcc-5-b… What is the difference between these two branches ? Which branch should be used for development ? Is it branch (1) refers to GCC upstream branch for GCC5 & branch (2) is linaro version of branch (1). Please comment. -- with regards, Virendra Kumar Pathak

10 years, 11 months

2
1
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[ACTIVITY] 1st-5th June

by Bernie Ogden

Holiday [2/10] Benchmark Automation - TCWG-360 [4/10] * Learned about central Jenkins instance * Considered ways of integrating benchmark scripts with said instance * Considered alternative way for benchmark scripts to interoperate with LAVA Misc [4/10] * Large mail backlog * Travel prep =Plan= Team sprint

10 years, 11 months

1
0
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[ACTIVITY] 01 - 06 June 2015

by Yao Qi

# Progress # * Linaro GDB [4/10] ** TCWG-805, aarch64 native debugging multi-arch support. aarch64 native gdb is able to debug arm program now, but with some problems on coredump. Patches are not posted. ** Give my input on GDB kernel awareness too, and the proposal finally is posted upstream. * FSF GDB [1/10] ** Patches review. * Misc [5/10] ** Attend an internal ARM Debug/Tracing summit. ** Prepare for the France travel. # Plan # * Sprint in Grenoble. -- Yao

10 years, 11 months

1
0
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abe: cross native toolchain compilation for aarch64-linux-gnu

by Virendra Kumar Pathak

Hi Linaro Toolchain Group, I am trying to build a cross-native toolchain for AARCH64 using ABE build framework. By cross native I mean that toolchain will be build on 0x86 (Red hat Santiago 6.4), it will run on AARCH64 (Juno) and will produce binaries to be run on AARCH64 (Juno) (If I am not mistaked) --build=0x86, --host=AARCH64, --target=AARCH64 Steps followed: 1. I built a cross toolchain first ../abe/configure ../abe/abe.sh --target aarch64-linux-gnu --build all --release 2015.05.29 --tarbin --disable update 2. Added the above cross toolchain (bin path) in the PATH 3. To build to cross-native ../abe/configure ../abe/abe.sh --host aarch64-linux-gnu --target aarch64-linux-gnu --build all --release 2015.06.01.native --tarbin --disable update But after some time, I got following error and compilation hanged. make: Leaving directory `/home/user_name/vpathak/build_abe/builds/aarch64-linux-gnu/aarch64-linux-gnu/gcc.git~linaro-4.9-branch-stage1' RUN: copy_gcc_libs_to_sysroot "/home/user_name/vpathak/build_abe/builds/destdir/aarch64-linux-gnu/bin/aarch64-linux-gnu-gcc --sysroot=/home/user_name/vpathak/build_abe/sysroots/aarch64-linux-gnu" /home/user_name/vpathak/abe/lib/make.sh: line 962: ./builds/destdir/aarch64-linux-gnu/bin/aarch64-linux-gnu-gcc: cannot execute binary file Am I missing something ? Please help. However with the following hack in the abe, I am able to compile cross-native toolchain for aarch64-linux-gnu. In the abe code base: ------------------------------------------------------------------------------------------------------- lib/make.sh Function copy_gcc_libs_to_sysroot() gcc_exe="`find -name ${target}-gcc`" - libgcc="`${gcc_exe} -print-file-name=${libgcc}`" + #libgcc="`${gcc_exe} -print-file-name=${libgcc}`" + libgcc="/home/user_name/vpathak/build_abe/builds/destdir/aarch64-linux-gnu/lib/gcc/aarch64-linux-gnu/4.9.3/libgcc.a" Since './builds/destdir/aarch64-linux-gnu/bin/aarch64-linux-gnu-gcc' is native toolchain it will not run on 0x86. Thus libgcc will be empty. Therefore I hard-coded libgcc path. ------------------------------------------------------------------------------------------------------- I had to disable gdb compilation. This error I faced while compiling cross-native compilation only. Cross compilation is successful on the same 0x86 machine. checking for library containing waddstr... no configure: error: no enhanced curses library found; disable TUI make: *** [configure-gdb] Error 1 make: Leaving directory `/home/user_name/vpathak/build_abe/builds/aarch64-linux-gnu/aarch64-linux-gnu/binutils-gdb.git~linaro_gdb-7.8-branch-gdb' WARNING: Make had failures! ERROR (#159): build_all (Failed building .) hacked patch --- a/lib/make.sh +++ b/lib/make.sh @@ -31,10 +31,10 @@ build_all() # to rebuilt the sysroot. local builds="infrastructure binutils libc stage2 gdb" else - local builds="infrastructure binutils stage1 libc stage2 gdb" + local builds="infrastructure binutils stage1 libc stage2" fi if test "`echo ${target} | grep -c -- -linux-`" -eq 1; then - local builds="${builds} gdbserver" + local builds="${builds}" fi --------------------------------------------------------------------------------------------------------------- Thanks. -- with regards, Virendra Kumar Pathak

10 years, 11 months

3
2
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Tool for checking coding style in Linaro Toolchain

by Virendra Kumar Pathak

Hi Linaro Toolchain Group, Is there any tool for checking coding style of the patches submitted to the Linaro Toolchain ? In other word is there any equivalent of Linux checkpatch.pl in Linaro Toolchain (GCC, Binutils etc) ? If yes, please let me know. If not, then in general how people check the coding style of the patches they submit to Linaro Toolchain (GCC, Binutils etc). I assume manual inspection (line by line) may be very tedious thing to do. Thanks. -- with regards, Virendra Kumar Pathak

10 years, 11 months

5
4
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[ACTIVITY] 25 - 29 May 2015

by Kugan

== Progress == * Upstream GCC (8/10) - TCWG-486 - Optimize Constant Uses in Loops. - Jeff reviewed it and asked for some minor changes - Rebased and redid full testing and posted it - TCWG-555 - Complete re-write of widening pass based on review comments - Getting ready to post for review * Misc (2/10) - Reading TACT User Manual - gcc-patches, gcc-bugs list - Meetings == Plan == - Continue with gcc stage1 activities

10 years, 11 months

1
0
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[Weekly] 25-29 MAY 2015

by Michael Collison

== This week == * Bug 539 - .LTHUNK symbols are surviving (2/10) - Built Qt 4.8 using 4.9 and 4.9 toolchain and verified fix identified by Jim Wilson - Plan to close as fixed * Bug 535 - static cast from float to int not working on ARM hardfp (2/10) - Investigation * TCWG-140 - Transform end of loop conditions to min_expr (1/10) - Investigation into blueprint and patch * TCWG-146 - Detect smin/umin idiom (2/10) - After investigation no patch deemed necessary for aarch64 * Misc (1/10) - Conference calls * US Holiday - Memorial Day, May 25th (2/10) == Next week == - Submit Aarch32 patch for TCWG-146 upstream - TCWG-140 investigation

10 years, 11 months

1
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[ACTIVITY] Week 22

by Prathamesh Kulkarni

== This week == * TCWG-619 (4/10) - Chromium builds with LTO single-partition with gold by changing arm_is_long_call_p() to always return true, thereby disabling short calls. - Fails to build with ld.bfd for single partiition with the following error: obj/third_party/webrtc/base/rtc_base.ipaddress.o: In function `rtc::IPAddress::IPAddress(unsigned int)': ipaddress.cc:(.text._ZN3rtc9IPAddressC2Ej[_ZN3rtc9IPAddressC5Ej]+0x28): undefined reference to `vtable for rtc::IPAddress' - gas debug for "Thumb2 branch out of range" in config/tc-arm.c: Fails in md_apply_fix at following condition: if ((value & ~0x3fffff) && ((value & ~0x3fffff) != ~0x3fffff)) { if (!(ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2))) as_bad_where (fixP->fx_file, fixP->fx_line, BAD_RANGE); else if ((value & ~0x1ffffff) && ((value & ~0x1ffffff) != ~0x1ffffff)) as_bad_where (fixP->fx_file, fixP->fx_line, _("Thumb2 branch out of range")); } The condition became true for value == fffffda Backtrace: http://pastebin.com/QZqbwNCy Options passed to as: -march=armv7-a -march=armv7-a -mfloat-abi=hard -mfloat-abi=hard -mfpu=neon -mfpu=neon -meabi=5 - Disabling the above condition results in: arm-linux-gnueabihf-g++: internal compiler error: Killed (program lto1) * PR49551 (2/10) - Modified patch and retested on x86 and arm. - Submitted patch upstream for review. * Misc (4/10) - Exams ended on Monday. - College Annual day. == Next Week == - Work towards getting the patch approved. - Continue investigating "Thumb2 branch out of range" error. - Begin with TCWG-777. - Submit cfgloop.h flattening patch upstream.

10 years, 11 months

1
0
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question on bfd - arch & mach

by Virendra Kumar Pathak

Hi Linaro Toolchain Group, I am going through the binutils code base specific to arm & aarch64. Please give some insight on below questions. 1. In the struct bfd_arch_info {...} (in bfd/bfd-in2.h) there are two fields 'enum bfd_architecture arch' and 'unsigned long mach'. I went trough the binutils porting guide (by MR.Swami.Reddy(a)nsc.com) which says 'arch' is for architecture & 'mach' is for machine value. At present in the bfd/bfd-in2.h :- arch = bfd_arch_aarch64 and mach = bfd_mach_aarch64 or bfd_mach_aarch64_ilp32. But what these fields really means ? What is the difference between 'arch' and 'mach'? Lets say instruction set architecture is ARMv8 (also known as aarch64 for 64 bit- if I am not wrong). Then we have specific implementation of this like cortex53, cortex57, Cavium ThunderX etc. With respect to this what will be the value of arch = ? and mach = ? 2. In the include/opcode/arm.h the 'arm_feature_set' is defined as a structure where as in include/opcode/aarch64.h 'aarch64_feature_set' is defined as unsigned long. Is there any specific reason for this? Why structure definition was not followed in aarch64 ? typedef struct { unsigned long core; unsigned long coproc; } arm_feature_set; typedef unsigned long aarch64_feature_set; 3. Also I see that in the case of arm, 'mach' values are derived from cpu extension value specified in that 'arm_feature_set' structure. For example. if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_cext_iwmmxt2)) mach = bfd_mach_arm_iWMMXt2; Whereas in aarch64 mach is derived based on API type (64 or 32). Any reason for this ? mach = ilp32_p ? bfd_mach_aarch64_ilp32 : bfd_mach_aarch64; Thanks in advance. -- with regards, Virendra Kumar Pathak

10 years, 11 months

2
2
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[ACTIVITY] 25-29 May

by Charles Baylis

== Progress == TCWG-775 NEON error messages (2/10) . wrote new patch for Aarch64 . tried to test it, but GCC testsuite stopped working on my laptop (random failures with "test for errors, tests randomly being marked UNSUPPORTED) Bank Holiday [2/10] Bug #1599 [1/10] . reproduced bug on Linaro GCC 4.9 , bisected both the cause and the trunk fix Misc [5/10] . attempted to diagnose GCC testsuite problems. Seems to be related to kernel version somehow. . Erratum workaround stuff (bug 1550, bug 1596) == Plans == Find working kernel for laptop Cleanup/submit patch for TCWG-775 Create JIRA cards following vectorization study (TCWG-735)

10 years, 11 months

1
0
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[ACTIVITY] 25 May -- 29 May

by Yao Qi

Bank holiday on Monday. [2/10] # Issue # No. Ubuntu is successfully installed on my chromebook. # Progress # * Linaro GDB [4/10] ** TCWG-517, GDB AAarch64 record/replay. Done. Patches are committed upstream. Fix one build failure caused these patches. ** TCWG-805, aarch64 native debugging multi-arch support. *** Switch to PTRACE_GETREGSET and PTRACE_SETREGSET. Patches are posted upstreams. *** Get ubuntun 14.02 running on chrombook successfully. ** Give my input on GDB kernel awareness too. * FSF GDB [3/10] ** PR 18392, review the fix and understand the code about tail call unwinding. ** Approve and commit some tiny patches. * Misc [1/10] ** Prepare for incoming France travel. ** Book flight and hotel for GNU Tools Cauldron. Next week: * TCWG-805, aarch64 native debugging multi-arch support. -- Yao

10 years, 11 months

1
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[ACTIVITY]

by Renato Golin

== Progress == * Bank Holiday (2/10) * Maintenance (CARD-1833 6/10) - Finished all FIXMEs in LLVM and Clang - Working on ASM warnings * Background (2/10) - Code review, meetings, discussions, etc. - Updated arm-bots.html to account for build num, commit range == Plan == * Continue working on ASM warnings * Move a few left-overs in ARMAsmParser to use ARMTargetParser If time allows... * Check the ADD -> SUB change in the assembler * Try to get the test-suite running on a CMake buildbot Background * Check the progress of some Android bugs

10 years, 11 months

1
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[ACTIVITY] 25-29 May 2015

by Christophe Lyon

* 1 day off * Neon intrinsics tests (4/10) - submitted last set for review * Misc (4/10) - meetings, conf-calls, emails, ... - checks for our new GCC mirror == Next == * Neon intrinsics tests: work on vget_lane test. * linaro-gcc-5.1-2015.06 release: - start working on backports

10 years, 11 months

1
0
0 0

[Weekly] 18-22 MAY 2015

by Michael Collison

* TCWG-140 - Transform end of loop conditions to min_expr (3/10) - Investigation into blueprint and patch * TCWG-146 - Detect smin/umin idiom (3/10) - Developing patch for Aarch64 for completeness * Vacation (4/10) == Next week == - Complete Aarch64 patch for TCWG-146 - Validate TCWG-146 - TCWG-140 investigation

10 years, 11 months

1
0
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[ACTIVITY] Week 21

by Prathamesh Kulkarni

* TCWG-619 (2/10) - "branch out of range" error disappears by disabling sibling call optimization - using gold results in internal error at arm.cc:4192 - using ld.bfd results in tons of same errors message during LINK chrome - "thumb2 branch out of range" - building with "-dp" option shows the error comes for function calls, generated from pattern call_value_symbol. * PR49551 (2/10) - Bootstrapped on x86, tested on x86 and arm. - added test-case. * Misc (6/10) - Exams == Next Week == - Submit patch to PR49551 upstream - Continue investigating "branch out of range" error. - Rebase and submit cfgloop.h flattening patch upstream.

10 years, 11 months

1
0
0 0

[ACTIVITY] 18-22 May 2015

by Kugan

== Progress == * Upstream GCC (8/10) - vector cost (TCWG-779) - benchmarking complete and analysed - Committed after full testing (bootstrap and regression testing) - Started working on widening pass based on review comments (TCWG-555) - Completed re-factoring with the new ideas - ran into many ICEs with the patch and making progress * Misc (2/10) - Looked at http://ctuning.org/wiki/index.php?title=CTools:MilepostGCC again - gcc-patches, gcc-bugs list - Meetings == Plan == - Continue with gcc stage1 activities

10 years, 11 months

1
0
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[ACTIVITY]

by Renato Golin

== Progress == * Releases (CARD-1431 1/10) - Final ARM/AArch64 3.6.1 * Automation Framework (CARD-1378 1/10) - More meetings with Lab about infrastructure * Maintenance (CARD-1833 5/10) - Working on FIXMEs to TargetParser * Buildbots (CARD-1823 1/10) - Bisecting self-hosting failure on thumbv7a * Background (2/10) - Code review, meetings, discussions, etc. - More stride vectorizer reviews (D9368) - Setting up boards for developers == Plan == * Finish the parser FIXMEs, get on with ASM warnings * Check some Android bugs and see if I can reduce their numbers * Probably a bit more infrastructure discussions

10 years, 11 months

1
0
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