== Progress ==
Arm gdb record-replay bug fix [4/10] [TCWG-314]
* Testing of all patches on x86 and arm machines.
* Patch submission upstream after sync up with latest gdb trunk.
AArch64 gdb record-replay bug fix [3/10] [TCWG-503][TCWG-498]
* Debugging of testsuite failures with apm and foundation mode.
* Patch series update after sync up with latest trunk.
GDB Tracepoints/Fast Tracepoints support on arm [2/10] [TCWG-480]
* Search for previously submitted patches, wiki info and other documentation.
* Started with initial study and code understanding.
Miscellaneous [1/10]
* Research GDB record/replay usage scenarios.
* Meetings/emails and installation/configurations etc
== Plan ==
AArch64 gdb record-replay bug fix [TCWG-503][TCWG-498]
* Fix test failures if possible otherwise submit updated patches.
GDB Tracepoints/Fast Tracepoints support on arm [TCWG-480]
* Further study and investigate a missing functionality on arm.
Verify GDB non-stop debug support on ARM. [TCWG-246]
== Progress ==
* Looked at implementation options for backlog cards and
closed/postponed cards that doss not benefit or cards that require
excessive re-architecture that will not be possible now. (5/10)
- TCWG-468 - Postponed after detailed study and discussion.
- TCWG-412 (Support literal/constant pool sharing (wont-fix): As it is,
intra procedularl literal pool fix happens in
TARGET_MACHINE_DEPENDENT_REORG with arm_reorg. It is quite complex and
somewahat hacky. it would become even more messy if we are to record
these information and reuse it for whole program as a way to share
literal poool. Additionally A-profile (which is Linaro's focus) dosent
benefit from this as we use movw/movt instead. Therefore decided to
clsoe this as wont fix.
* TCWG-413 - Release benchmarking (2/10)
- Benchmarking or release for a15 and a57
* Analysed coremark and spec2k for uxt/sxt optimizations (3/11)
- Studied coremark and have additional patches in development for
missing cases.
* Misc
- Looked at bug database and monitored patches relevant to arm/aasrch64
== Paln ==
* Look at open uxt/sxt bugs in gcc bugzilla
* Study coremark and then spec2k for uxt/sxt
== Progress ==
* Reviewed a big pile of benchmarking patches for cbuild2. (TCWG 1378
- 2/10).
* Worked on stabilizing "Backport" Jenkins job (TCWG 1378 - 6/10).
* Meetings and Misc (2/10)
== Plan ==
* Keep tracking down Jenkins issues with Backport job.
* Get my D01 board working finally, since I killed my Odroid U2.
* Do more thorough testing of SSH performance improvements.
=Progress=
cbuild2 benchmarking - TCWG-360 [4/10]
* Some disagreements with gerrit
* One of my patches broke bare metal builds (now fixed)
* More review of the way we store benchmark sources
Other - [5/10]
* Meetings, mail, etc (featuring newlib build options, defaults,
cbuild vs benchmark scripts)
* Learned to use git-send-email, bent it to my will
* Authentication pain on ARM-side
Holiday - [1/10]
=Plan=
cbuild2 benchmarking
* Finish source/data storage plan
* Figure out how benchmark cross-running will work, get started on it
Holiday next week (25th - 29th August)
== This week ==
* TCWG-515 - Neon intrinsic testing part 1 (3/10)
- Completed testing with internal compiler error discovered compiling
with -Og and -g
- GCC bugzilla report 62040 already exists for this issue
* TCWG-518 - Neon intrinsic testing part 2 (2/10)
- Completed testing with no regressions found
* TCWG-519 - Neon intrinsic testing part 3 (2/10)
- Completed testing with no regressions found
* Reviewed branch merge of Linaro 4.8 and 4.9 with FSF trees (3/10]
== Next week ==
* Continue with neon intrinsic testing
* Investigate bug 373 - [gcc-4.9][android][armv8] internal compiler error
* Develop outline for Linaro Connect presentation
== Progress ==
* TCWG-180 Debugging - LTO bootstrap failure in Aarch64 with GCC 4.9. (6/10)
Analyzed tree dumps between stage2 and stage3 compilers. Noted that
extra gimple declarations in stage2 compiler.
Also inline minimum parameters in gimple.c.048i.inline were different.
Richard Beiner found that way we hash the string literals was
different between stage2 and stage3 compilers.
Tested the patch, he posted on trunk but it does not solve the
comparison failures.
Also GCC garbage collector parameters for expansion and maximum heap
size varies between stage 2 and stage3. Setting this parameters to
same value in stage2 and stage3 builds fixes bootstrap failures in
Aarch64.
These fixes are for trunk and stage 1 5.0.
Ref: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62077
Still need to find a work around for release branches
Testing these patches on AMD64 /Aarch64 machines.
* Others (2/10)
* Upstream patch review.
* 1-1 Meeting Christophe.
* Misc and internal meeting.
* setup LLVM.
* Friday national holiday (2/10).
== Plan ==
* Continue LTO bootstrap issue.
* Benchmark Core mark with LTO.
* Upstream patch review.
== MISC ==
None .
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.08
stable release of both Linaro GCC 4.9 and Linaro GCC 4.8 source package.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler. The Linaro TCWG provides
stable[1] quarterly releases and monthly engineering[2] releases.
Linaro GCC 4.9 2014.08 is the fifth Linaro GCC source package release and first
stable one in the 4.9 series. It is based on FSF GCC 4.9.2-pre+svn213803 and
includes performance improvements and bug fixes.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.9.2-pre+svn213803
* Backport of [AArch64] Drop ISB after FPCR write.
* Backport of [AArch64] Remove from arm_neon.h functions not in the spec
* Backport of [AArch32] Fix check for __FAST_MATH in arm_neon.h
* Backport of [AArch64] fix and enable non-const shuffle for bigendian using TBL
instruction
* Backport of [AArch64] Fix constraint vec_unpack_trunk
* Backport of [AArch32] Cortex-A5 rtx costs table
* Backport of [AArch32] Handle clz, rbit types in arm pipeline descriptions
* Backport of [AArch64] Fix argument types for some high_lane* intrinsics
implemented in assembly
* Backport of [AArch64] Handle fcvta[su] and frint in RTX cost function
* Backport of [AArch64] Prologue rewrite + performance.
Linaro GCC 4.8 2014.08 is the fourteenth release in the 4.8 series and is in
maintenance. Based off the latest GCC 4.8.4+svn213802 release, it includes
performance improvements and bug fixes.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.8.4+svn213802
* Backport of Fix [AArch32] for PR sanitizer/58543
* Backport of Fix [AArch64] for PR target/59744
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
= Progress ==
* Upstream work (4/10, CARD-341)
- Patch review (gdb, binutils)
- glibc testsuites for ARM and AArch64
* Booting upstream kernel on Chromebook (4/10)
- Tried u-boot path but Google's shipped NV u-boot is broken in several ways
- Fall back to trying to boot a signed upstream kernel
- Gets halfway through boot then seems to turn the regulators off
* Malloc application benchmarking (2/10, TCWG-441)
- Add pdf library benchmark to benchmark suite
- Improve argument parsing and result plotting
- Seem to be hitting some new issue with mounting memory cgroup within docker
== Issues ==
* None
== Plan ==
* Iron out issues with malloc benchmark framework
* Get Chromebook booting
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Benchmarks (CARD-716 2/10)
- Wrapping up SPEC run, some results
- Fix missing tests, running with -ffast-math
* Toolchain (CARD-862 4/10)
- A few more assembler fixes
- http://llvm.org/PR20462
- http://llvm.org/PR20595
- Some vectorizer cleanups
- http://llvm.org/PR20655
* Background (4/10)
- Code review, meetings, discussions, etc.
- Trying D01s again as buildbots
== Plan ==
* Pick some more toolchain bugs to work on
* Release 3.5 tests and benchmarks
* Move bots to CMake, enable compiler-rt
* Change compilation to make Clang/LLVM non-NEON by default
* Enable D01s as buildbots
== Issues ==
* None.
== Progress ==
* Update "Keep constants in register when expanding" patch according
to comments (TCWG-486, 3/10).
* Refine ccmp patches since the old ones can not apply (TCWG-488, 2/10).
* Check PR62151, it was exposed by my commit r211885. But the root
cause was r208165.
* R/M toolchain related work (5/10)
== Plans ==
* Ping pending patches.
== Planed leaves ==
* Aug. 18 - 26.
Hi,
I am trying to build a working environment with Angstrom Linux, QT5 for
Toradex Apalis iMX6 module and additional QT5 SDK for my host machine.
The compilation of Angstrom with additional QT5 layer went fine.
However, there are some problems when building toolchain for the host
machine (command meta-toolchain-qt5). It seems that there is a problem
with configuration of linaro gcc runtime 4.8.
The reported error is: "checking dynamic linker characteristics...
configure: error: Link tests are not allowed after GCC_NO_EXECUTABLES".
The log file is in the attachment. Does anyone have any idea how to fix
this problem? I am using Ubuntu 14.04.
Thanks in advance,
Crt Gorup
Hello,
I'm trying to perform cross platform remote debugging from my x86 computer
to a remote ARM device. (ex: Beagle Bone Black)
I'm using Ubuntu 14.04 and Eclipse CDT.
I installed the Ubuntu package gcc-arm-linux-gnueabihf but the gdb debugger
is not in that package.
Therefore, I'm wondering if I should use the Linaro toolchain (which
include arm-linux-gnueabihf-gdb) or if I should install the Ubuntu
gdb-multiarch package.
What is the difference between gdb-multiarch and arm-linux-gnueabihf-gdb ?
Is it better to use gdb-multiarch ?
Thanks
ssinfod
== Progress ==
BeagleBoard and Pandaboard setup for gdb testing [3/10]
* Deployed debian linux on both boards
* Installation of required packages for gdb testing
* Run gdb native tests on Beagleboard, Pandaboard and Chromebook
Arm gdb record-replay bug fix [6/10] [TCWG-314]
* Applied previous asimd and vfp patches and test for failures
* Fixed exception due to a bug in previous patches with latest trunk.
* Fixed issues with solib trampoline code when stepping in reverse.
Miscellaneous [1/10]
* In pursuit of deploying linux on boards dd,ed my hard drive by
accident and spent some time re-installing my desktop.
== Plan ==
Arm record-replay bug fix [TCWG-314]
* Test bug fixes with all previous patches and resubmit.
Update and Submit Aarch64 record replay patches.
Resume work on Aarch64 prologue analysis.
=Progress=
cbuild2 benchmarking- TCWG-360 [6/10]
* Existed patches tidied up and gerritified
* A few drive-by bugfixes
* Cross-building support added and also gerritified
lowlevellock patch [1/10]
* Resubmitted bugfix, reacted to review
* Some wrestling with space-mangling evil in mail clients
Meetings/mail/etc [3/10]
=Plan=
Holiday Tuesday afternoon
cbuild2 benchmarking
* Get remote targets working
* Maybe look at results gathering
== This week ==
* Linaro bugzilla 331 - [4.9 Regression] ICE in final_scan_insn, at
final.c:2952 [4/10]
- Triaged and investigating
* Linaro bugzilla 307 - [Linaro 4.8] ICE in change_address_1, at
emit-rtl.c:2019 [1/10]
- Unable to validate. Further investigation before closing
* TCWG-515 - Neon intrinsic bug testing [5/10]
- Linaro Infrastructure headaches and setup.
- May split into several blueprints targeting two to three tests
- Require assistance debugging DejaGnu script error preventing some
tests from running
== Next week ==
- Continue with Neon intrinsic testing
- Continue investigation into resolution for Linaro bugzilla 331
== Progress ==
* Fixed aarch64_be-none-elf builds and cross tests. (2/10)
* Forked ancient RSH support in DejaGnu to be more SSH aware. SSH
is now takes 1/4 of the time it used to for each remote execution test
case. (TCWG 512 - 4/10)
* Stabilized new ZSSH protocol in DejaGnu, also much faster than the
current RSH/SSH support. (TCWG 512 - 3/10)
* Meetings and Misc. (1/10)
== Plan ==
* Get my D01 board working finally, since I killed my Odroid U2.
* Review benchmarking patches.
* Do more thorough testing of SSH performance improvements.
== Progress ==
* TCWG-180 Debugging - LTO bootstrap failure in Aarch64 with GCC 4.9. (6/10)
Tried to recompile object files that showed differences in GCC trunk
on amd64 machine.It turned out that GCC make system always builds LTO
files in “gcc” directory and uses prev-gcc/xg++ to build them.
No differences when building stage2 and stage3 objects under same
directory “gcc” in FSF trunk.
Doing the same experiment with gcc 4.9 branch shows failure both in
x86_64 and aarch64.
Communicated the issue to Richard Beiner. Got some feedback on
debugging from Honza and Richard.
Tried passing –save-temps to BOOT_CFLAGS using FSF trunk, getting
assembler errors. Need to come back to this problem after finding root
cause.
Read about LTO passes and wpa (partitioned ) vs non portioned mode.
* Others (2/10)
* Upstream patch review.
* 1-1 Meeting Christophe.
* Misc and internal meeting.
* setup LLVM.
* Friday off (2/10).
== Plan ==
* Continue LTO bootstrap issue.
* Benchmark Core mark with LTO.
* Upstream patch review.
== MISC ==
* National holiday on 15th August .
== Progress ==
TCWG-445 - AArch64 does not generate post-decrement stores.
* Issue resolved with Jiong's prologue/epilogue patch committed to trunk.
* Closed the card.
TCWG-291 - Zero/sign extensions (5/10)
* More review and posted patch based on that which was accepted
* Ran full set of validation (including s390x, aarch64 be, x86 and arm)
* Committed two outstanding patches
* Closed the card.
TCWG-413 - Release benchmarking (2/10)
* Benchmarking or release for a15 and a57
TCWG-468: Sha1 regress (2/10)
* Experimented with back-end patterns. Not much improvement for the
test-case.
- Misc (1/10)
* Looked at gcc bugs and closed old ones.
* Posted test-case patch.
== Plan ==
- Sha1 regressions
- Fixing assigned Bugs
== Issue ==
* None.
== Progress ==
* Refine and send the patch to fix pr61225 in Combine pass for review (2/10).
* Send out the ARM backend patch to keep some constant in register
(TCWG-486, 2/10).
* Rebase and test ccmp related patches (TCWG-488, 2/10).
* R/M toolchain related work (4/10).
== Plans ==
* Ping pending patches.
== Planed leaves ==
* Aug. 18 - 26.
* Benchmarks (CARD-716 3/10)
- Working on Linaro's SPEC scripts for LLVM
- Running SPEC2000 INT/FP (C/C++ only) on both ARMv7 and AArch64
- Re-writing some EEMBC scripts to be more stable
- EEMBC reported some regressions from 3.4.2
- But still same when compared with GCC 4.8 (all in Jira)
* Toolchain (CARD-862 3/10)
- Fixing bugs in the assembler/libc++abi
- http://llvm.org/PR20529
- http://llvm.org/PR20025
- Investigating other bugs in the assembler
- http://llvm.org/PR18926
- http://llvm.org/PR20422
* LLVM 3.5 Release (TCWG-476 1/10)
- Building and testing release candidate 2
* Background (3/10)
- Code review, meetings, discussions, etc.
- Buildbot failures
- Plan for 2014 H2
- Basic LLD AArch64 support landed upstream
== Plan ==
* Take actual holidays
* Work on more assembler fixes
* Finish SPEC runs, hopefully test last release candidate
* Have a look at the bots, libraries, CMake, NEON, etc
== Progress ==
* Upstream work (2/10, CARD-341)
- Patch review
- Submitted a fix for armeb-eabi configurations of binutils
- Tested and removed aarch64 lowlevellock.h
- Tidied up glibc patchwork
* Rewrote src-release as a shell script (4/10, TCWG-487)
- Allows building releases as xz
- 80% less evil than existing makefile
* Booting upstream kernel on Chromebook (2/10)
- Kernel configured and built
- I think I have a plan...
* Off Wednesday (2/10)
== Issues ==
* None
== Plan ==
* Upstream kernel on Chromebook
* malloc app benchmarks
* Potentially glibc 2.20 release week
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
BeagleBoard and Pandaboard setup for gdb testing [1/10]
* Got both alive and working with minimal os
* Trying ubuntu prebuilt binaries didnt work.
Out of office to get internet fixed and buy accessories for boards. [1/10]
Eid Public Holidays in Pakistan from 29th July till 1st August [8/10]
== Plan ==
BeagleBoard and Pandaboard setup
* Get linux running on both boards
* Run gdb test scripts on both boards
* Compare test results outputs with chromebook and x86
Update and Submit Aarch64 record replay patches.
Resume work on Aarch64 prologue analysis.
== Progress ==
GNU Tools Cauldron
* Some useful corridor meetings with various GNU tools developers
and maintainers.
TCWG Sprint [8/10]
* Got to meet the team and discuss TCWG roadmap.
* Some useful howtos specially back porting and patch review howtos.
* Sprint with ARM and useful discussions on gdb patch review.
Return travel from UK on Friday 25th July.[2/10]
== Plan ==
Get over travel fatigue and resume office.
Get missing components and set up pandaboard and beagle board for gdb testing.
Eid Public Holidays in Pakistan from 29th July till 1st August
== Progress ==
* Installed dmucs on the TCWG build slaves, which works in DejaGnu
to do cpu load based scheduling of executing cross tests
remotely. (TCWG 511 - 4/10)
* Spent some time trying to improve SSH performance for cross
testing by opening the SSH connection via expect, and keeping it
open. (TCWG 512 - 2/10)
* Attended GNU Tools Cauldron and Linaro Sprint. (13/10)
* Worked with Bernie on changes to the benchmarking branch.
* Installed a Jenkins instance on my home server which uses my own
build farm for testing Jenkins/Cbuildv2 changes without screwing
up validation. (TCWG 1378 - 1/10)
- Experimented with some new plugins that might be useful.
(TCWG 1378 - 1/10)
- Added command line options to jenkins.sh so it'll work on
different Jenkins installations.
* Fixed bare metal testing for arm*-none-eabi*. (2/10)
* Fixed several Cbuildv2 bugs in bugzilla (TCWG 1378 - 2/10)
- #167 - tcwgweb.sh not accurate.
- #183 - cbuild2 configure --enable-bootstrap sets
'enable_bootstrap' not 'bootstrap'.
- #249 - cbuild2.sh --help only works after configure is run
* Reviewed and approved patches:
- Add configure option to choose compiler languages
- Enable parallelism by default
- Add support for --march
- Add support for --enable and --disable make_docs in configure
and cbuild2.sh
- lib/checkout.sh: Make checkout() dryrun safe when repodir
doesn't yet exist
- lib/stamp.sh: check_stamp() --force and --dryrun should return 1
- cbuild2.sh: Make --dump a do_ option so it's position doesn't
matter
- lib/make.sh: hello_world() will now return 1 if the compilation
or link fails
* Experiment with Docker to see if it has any advantages over a
chroot, which it seems to. (2/10)
* Refactor building binary tarballs. Now it doesn't run the test
first, it assumes the branch has already been validated. (2/10)
* Fix aach64_be-none-elf builds.
== Plan ==
* Fix current breakage in cbuild2/master.
* Get back to SSH performance improvements (TCWG 512).
* Get my D01 board working finally, since I killed my Odroid U2.
* Work through more cbuildv2 bug reports (TCWG 1378).
== Issues ==
* Sorry, several weeks of status in one activity report, I need to
get back to doing these weekly...
== Progress ==
- Travelling from TCWG sprint (2/10)
- Zero/sign extension elimination (TCWG-291) 2/10
* Posted the modified patch and some discussions. Further testing.
-SHA1 regression (TCWG-468) 4/10
* Looked at IRA's uses of back end cost model. It might be a
limitation (See the notes below). Looking at the test-case from sha1
which also has inline asm whose constraints are causing further issues.
- Misc (2/10)
* Looked at bugs assigned (https://bugs.linaro.org/show_bug.cgi?id=85)
* Set-up LLVM
== Plan ==
- Sha1 regressions
- Fixing assigned Bugs
---------------------------------------------------------------------
In AArch64, some of the integer operations support “w” constraint
(FP_REGS). For example *addsi3_aarch64 pattern supports it. However, not
all of the integer operations supports it. In the cases where it is
supported, all the operands have to be in FP_REGS and it will not work
if we have one operand in FP_REGS and other in GENERAL_REGS.
If there is an allocno whose pseudo register is used only in
*addsi3_aarch64 insns, it will have low cost for register class FP_REGS
(as in the case of a28 below exacted from an example). If the other
pseudo register used in *addsi3_aarch64 (a27 in the example below) is
also used in instructions (rorsi3_insn in the exaple below) that does
not support “w” constraint, there is going to be a cost involved in
moving it from FP_REGS to GENERAL_REGS (or other way)
Currently IRA dosent seems to be considering this dependency in
considering this inter dependency in cost calculation.
=Progress=
cbuild2 benchmarking - TCWG-360 [7/10]
* Integrated benchmarking more into the core of cbuild2
* 'Audited' the benchmarks lying around on toolchain64
* Persuaded cbuild2 to use git-over-ssh
Meetings/mail/etc [3/10]
=Plan=
cbuild2 benchmarking
* Convert eembc integration into reviewable patches
* Get cross-compilation working
* Get remote targets working
== This week ==
* Neon intrinsic testing (4/10)
- Patched sources with Christophe's patches
- Ran Neon intrinsic tests for vclz and vqadd
- Investigating regressions
* On leave Monday and Tuesday; out sick Wednesday (6/10)
== Next week ==
* Continued Neon intrinsic testing
== Issues ==
* None.
== Progress ==
* Rework the patch to fix pr61225 in Combine pass. (4/10)
* Investigate code-size regression when skipping arm_split_constant in
expand (TCWG-486, 4/10).
- For reg & 0xffff, zero_extendhi instruction is more efficient.
- For "PLUS", the define_insn_and_split "*arm_addsi3" is only
available when "reload_completed || !arm_eliminable_register
(operands[1])". The cprop and combine passes can not recover it back
when there is no chance to optimize the constant.
* R/M toolchain related work (2/10).
== Plans ==
* Send out the patches for review.
* Refine ccmp related patches.
== Planed leaves ==
* Aug. 18 - 22.
== Progress ==
* Toolchain (CARD-862 2/10)
- Helping debug some sanitizer work
- Re-evaluating compiler-rt on ARM with CMake
* LLVM 3.5 Release (TCWG-476 2/10)
- Working on SPEC to run with LLVM
* Background (6/10)
- Code review, meetings, discussions, patches, etc.
- Email and patch backlog due to Cauldron and sprint
- Investigating and fixing buildbot/build failures
== Plan ==
* Finish SPEC-LLVM integration, run against 3.5 vs. 3.4.2
* Test Release Candidate 2, when it comes
* Back to compiler-rt work...
== Progress ==
* Various small tasks (3/10)
- Catching up on email
- Bug report investigations
- Expenses from Cauldron/Sprint
- Pushing patches
- Tidy some JIRA cards
* Investigated gdb testsuite failures on Chromebook (2/10)
- Looks like a kernel issue, need to try a newer kernel on Chromebook
* Investigated state of ARM and AArch64 glibc testsuites for 2.20 release (2/10)
- Results look ok but a couple of things need investigation at some point
* Triaged bugzilla bugs (1/10)
* Built releases of binutils, eglibc and gdb for 2014.08 (2/10)
== Issues ==
* None
== Plan ==
* Get a newer kernel booting on Chromebook
* Look at improving src-release for xz tarballs
* Figure out what to do with glibc testsuite failures on AArch64
--
Will Newton
Toolchain Working Group, Linaro
Hi guy,
In order to have soft-float support in toolchain, I tried to build our toolchain using Linaro ct-ng script.
I used "linaro-armeb-linux-gnueabihf" configuration then change floating point option from hard to soft.
There is the error I have:
[ERROR] /projects/broadcom-linux/joelz/r/linaro-gcc-build/.build/armeb-linux-gnueabi/build/gcc-core-shared/lib/gcc/armeb-linux-gnueabi/4.8.3/../../../../armeb-linux-gnueabi/bin/ld: error: /projects/broadcom-linux/joelz/r/linaro-gcc-build/.build/armeb-linux-gnueabi/build/gcc-core-shared/lib/gcc/armeb-linux-gnueabi/4.8.3/libgcc.a(bpabi.o) uses VFP register arguments, /projects/broadcom-linux/joelz/r/linaro-gcc-build/.build/armeb-linux-gnueabi/build/build-libc/elf/librtld.map.o does not
For short, libgcc.a(bpabi.o) uses VFP register arguments, but librtld.map.o does not.
The C library used is eglibc version (Linaro 2.19-2014.04), is this a way to make eglibc work with sfot-float?
Thanks!
Joel
I was using arm-eabi builds on Linaro Android 4.9 toolchain 2014.06.
I've just downloaded 2014.07 and found out there is not an arm-eabi
toolchain.
I need arm-eabi to build Linux kernels and arm-none-eabi toolchain from
here:
http://releases.linaro.org/14.07/components/toolchain/binaries/gcc-linaro-a…
is not capable of building LTO kernels.
Error pops up : "cc1: error: -fno-fat-lto-objects are supported only with
linker plugin"
TL;DR, I need arm-eabi builds from Linaro Android toolchains.
arm-none-eabi builds are not built with linker plugin enabled.
Short week (Friday off)
== Progress ==
* GCC trunk cross-validation (2/10)
- catch up with backlog, reported newly introduced FAILs
- analyzed logs of spurious failures, improved reporting of such cases
- the script will know send a separate email with the svn ids
it has selected for validation, to help fill the backports spreadsheet
* Infrastructure (2/10)
- started deployment of past releases to help us quickly
reproduce/investigate bug reports
- 14.* binary releases deployed on toolchain64 (/work/toolchains)
- automation not yet possible because of problem with the lab
internal squid proxy preventing the download of
http://releases.linaro.org/14.07/components/toolchain/binaries for
parsing
- started deployment of past toolchains built from the source
releases using cbuild2 but ran into build problems
* Neon intrinsics tests (1/10)
* Misc (conf calls, meetings) (3/10)
- 1-1 calls to get feedback after Cauldron+Sprint
- a bit of bugzilla triage
- backports reviews for 14.08 release
== Next ==
Holidays, back on Aug 18th
Hi Linaro-toolchain team,
I notice that the Linaro toolchain binary only support hard-float. We have a platform which is ARMv7 based does not support VFP.
Could you generate toolchain binary for ARmv7 that allows soft-float?
Thanks,
Joel
The Linaro Toolchain Working Group (TCWG) announces the 2014.07-1 release
of the Linaro GCC 4.9 source package. This is a respin of the 2014.07
release which
contained a backport of a revision that is only relevant to trunk.
Changes in this GCC source package release are:
* Updates to GCC 4.9.1 (svn212635)
* Revert backport of [AArch32] Fix PR target/61154.
Please find the original 2014.07 release notes below:
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.07
stable release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2014.07 is the fourth Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.1+svn212419 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler approaches version 4.9.1.
The Linaro TCWG will provide monthly stable[1] source package releases until
FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in
FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of
stable quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.9.1-pre+svn212419
* Backport of [AArch32] Wrap long literals in HOST_WIDE_INT_C in
aarch-common.c
* Backport of [AArch32] Rewrite TLC Intrinsics.
* Backport of [AArch32] Remove vzip, vuzp, vtrn builtins and cleanup
* Backport of [AArch32] Use enum name instead of integer value for
PARAM_SCHED_PRESSURE_ALGORITHM.
* Backport of [AArch32] Vectorise bswap*
* Backport of [AArch32] Fix PR/61331
* Backport of [AArch32] Fix PR target/61154
* Backport of [AArch32] Use mov_imm type for movw operations consistently
* Backport of [AArch32] Remove XFmode from ARM backend.
* Backport of [AArch64] Rewrite REV Intrinsics.
* Backport of [AArch64] Implement HARD_REGNO_CALLER_SAVE_MODE.
* Backport of [AArch64] Support tail indirect function call.
* Backport of [AArch64] Fix stack protector for ILP32
* Backport of [AArch64] ILP32 dynamic linker
* Backport of [AArch64] Correct signedness of builtins, remove casts from
arm_neon.h
* Backport of [AArch64] clarify stack layout diagram
* Backport of [AArch64] Implement movmem for the benefit of inline memcpy
* Backport of [AArch64] Fix REG_CFA_RESTORE mode.
* Backport of [AArch64] Fix layout of frame layout code.
* Backport of [AArch64] Fix some reg-to-reg move scheduler types.
* Backport of [AArch64] Implement CRC32 ACLE intrinsics + testsuite.
* Backport of [AArch64] Implement ADD in vector registers for 32-bit scalar
values.
* Backport of [AArch32/AArch64] TARGET_ATOMIC_ASSIGN_EXPAND_FENV AArch64
* Backport of [AArch32/AArch64] Use signed chars in gcc.dg/pr60114.c.
* Backport of [AArch32/AArch64] Rewrite UZP Intrinsics.
* Backport of [AArch32/AArch64] Rewrite TRN Intrinsics.
* Backport of [AArch32/AArch64] Rewrite EXT Intrinsics.
* Backport of [genattrtab] Fix memory corruption, allocate enough memory for all
bypassed reservations
* Backport of Fix PR c/60114
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
=Progress=
GNU Cauldron
TCWG Sprint [8/10]
* Really helpful to meet (almost) everybody
* Some useful discussion, too
memcpy on A15 - TCWG-390 [1/10]
* Should have let this lie but I had an odd 1/2 day and some data
begging to be looked at
* Turned out I'd fat-fingered the wrong data
* But I gained more evidence suggesting that cortex-strings
benchmark is too noisy
(Non-sprint) meetings/mail etc [1/10]
=Plan=
cbuild2 benchmarking
* Fit what I have into Rob's worldview
* Hopefully convert it into some reviewable patches
Follow up on some notes from Cauldron, sprint
== Progress ==
* GNU Cauldron (4/10)
- GCC+LLVM presentation had some positive reviews
- Discussed sanitizers roadmap
- Very interesting meeting with QuIC
* TCWG Sprint (4/10)
- Mostly about GNU tools
- Team Mission streamlined, looking good
- LLVM roadmap attracted some attention
- We could have some bite-sized work from other team members?
* Release 3.5 testing (TCWG-476 2/10)
- No test regressions
- Spotted some benchmark regressions
- ARMv7 is overall the same on EEMBC
- AArch64 is overall 10% faster on EEMBC
* Weekend working, Friday off
== Plan ==
* Release week!
- Investigate 3.5 performance regressions on v7
- Work around the lack of perf on v8?
- Run SPEC on both v7 and v8 and spot regressions
== Progress ==
* Attend GNU Cauldron.
* TCWG Sprint (8/10)
- Participated in Discussions about TCWG/GNU tools.
- Partcipated in Discussions with ARM mainatiners.
- Discussed about Connect plans.
- LLVM status.
- Attend Backport Demo by Yvan / some Bug fix Activity.
* Friday off traveling back home (2/10)
== Plan ==
* Continue LTO bootstrap issue
* Benchmark Core mark with LTO
* Upstream patch review.
== Issues ==
* Large Memory Model put on hold now.
* Waiting on ARM on Aarch64 SYS V ABI.
== This week ==
* TCWG Sprint (8/10)
- Validation process greatly clarified including roadmap
* Launchpad 1318831 - Invalid unpoisoning of stack redzones on ARM (2/10)
- Finished validating and working thru git review isses with Launchpad
== Next week ==
* Begin neon intrinsic testing
* I will be off on Monday and Tuesday
Hi all concerned:
this test code I given below: AARCH32
[https://email-cn04.huawei.com/owa/14.3.158.1/themes/base/pgrs-sm.gif]
Test function[X][X]
{
volatile unsigned int val0 = 0;
volatile unsigned int val1 = 0;
asm volatile(“mrrc p15, 1, %0, %1, c15” : “=r”(val0), “=r”(val1))
val0 &= ~(1<<6);
val1 &= ~(1<<6);
asm volatile(“mcrr p15, 1, %0, %1, c15” : “=r”(val0), “=r”(val1));
}
After compiling, the result is:
mrrc 15, 1, r2, r3, cr15
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-28]
bic r3, r3, #64;
str r3, [fp, #-28]
ldr r3, [fp, #-24]
bic r3, r3, #64
str r3, [fp, #-24]
mcrr 15, 1, r2, r3, cr15
obviously , it is not what I expect. I have val0 an vl1 two vars, but the compiling result is only one val takes effect.
especia I have to mention is AARCH32.
thanks.
Peter
Hi,
Do you happen to know the answer to the git/svn questions below? Thanks.
-----Original Message-----
From: LDTS [mailto:support@linaro.zendesk.com]
Sent: 25 July 2014 08:43
To: Scott Douglass
Subject: Request received: accessing toolchain source releases - Member user
Thank you for contacting Linaro.
Your request (#927 <https://support.linaro.org/requests/927> ) has been received and is being reviewed by Linaro Developer Technical Support (LDTS). One of our Support agents will be in contact with you as soon as possible. If you would like our agent to contact you via phone, please include your phone number in the comments.
To view your ticket and/or add additional comments, reply to this email or click the link below:
http://support.linaro.org/requests/927
Scott Douglass
Jul 25 16:43
Hi,
I’ve been looking at https://wiki.linaro.org/WorkingGroups/ToolChain (https://wiki.linaro.org/WorkingGroups/ToolChain) and I see the Tree links that give me the git repository and commit id for the current releases of the toolchains (for example, 4.9-2014.06-1 => https://git.linaro.org/toolchain/gcc.git/commit/56d9fd9281e8cef3ea35b7d9ad8… (https://git.linaro.org/toolchain/gcc.git/commit/56d9fd9281e8cef3ea35b7d9ad8…
My first question is: is there a straight-forward way (for example, a tag) to find the commit ids of older (4.9) releases? Or is searching the commit messages the best way?
Also, is there svn access as well or just git access? (Git access is enough, but svn access would be slightly easier for me.)
Also, I has a couple comments on that wiki page:
It says “Pre-built versions that run on generic Linux or Windows are available at http://launchpad.net/linaro-toolchain-binaries.”, but it looks like the that Launchpad project is no longer being maintained (no 4.9 and no recent 4.8). Perhaps the wiki page should be updated (and the Launchpad description updated).
The wiki page also links to https://wiki.linaro.org/Cycles/Next/Release/Status (https://wiki.linaro.org/Cycles/Next/Release/Status) which seems even more out-of-date than the Launchpad binaries; perhaps that link should be updated/removed, too.
Thanks.
-- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782
##- Please type your reply above this line -## Message-Id:5EV1YF0A_53d20a9134254_35e73f955b4b3338321343_sprut
-- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590
ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782
Hi all,
I'm working on booting Linaro LSK 3.10.40 kernel in be8 mode on our Cortex-A9 system.
There is an issue related to VFP instruction. It complain "vstmia" is an undefined instruction.
The VFP is supported in CPU and CONFIG_VFP and CONFIG_VFPv3 are enabled in kernel config.
Are there any patch need to be done for VFP in BE mode?
The booting log show as following:
call sys_access(/init)
Freeing unused kernel memory: 2832K (c0600000 - c08c4000)
kernel_init: try to execute '/init' (ramdisk_execute_command)
en->run_init_process(/init)
init (1): undefined instruction: pc=0000aab8
Code: f00f dff8 2a20 1268 (acec) 108b
Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004
The disassembly code show the undefined instruction is "vstmia".
armeb-linux-gnueabihf-objdump -D busybox_unstripped > busy.asm
0000aa90 <__sigsetjmp>:
...
aab6: 6812 ldr r2, [r2, #0]
aab8: ecac 8b10 vstmia ip!, {d8-d15}
aabc: f412 7f00 tst.w r2, #512 ; 0x200
The rootfs is busybox 1.22.1 compiled by Linaro BE hard floating toolchain.
https://releases.linaro.org/14.04/components/toolchain/binaries/gcc-linaro-…
Thanks,
Joel
== Progress ==
* On Holiday from 14th to 17th July 2014.
* Travel to Cambridge to attend TCWG Sprint and GNU Tools Cauldron on
Friday 18th July.
== Plan ==
* Attend GNU Tools Cauldron 18th to 20th July.
* Attend TCWG Sprint 21st to 24th July.
* Friday 18th July return back after attending TCWG Sprint and GNU
Tools Cauldron in UK.
== Progress ==
* Testing and Analysis of testsuite failures in arm-linux-gdb [TCWG-509] [6/10]
-- Run ARM GDB testsuite on local chromebook, remote chrombook and
pandaboards.
-- Investigation of failures on arm.
* AArch64 GDB handling of functions with empty prologue. [TCWG-504] [1/10]
-- Short list aarch64 prologue skipping requirements.
* Browsing gdb related upstream discussions and reviewing aarch64
regset rework stuff. [1/10]
* Preparation for travel to UK, obtaining medical NOC document for
international travel. [2/10]
== Plan ==
* On Holiday from 14th to 17th July 2014.
* Travel to Cambridge to attend Sprint and Cauldron.
=Progress=
cbuild2 benchmarking - TCWG-360 [7/10]
* Much fighting with benchmarking branch on a panda
* Ported eembc benchmarking over to my way of doing things
* A bit of cleanup around the 'reduce noise by shutting down services' stuff
* Slew my ailing Ubuntu VM, started bringing up a beagle as a 2nd
sacrificial target
lowlevellock.h - TCWG-435 [1/10]
* Roland patch review/thinking about how to test a corner case
Meetings/mail/etc [2/10]
=Plan=
Cauldron/TCWG sprint
Hopefully some cbuild2 benchmarking progress
== Progress ==
* Annual leave Monday to Wednesday (6/10)
* Travel to Cauldron/Sprint (2/10)
* Catching up on email, pushing patches, bugs etc. (2/10)
== Issues ==
* None
== Plan ==
* GNU Tools Cauldron
* Toolchain Sprint
--
Will Newton
Toolchain Working Group, Linaro