== Progress ==
* GNU Cauldron (4/10)
- GCC+LLVM presentation had some positive reviews
- Discussed sanitizers roadmap
- Very interesting meeting with QuIC
* TCWG Sprint (4/10)
- Mostly about GNU tools
- Team Mission streamlined, looking good
- LLVM roadmap attracted some attention
- We could have some bite-sized work from other team members?
* Release 3.5 testing (TCWG-476 2/10)
- No test regressions
- Spotted some benchmark regressions
- ARMv7 is overall the same on EEMBC
- AArch64 is overall 10% faster on EEMBC
* Weekend working, Friday off
== Plan ==
* Release week!
- Investigate 3.5 performance regressions on v7
- Work around the lack of perf on v8?
- Run SPEC on both v7 and v8 and spot regressions
== Progress ==
* Attend GNU Cauldron.
* TCWG Sprint (8/10)
- Participated in Discussions about TCWG/GNU tools.
- Partcipated in Discussions with ARM mainatiners.
- Discussed about Connect plans.
- LLVM status.
- Attend Backport Demo by Yvan / some Bug fix Activity.
* Friday off traveling back home (2/10)
== Plan ==
* Continue LTO bootstrap issue
* Benchmark Core mark with LTO
* Upstream patch review.
== Issues ==
* Large Memory Model put on hold now.
* Waiting on ARM on Aarch64 SYS V ABI.
== This week ==
* TCWG Sprint (8/10)
- Validation process greatly clarified including roadmap
* Launchpad 1318831 - Invalid unpoisoning of stack redzones on ARM (2/10)
- Finished validating and working thru git review isses with Launchpad
== Next week ==
* Begin neon intrinsic testing
* I will be off on Monday and Tuesday
Hi all concerned:
this test code I given below: AARCH32
[https://email-cn04.huawei.com/owa/14.3.158.1/themes/base/pgrs-sm.gif]
Test function[X][X]
{
volatile unsigned int val0 = 0;
volatile unsigned int val1 = 0;
asm volatile(“mrrc p15, 1, %0, %1, c15” : “=r”(val0), “=r”(val1))
val0 &= ~(1<<6);
val1 &= ~(1<<6);
asm volatile(“mcrr p15, 1, %0, %1, c15” : “=r”(val0), “=r”(val1));
}
After compiling, the result is:
mrrc 15, 1, r2, r3, cr15
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-28]
bic r3, r3, #64;
str r3, [fp, #-28]
ldr r3, [fp, #-24]
bic r3, r3, #64
str r3, [fp, #-24]
mcrr 15, 1, r2, r3, cr15
obviously , it is not what I expect. I have val0 an vl1 two vars, but the compiling result is only one val takes effect.
especia I have to mention is AARCH32.
thanks.
Peter
Hi,
Do you happen to know the answer to the git/svn questions below? Thanks.
-----Original Message-----
From: LDTS [mailto:support@linaro.zendesk.com]
Sent: 25 July 2014 08:43
To: Scott Douglass
Subject: Request received: accessing toolchain source releases - Member user
Thank you for contacting Linaro.
Your request (#927 <https://support.linaro.org/requests/927> ) has been received and is being reviewed by Linaro Developer Technical Support (LDTS). One of our Support agents will be in contact with you as soon as possible. If you would like our agent to contact you via phone, please include your phone number in the comments.
To view your ticket and/or add additional comments, reply to this email or click the link below:
http://support.linaro.org/requests/927
Scott Douglass
Jul 25 16:43
Hi,
I’ve been looking at https://wiki.linaro.org/WorkingGroups/ToolChain (https://wiki.linaro.org/WorkingGroups/ToolChain) and I see the Tree links that give me the git repository and commit id for the current releases of the toolchains (for example, 4.9-2014.06-1 => https://git.linaro.org/toolchain/gcc.git/commit/56d9fd9281e8cef3ea35b7d9ad8… (https://git.linaro.org/toolchain/gcc.git/commit/56d9fd9281e8cef3ea35b7d9ad8…
My first question is: is there a straight-forward way (for example, a tag) to find the commit ids of older (4.9) releases? Or is searching the commit messages the best way?
Also, is there svn access as well or just git access? (Git access is enough, but svn access would be slightly easier for me.)
Also, I has a couple comments on that wiki page:
It says “Pre-built versions that run on generic Linux or Windows are available at http://launchpad.net/linaro-toolchain-binaries.”, but it looks like the that Launchpad project is no longer being maintained (no 4.9 and no recent 4.8). Perhaps the wiki page should be updated (and the Launchpad description updated).
The wiki page also links to https://wiki.linaro.org/Cycles/Next/Release/Status (https://wiki.linaro.org/Cycles/Next/Release/Status) which seems even more out-of-date than the Launchpad binaries; perhaps that link should be updated/removed, too.
Thanks.
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Hi all,
I'm working on booting Linaro LSK 3.10.40 kernel in be8 mode on our Cortex-A9 system.
There is an issue related to VFP instruction. It complain "vstmia" is an undefined instruction.
The VFP is supported in CPU and CONFIG_VFP and CONFIG_VFPv3 are enabled in kernel config.
Are there any patch need to be done for VFP in BE mode?
The booting log show as following:
call sys_access(/init)
Freeing unused kernel memory: 2832K (c0600000 - c08c4000)
kernel_init: try to execute '/init' (ramdisk_execute_command)
en->run_init_process(/init)
init (1): undefined instruction: pc=0000aab8
Code: f00f dff8 2a20 1268 (acec) 108b
Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004
The disassembly code show the undefined instruction is "vstmia".
armeb-linux-gnueabihf-objdump -D busybox_unstripped > busy.asm
0000aa90 <__sigsetjmp>:
...
aab6: 6812 ldr r2, [r2, #0]
aab8: ecac 8b10 vstmia ip!, {d8-d15}
aabc: f412 7f00 tst.w r2, #512 ; 0x200
The rootfs is busybox 1.22.1 compiled by Linaro BE hard floating toolchain.
https://releases.linaro.org/14.04/components/toolchain/binaries/gcc-linaro-…
Thanks,
Joel
== Progress ==
* On Holiday from 14th to 17th July 2014.
* Travel to Cambridge to attend TCWG Sprint and GNU Tools Cauldron on
Friday 18th July.
== Plan ==
* Attend GNU Tools Cauldron 18th to 20th July.
* Attend TCWG Sprint 21st to 24th July.
* Friday 18th July return back after attending TCWG Sprint and GNU
Tools Cauldron in UK.
== Progress ==
* Testing and Analysis of testsuite failures in arm-linux-gdb [TCWG-509] [6/10]
-- Run ARM GDB testsuite on local chromebook, remote chrombook and
pandaboards.
-- Investigation of failures on arm.
* AArch64 GDB handling of functions with empty prologue. [TCWG-504] [1/10]
-- Short list aarch64 prologue skipping requirements.
* Browsing gdb related upstream discussions and reviewing aarch64
regset rework stuff. [1/10]
* Preparation for travel to UK, obtaining medical NOC document for
international travel. [2/10]
== Plan ==
* On Holiday from 14th to 17th July 2014.
* Travel to Cambridge to attend Sprint and Cauldron.
=Progress=
cbuild2 benchmarking - TCWG-360 [7/10]
* Much fighting with benchmarking branch on a panda
* Ported eembc benchmarking over to my way of doing things
* A bit of cleanup around the 'reduce noise by shutting down services' stuff
* Slew my ailing Ubuntu VM, started bringing up a beagle as a 2nd
sacrificial target
lowlevellock.h - TCWG-435 [1/10]
* Roland patch review/thinking about how to test a corner case
Meetings/mail/etc [2/10]
=Plan=
Cauldron/TCWG sprint
Hopefully some cbuild2 benchmarking progress
== Progress ==
* Annual leave Monday to Wednesday (6/10)
* Travel to Cauldron/Sprint (2/10)
* Catching up on email, pushing patches, bugs etc. (2/10)
== Issues ==
* None
== Plan ==
* GNU Tools Cauldron
* Toolchain Sprint
--
Will Newton
Toolchain Working Group, Linaro
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.07
stable release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2014.07 is the fourth Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.1+svn212419 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler approaches version 4.9.1.
The Linaro TCWG will provide monthly stable[1] source package releases until
FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in
FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of
stable quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.9.1-pre+svn212419
* Backport of [AArch32] Wrap long literals in HOST_WIDE_INT_C in
aarch-common.c
* Backport of [AArch32] Rewrite TLC Intrinsics.
* Backport of [AArch32] Remove vzip, vuzp, vtrn builtins and cleanup
* Backport of [AArch32] Use enum name instead of integer value for
PARAM_SCHED_PRESSURE_ALGORITHM.
* Backport of [AArch32] Vectorise bswap*
* Backport of [AArch32] Fix PR/61331
* Backport of [AArch32] Fix PR target/61154
* Backport of [AArch32] Use mov_imm type for movw operations consistently
* Backport of [AArch32] Remove XFmode from ARM backend.
* Backport of [AArch64] Rewrite REV Intrinsics.
* Backport of [AArch64] Implement HARD_REGNO_CALLER_SAVE_MODE.
* Backport of [AArch64] Support tail indirect function call.
* Backport of [AArch64] Fix stack protector for ILP32
* Backport of [AArch64] ILP32 dynamic linker
* Backport of [AArch64] Correct signedness of builtins, remove casts from
arm_neon.h
* Backport of [AArch64] clarify stack layout diagram
* Backport of [AArch64] Implement movmem for the benefit of inline memcpy
* Backport of [AArch64] Fix REG_CFA_RESTORE mode.
* Backport of [AArch64] Fix layout of frame layout code.
* Backport of [AArch64] Fix some reg-to-reg move scheduler types.
* Backport of [AArch64] Implement CRC32 ACLE intrinsics + testsuite.
* Backport of [AArch64] Implement ADD in vector registers for 32-bit scalar
values.
* Backport of [AArch32/AArch64] TARGET_ATOMIC_ASSIGN_EXPAND_FENV AArch64
* Backport of [AArch32/AArch64] Use signed chars in gcc.dg/pr60114.c.
* Backport of [AArch32/AArch64] Rewrite UZP Intrinsics.
* Backport of [AArch32/AArch64] Rewrite TRN Intrinsics.
* Backport of [AArch32/AArch64] Rewrite EXT Intrinsics.
* Backport of [genattrtab] Fix memory corruption, allocate enough memory for all
bypassed reservations
* Backport of Fix PR c/60114
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
== Progress ==
* More work on launchpad bugs (3/10)
- Moved gdb bugs over to bugzilla and closed down Launchpad tracker
- Found secret location of Linaro eglibc bugs in Launchpad!
- Triaged, moved, closed as many bugs as possible, some still remain
* Respin of binutils 2.24 2014.07 release (1/10)
* Get binutils ARM testsuite all passing on EABI, mostly on OABI (2/10)
* glibc patch review and build warning fixes (2/10, CARD-341)
* Annual leave on Friday (2/10)
== Issues ==
* None
== Plan ==
* 4 days in Berlin
* Travel to Cauldron
--
Will Newton
Toolchain Working Group, Linaro
Hello Will and list,
do you have a prepackaged static libfdt.a for aarch64?
I think it's part of some of the released images you provide, but
maybe you have it also available as a single package?
Thank you,
Claudio
== Week of July 7th ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Further Jenkins fixes and improvements
-- Various bits of build farm administration
-- Investigated feasibility of [really] remote cross-testing -- yes, it is feasible!
- STREAM performance regression (TCWG-388, 2/10)
-- Resumed patch submission (now that testing is working much better)
- Various meetings and discussions (2/10)
--
Maxim Kuvyrkov
www.linaro.org
== Week of June 30th ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Troubleshooted Jenkins jobs
-- Various cbuild2 improvements
- Migrated master VM of TCWG dev environment to AWS (2/10)
-- It is now at tcwg-dev-env-master.linaro.org
- Various meetings and discussions (2/10)
-- Attempted to test QEMU's aarch32 crypto support
-- Organized travel for GCC GSoC student to GNU Tools Cauldron. Thanks Linaro for providing sponsorship for this!
--
Maxim Kuvyrkov
www.linaro.org
=Progress=
memcpy regression on A9 - TCWG-390 [6/10]
* Not down to the branch predictor after all
* Can be fixed for A9 with explicit pld, but this isn't free
cbuild2 benchmarking - TCWG-360 [1/10]
* Dug out my branch, merged in trunk, refreshed memory
Meetings/mail/etc [3/10]
* Including a little patch review for Roland's lowlevellock.h (TCWG-435)
=Plan=
Close TCWG-390 as wontfix
Lots more cbuild2 benchmark automation
Keep up with lowlevellock.h
== Progress ==
* Recovered from flu on leave 7th and 8th July (4/10)
=LTO bootstrap -tcwg180 (2/10)=
Git bisect experiments shows bootstrap compare errors apprearing and
disappearing at trunk at different revisons.
Alteast 3 revisons LTO bootstrap passes
r210740 2488876068f541a341472c3aeedadccc255f0696 PASS
r210854 271fe9cf111f6b581451bbfb4d346757877896cd PASS
r210973 487fea840105dbb0ff516b797e7d86bea82ef74a PASS
It is hard to do backport of revisons which fixes this bug. Need to
discuss with LTO people in GCC mailing list
=Reload spill fix -tcwg180 (2/10)=
Emailed my status on benchmarking
https://gcc.gnu.org/ml/gcc-patches/2014-07/msg00450.html
This bug cannot be fixed without performance degradation. So if it
cannot be up streamed, the reporter can use the patch to build his
package atleast. Planning to close this bug if I did not receive any
comments from maintainers.
=Misc (2/10)=
* GCC internal team meeting
* Meeting with Ryan
== Plan ==
* Benchmark coremark -O3 vs -O3 -flto.
* Email to marcus on ABI for large memory model in Aarch64.
* Cauldron preparation.
== Planed leaves ==
* Jul 18- 25: Travel to Cambridge.
== Progress ==
- 8th and 9th on holiday (4/10)
- Zero/sign extension elimination (TCWG-291) 3/10
* Patch one is accepted
* Posted the modified patch 2 after some discussions
* Started analysing the code generated for coremark and spec2k
* Looks there are more places that can be improved. I will post
additional patches after completing it
- Launchpad bugs (3/10)
* https://bugs.launchpad.net/gcc-linaro/+bug/1320965
* https://bugs.launchpad.net/gcc-linaro/+bug/1331112
== Plan ==
- sha1 regressions
- 15th and 16th on holiday
== Progress ==
* One day off.
* Test and send out the local NLS patch for community review (1/10).
* Test ccmp patches. Can not reproduce a FAIL in previous regression
test with the latest trunk(TCWG-488, 1/10).
* Test codes to skip arm_split_constant (TCWG-486, 3/10). Performance
results seam OK for spec2000, coremark dhystone and eembc.
* R/M toolchain related work (3/10).
== Plans ==
* Ping pending patches.
* Update ccmp patches.
== Planed leaves ==
* Jul. 15 - 25: Travel to Cambridge.
* Aug. 4 -8: Annual leaves.
== This week ==
Provide ldp/stp peephole optimization for Aarch64 [TCWG-446] [0/10]
- Halted development due to duplicate ARM development project by
Bin Cheng
Launchpad 1318831 - Invalid unpoisoning of stack redzones on ARM [3/10]
- Verifying test results
Launchpad 1267761 - miscompilation of unsigned comparison on aarch64 [2/10]
- Testing under way on Jenkins
Neon intrinsic tests [4/10]
- background work to gain familiarity with effort
Misc Meetings [1/10]
== Next week ==
- Verify testing on Launchpad 1267761 and 1318831
- Begin investigating compiler bugs discovered by neon intrinsic tests
== Future ==
== Progress ==
* GCC trunk cross-validation
- reported a few regressions
* Automation Framework (2/10)
- looked at Jenkins configuration & logs of some failures
* AArch64 libsanitizer (1/10)
- tried to use cbuild2 in the lab to build & test on HW, but all my
build attempts failed for various reasons
* Neon intrinsics tests (3/10)
- feedback from upstream requests some renaming changes + GNU coding
style fixes
- since reformating the existing testsuite is a manual and
error-prone task, it will bring additional delay in improving GCC
testsuite.
- it's probably more efficient to run the existing tests regularly
and start reporting & fixing the bugs identified, not waiting for the
full conversion
- updated the existing tests for fp16 and poly* types support with
GCC (reference built with armcc)
- interestingly, compiling the original testcases with armcc for
aarch64 caused ICE on 28 source files.
* Misc (meetings, conf-calls, ....) (4/10)
== Next ==
Holidays for 2 weeks
== Progress ==
* Monday holiday
* Automation Framework (CARD-1378 6/8)
- TCWG D01 moved in, Chromebooks out
- Movng LLVM buildbots to D01s
- D01s have no NEON support... :S
- We might have to move some Chromes back in
- Moving hackboxes to Chromebook 2s
* Background (2/8)
- Code review, meetings, discussions, etc.
== Plan ==
* Deal with NEON issue in the rack
* Finish Cauldron presentation
* Try to get the D01s as buildbots, even without NEON
== Progress ==
* AArch64 GDB reverse watchpoints issue. [TCWG-503] [4/10]
-- Found a new fix in generic process record implementation.
Testing stalled by too many 2500 failures seen on arm-linux-gdb in
general and some 850 record/replay implementation.
* AArch64 GDB handling of functions with empty prologue. [TCWG-504] [4/10]
-- Analysis of prologue generated by aarch64-gcc
-- Make an understanding of code implementation for arm-linux-gdb.
-- Try to reproduce reported bugs.
* Testing and Analysis of testsuite failures in arm-linux-gdb [TCWG-509] [1/10]
* Browsing gdb related upstream discussions. [1/10]
== Plan ==
* AArch64 GDB reverse watchpoints issue. [TCWG-503]
-- Test and submit fix for target record for the case where we cant
step breakpoints.
* Investigate issues in arm-linux-gdb testsuite results. [TCWG-509]
* Travel preparations to UK for Tools cauldron and TCWG sprint.
-- Obtain health certificate for international travelers.
* On Holiday from 14th to 17th July 2014.
=Progress=
memcpy regression on A9 - TCWG-390 [7/10]
* Tweaked bench.py some more
* Cobbled together a bare metal version of cortex-strings benchmark
* Was surprised to find that the problem does not relate to Linux
* Have some evidence that points at the branch predictor
Meetings/mail/etc [3/10]
=Plan=
See if A9 performance is recoverable without sacrificing other targets
Push some of my improvements into the cortex-strings repo
Possibly write up my cortex-strings-benchmarking-in-lava method
Back to cbuild benchmark automation
== Progress ==
Zero/sign extension elimination (TCWG-291) 10/10
- Patch updated based on review comments.
- Regression tested with standard set-up
- Created test-cases.
- Set-up additional architectures for validation
* aarch64-none-elf --with-abi=ilp32 (Foundation model)
* aarch64-none-linux-gnu --with-abi=ilp32 seems to be broken.
* Set-up qemu based s390x-ibm-linux
* Tried x86_64-linux -mx32 but ran into many issues.
- Patch now waiting for s390x-ibm-linux. All others are OK.
- will post once the results are available
== Plan ==.
- Spec2k regressions
- sha1 regressions
- 8th and 9th on holiday.
== This week ==
Provide ldp/stp peephole optimization for Aarch64 [TCWG-446] [6/10]
- Investigated options for improving ldp/stp pairing and developed
patch
- Testing underway
Launchpad 1267761 - miscompilation of unsigned comparison on aarch64 [1/10]
- Backported revision 206529 from trunk
- Testing under way on Jenkins
Launchpad 1296942 - marked fixed released based on backport by Yvan Roux
[1/10]
- July 4th holiday [2/10]
== Next week ==
Complete testing on Launchpad 1267761 and TCWG-446 and initiate code review
== Future ==
Travel to Cambridge on July 11th for Cauldron and TCWG Spring
Am 05.07.2014 17:36, schrieb Emilio Pozuelo Monfort:
> Control: reassign -1 gcc4.8,gcc4.9
>
> Hi,
>
> This is still a problem with GCC 4.9. Is there any progress on this? This is
> making aegisub FTBFS on armel, blocking the libass transition.
afaik, no. See also https://gcc.gnu.org/ml/gcc/2014-07/msg00000.html
== Progress ==
* Toolchain (CARD-862 2/9)
- Investigating LLD, MCLinker
* Automation Framework (CARD-1378 4/9)
- Lots of validation and lab meetings
- Planning and designing a new rack:
- Replace all chromebooks with D01s
* Background (3/9)
- Code review, meetings, discussions, etc.
- A bit more on Cauldron's presentation
- Revamping LLVM plan, TCWG mission, Validation docs
* Some illness...
== Plan ==
More rack stuff... Monday holiday.
== Progress ==
* Patch review, testing and follow-up (3/10, CARD-341)
- glibc 2.20 freeze still not announced
- submit more warning fix patches
- reviewed series of gdb thumb prologue patches
* Get postgresql malloc benchmark using unix domain sockets (2/10, TCWG-441)
* Built releases of eglibc and binutils for 2014.07 (3/10)
* Started looking at moving binutils and gdb bugs in launchpad to
bugzilla (1/10)
* Other small things (1/10)
- Investigated a couple of other small issues for various people
- Meetings
== Issues ==
* None
== Plan ==
* Clear up more old bugs and move to bugzilla/JIRA/upstream
* malloc benchmarking
* glibc patches
--
Will Newton
Toolchain Working Group, Linaro
The Linaro Toolchain Working Group is pleased to announce the 2014.06
release of Linaro GCC 4.7.
As announced at Linaro Connect USA 2013 Linaro GCC moved to a pattern
of quarterly stable releases, with engineering releases in the
intervening months. This is the third stable release, and contains no
known regressions compared to the 2014.04 release.
Linaro GCC 4.7 2014.06 is the twenty forth release in the 4.7 series.
Based off the latest GCC 4.7.5+svn211571 release, this is the eleventh
release after entering maintenance and the final one.
Interesting changes include:
* Updates to GCC 4.7.4+svn211571
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing
list":http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at #linaro-tcwg
* Bug reports should be filed in Launchpad against "Linaro GCC
project":http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro
support":mailto:support@linaro.org
== Progress ==
* AArch64 GDB reverse watchpoints issues. [TCWG-503] [6/10]
-- Proposed a fix which failed testing now working on an alternate
fix in gdb process record target implementation.
* Further progress on AArch64 GDB handling of functions with empty
prologue. [TCWG-504] [2/10]
-- Analysed different type of obj files and how they are being handled by gdb.
* Investigate and improve ARM gdb frame unwinding [TCWG-157] [1/10]
-- Try to reproduce reported bugs.
* Miscellaneous [1/10]
-- Setting up gdb remote testing with hackboxes.
-- Meetings etc.
== Plan ==
* AArch64 GDB reverse watchpoints issue. [TCWG-503]
-- Figure out a new fix in gdb process record implementation, test
it and then justify it.
* AArch64 GDB handling of functions with empty prologue. [TCWG-504]
-- Further investigation.
=Progress=
memset performance improvement - TCWG-156 [2/10]
* Bugfixed/improved cortex-strings-bench-on-lava
memcpy regression on A9 - TCWG-390 [6/10]
* Scanned through lots of data
* Learned some perf and some streamline
* Still don't know what's going on here
lowlevellock performance bugs - TCWG-435 [0/10]
* Stalled until someone reacts to my pings
Meetings/mail/etc [2/10]
* Including some questions about whether we need softfloat support in
binary releases
=Plan=
Keep prodding at memcpy with perf/streamline
Explore repeatability of cortex-strings benchmark
See how much quicker I can make cortex-strings benchmark without
compromising repeatability
Possibly try out a bare metal version of (a subset of) cortex-strings benchmark
* Analysis of PR61411 (CARD-341) [2/10]
* Attempted to analyse VP8 decode performance on Aarch64 vs Aarch32
(TCWG-?) [6/10]
. took a while to find compatible libvpx source and compilers :(
. can't find a good way to profile on Aarch64, perf is broken, gprof
results look implausible
* Misc [2/10]
== Issues ==
* None
== Progress ==
* Take care Linaro binaries release (1/10).
* Send out ccmp patches for community review (TCWG-488, 1/10).
* loop2_invariants heuristics tune (1/10, TCWG-469). One patch was
committed @r212135.
* Constant optimization (TCWG-486, 7/10 )
- Try to keep constant in register when expanding. But benchmark
results show regression due to combine behavior changes.
- Try to keep unsigned constant when expanding. For crc |= 0x8000,
crc is unsigned short. If 0x8000 is represented as unsigned value, no
need to split 0x8000. But in middle-end, wide_int_storage::set_len and
trunc_int_for_mode always do sign extension. "trunc_int_for_mode
(INTVAL (op), mode) == INTVAL (op)" is always checked when checking
operand (e.g. in general_operand of recog.c). And in RTL, there is no
"unsigned" information at all.
== Plans ==
* Update ccmp patches according to comments.
* Continue on constant optimization.
* Ping pending patches.
== Progress ==
* Zero/sign extension elimination (TCWG-15) (10/10)
- Posted two patches for review and gone through few iterations
- Looked at flag_wrapv and !flag_strict_overflow regressions
* ARM (and possibly some other targets) truncates negative values and
this makes them incompatible with the value range in SSA. One solution
is to ignore any gimple statements that load negative constants when
eliminating zero/sign extension elimination.
* We also loose the OVF(INF) information in tree when they are
converted to wide_int and propagated to SSA.
- Testing on a target that support PTR_EXTEND
* Trying to set-up x86_64-linux with -mx32. Still not able to compile
as I am getting various errors in glibc. Looking into it,
== Plan ==
* Upstream zero/sign extension elimination activities
== Week of June 23rd ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Various cleanups and improvements to cbuild2.
-- Troubleshooting of Jenkins stability problems.
-- Increasing test coverage for arm big-endian toolchains.
- Various meetings and discussions (3/10)
--
Maxim Kuvyrkov
www.linaro.org
== Week of June 16th ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Refactored cbuild2's schroot support after Rob's review
-- Posted updated patches
- Started moving TCWG dev environment master vm to Linaro's AWS (1/10)
-- This the the VM from where toolchain64.lava.schroot and maximk.schroot are synchronized.
-- Once migrated, all TCWG admins can access it, not just me.
- Various meetings and discussions (2/10)
--
Maxim Kuvyrkov
www.linaro.org
== Week of June 9th ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Added support for native testing inside schroot
-- Troubleshooting of various problems
-- Assisted Yvan in testing of the 2014.06 source release and general fire-fighting
- Various meetings and discussions (2/10)
- Interviewed 2 potential assignees (1/10)
--
Maxim Kuvyrkov
www.linaro.org
== Progress ==
* Patch review, testing and follow-up (4/10, CARD-341)
- glibc 2.20 freeze upcoming
- submit some warning fix patches
* Add support for ARM HWCAP2 to glibc (2/10, TCWG-499)
* Submit a patch for increasing ld max page size on ARM (1/10)
* Reformatted backports spreadsheet for glibc, binutils and gdb (1/10)
* Investigated language runtimes (1/10)
* Meetings (1/10)
== Issues ==
* None
== Plan ==
* More glibc patch work for the freeze (1st July)
* malloc benchmarking
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* GCC trunk cross-validation (CARD-647) (6/10)
- email robot is now working
- added list of "ignored" tests when reporting regressions, mainly
because they are unstable when run under qemu (threads...)
- a57+crypto FPU config looks OK
- tried to use "contrib/test_summry" to send results, but that would
flood gcc-testresults mailing-list
- looked at impact of using CFLAGS/CFLAGS_FOR_TARGET etc upon
libstdc++ tests. Needs deeper investigation
- robustified scripts to handle more compute farm errors (random
"interrupted system call")
* AArch64 libsanitizer: no progress this week
* Neon intrinsic tests: review started
* Misc (meetings, conf-calls, ...) 4/10
- 4.7-2014.06 release done, benchmarks on-going
== Next ==
* GCC cross-validation
- look more deeply at the impact of the various CFLAGS (on testsuites results)
* Neon intrinsic tests:
- handle feedback
* AArch64 libsanitzer: resume work
* Publish 4.7-2014.06 release
== Progress ==
* Toolchain (CARD-862 1/10)
- Testing Compiler-RT on autoconf/ARM
- Checking LLD
* Automation Framework (CARD-1378 6/10)
- Writing script to manage TCWG rack
- Testing D01 with new kernel
- Testing Chromebook 2 vs. 1 vs. D01 for LLVM
- Cleaning up failed Chromebooks
- Pointlessly working on beagle bones
* Background (3/10)
- Code review, meetings, discussions, etc.
- Starting the GCC + LLVM presentation
== Plan ==
* continue trying to build compiler-rt with autoconf on ARM
* continue working on the LLVM + GCC presentation
* initial investigations on lld and MCLinker
The Linaro Toolchain Working Group (TCWG) announces the 2014.06-1 release of
the Linaro GCC 4.9 source package. This is a respin of the 2014.06 release which
fixes some issues on AArch64 big-endian and in AArch64 libjava.
Changes in this GCC source package release include:
* Updates to GCC 4.9.1-pre+svn211964
* Revert backport of [AArch64] Define TARGET_FLAGS_REGNUM.
* Backport of [AArch64] Cost model improvements.
Please find the original 2014.06 release notes below:
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.06
stable release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2014.06 is the third Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.1-pre+svn211054 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler approaches version 4.9.1.
The Linaro TCWG will provide monthly stable[1] source package releases until
FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in
FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of
stable quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.9.1-pre+svn211054
* Backport of [AArch32] PR rtl-optimization/60663
* Backport of [AArch32] Suppress Redundant Flag Setting for Cortex-A15.
* Backport of [AArch32] Support ORN for DIMode.
* Backport of [AArch32] Optimise NotDI AND/OR ZeroExtendSI for ARMv7A.
* Backport of [AArch32] Allow any register for DImode values in Thumb2.
* Backport of [AArch32] Initialize new tune_params values.
* Backport of [AArch32] Initialise T16-related fields in Cortex-A8
tuning struct.
* Backport of [AArch32] Enable tail call optimization for long call.
* Backport of [AArch64] TRY_EMPTY_VM_SPACE Change for ILP32.
* Backport of [AArch64] Fix TLS for ILP32.
* Backport of [AArch64] vrnd<*>_f64 patch.
* Backport of [AArch64] Fix possible wrong code generation when
comparing DImode values.
* Backport of [AArch64] Add a space to memory asm code between base
register and offset.
* Backport of [AArch64] Fix aarch64_initial_elimination_offset calculation.
* Backport of [AArch64] vqneg and vqabs intrinsics implementation.
* Backport of [AArch64] Vreinterpret re-implemention.
* Backport of [AArch64] Define TARGET_FLAGS_REGNUM.
* Backport of [AArch64] Merge longlong.h from glibc tree.
* Backport of [AArch64] add, sub, mul in TImode.
* Backport of [AArch64] Add handling of bswap operations in rtx costs.
* Backport of [AArch64] Fully support rotate on logical operations.
* Backport of [AArch64] Use standard patterns for stack protection.
* Backport of [AArch64] VDUP Testcases.
* Backport of [AArch64] Vectorise bswap[16,32,64].
* Backport of [AArch64] Enable TBL for big-endian.
* Backport of [AArch64] Reverse TBL indices for big-endian.
* Backport of [AArch64] Relax modes_tieable_p and cannot_change_mode_class.
* Backport of [AArch64] Improve vst4_lane intrinsics.
* Backport of [AArch64] Rewrite and tests ZIP Intrinsics.
* Backport of [AArch64] libitm Enabled.
* Backport of [AArch64] Support full addressing modes for ldr/str in
vectorization scenarios
* Backport of [AArch32/AArch64] rtx costs (FMA, Cortex-A8, ...).
* Backport of Fix warning in libgfortran configure script.
* Backport of Remove PUSH_ARGS_REVERSED from the RTL expander
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.