- linaro-toolchain - lists.linaro.org

[ACTIVITY] 26 - 30 May 2014

by Kugan

== Progress == * Zero/sign extension elimination (TCWG-15) (7/10) - regression tested and fixed all the issues - final bootstrap and regression testing for arm and x86_64 are ongoing - will post the patch for comment after checking the results * benchmarking (TCWG-468) (1/10) - Set-up chrome-book for a15 release benchmarking * SAH1 performance (TCWG-413) (2/10) - Christophe noted regression for aarch64_be due to clean-up patch. - register_move_cost hook in aarch64 does not handle all the cases (CORE_REGS and POINTER_REGS) and due to this, it calculates FP2FP cost for these classes . With CORE_REGS gone, costs for register classes are now different. Cost table needs adjustment. * FENV for C11 TCWG-447 - Committed ARM part. == Plan == * Benchmarking. * Upstream zero/sign extension elimination activities. * sha1 performance.

11 years

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[ACTIVITY] Week 22

by Renato Golin

== Progress == * Kernel (CARD-1246 2/8) - Fixed edge cases for named registers - http://llvm.org/PR19841 - http://llvm.org/PR19837 * Background (6/8) - Code review, meetings, discussions, etc. - TCWG Rack re-org - Trying to set up native Chromebooks - Trying to set up APM - Trying to add Compiler-RT to our buildbots == Plan == * Continue rack re-org * Continue RT support on current bots * Try libc++ bot * Have a look at sanitizer bot

11 years

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[ACTIVITY] 26 - 30 May 2014

by Will Newton

== Progress == * Bank Holiday Monday (2/10) * Got a postgresql malloc benchmark running (4/10, TCWG-441) * Started refactoring malloc microbenchmark based on review (2/10, TCWG-160) * Patch review and testing (2/10) == Issues == * None == Plan == * Holiday Tuesday and Wednesday * Finish refactoring malloc microbenchmark * Work on results plotting code for benchmarks -- Will Newton Toolchain Working Group, Linaro

11 years

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Prebuilt Linaro 2014.04 arm-linux-gnueabihf: cannot find /lib/ld-linux-armhf.so.3

by Denys Dmytriyenko

Hi, I've been having this issue with latest binary Linaro 2014.04 toolchain from http://releases.linaro.org/14.04/components/toolchain/binaries/gcc-linaro-a… It comes with own sysroot, but linker fails to locate /lib/ld-linux-armhf.so.3 $ make arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o nvs.o nvs.c arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o misc_cmds.o misc_cmds.c arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o calibrator.o calibrator.c arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o plt.o plt.c arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o wl18xx_plt.o wl18xx_plt.c arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o ini.o ini.c arm-linux-gnueabihf-gcc -L/tmp/lib/ nvs.o misc_cmds.o calibrator.o plt.o wl18xx_plt.o ini.o -lm -lnl-3 -lnl-genl-3 -o calibrator /opt/linaro-2014.04/bin/../lib/gcc/arm-linux-gnueabihf/4.8.3/../../../../arm-linux-gnueabihf/bin/ld: cannot find /lib/ld-linux-armhf.so.3 collect2: error: ld returned 1 exit status Makefile:26: recipe for target 'all' failed make: *** [all] Error 1 And when I pass my own sysroot, it works fine. Is it supposed to work as a standalone toolchain with its own bundled sysroot? Thanks. -- Denys

11 years

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x86_64 libsanitizer test case bug

by Rob Savoye

I've been digging through test logs, and for gcc 4.9.1 native x86_64 tests, all the libsanitizer test cases fail to link due to unresolved symbols from libpthread and libdl. Does anybody know more about this bug, or care to fix it ? :-) It still exists in gcc trunk. - rob -

11 years

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[Weekly] 19-23 May 2014

by Michael Collison

== This week == - Completed GCC Launchpad bug dispositions [CARD-300][2/10] - Backported PR61202 - gcc generated invalid sqdmulh instruction [TCWG-485](2/10) - Triaged and investigated Launchpad bug 1295738- Unable to find a register to spill in class 'LO_REGS' [Card 300](3/10) - Triaged and investigated Launchpad bug 1248752 - ARM assembly instruction compile error [Card-300](3/10) == Next week == - Resolve Launhpad bugs 1295738 and 1248752 - Triage and investigate other bugs as time warrants == Future == No Plans. == Planned holidays == No Plan

11 years

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[Activity] May 19-25

by Rob Savoye

== Progress == * Worked on building binary tarballs from Jenkins. (TCWG 383 - 4/10) * Continuing work on regression test analysis and reporting. (TCWG 448 - 3/10) - now copying the check.log from make check to toolchain so tcwgweb.sh can scan it for build errors in the test cases. - Got the delimiter for concurrent Jenkins builds changed, now glibc build problems are gone. - Track down and try to fix testsuite build issues. * Meetings and Misc. (3/10) - Worked on making remote testing go faster. Setting ControlPersist seems to help. - Much debugging of Jenkins related issues. == Plan == * Continuing work on validating test results and fixing testsuite build issues. (TCWG 448) * Probably more work on binary tarballs. (TCWG 383) * More tracking down and fixing Jenkins related issues. == Issues == * For some reason libgloss isn't getting built for *-elf via Jenkins/Cbuildv2.

11 years

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Parallel cross-testing of GCC

by Maxim Kuvyrkov

Hi, I have tried out a prototype of using binfmt_misc, and it does not appear to be a worthwhile solution at this point. Bottom line: with a nice fast multi-core x86 server and a pool of ARM boards we can test GCC in ~20min. Testing setup: - Core i3 2-core host - Chromebook 2-core target, SSD disk - WiFi network - GCC mainline built from sources with same flags both natively and cross: C, C++, Fortran. General observations about testing ARM toolchains: - When testing natively target is busy 100%: around 50% of time is spent compiling testcases, 40-45% in dejagnu/expect, 5-10% on actual test execution. Target is the bottleneck. -- 21633.22user 4400.13system 4:13:11elapsed - With testing cross using standard rsh_prog=ssh, rcp_prog=scp, target is busy 40% of the time: 30% on ssh, 10% on actual test execution. Host is the bottleneck. -- - When testing cross (using method below) target is busy only 15-20% of the time: 10% on ssh and 10% on actual test execution. Host is the bottleneck. -- 9490.16user 2882.54system 1:10:57elapsed I've got a prototype implementation of parallelized cross-testing of GCC that I'm happy with using rsh_prog and rcp_prog dejagnu wrappers: General observations on dejagnu cross-testing process: - All communication with the target is done by Dejagnu via rsh_prog and rcp_prog hooks. These are normally defined to ssh and scp respectively. - Dejagnu copies every testcase to /tmp/ on the target with scp. - Dejagnu executes every testcase via ssh off target's /tmp/. In total there is 1 scp and 3 ssh invocations per testcase. The idea of below scripts is to assume shared filesystem between host and a pool of target boards, and skip copying executables to target's local filesystem. Since there is no longer local state (local state == contents of /tmp) on the target boards, testcases can be executed on any of the boards in the pool. This happens transparently to dejagnu: dejagnu issues "rsh_prog chromebook-pool ./test" and then rsh_prog converts this to "ssh chromebook-XX ./test", where XX chosen at random. Script implementation notes: - For some unholy reason there is no way of correctly parse command line from dejagnu and give it to bash. The reason why myssh script ssh'es onto host itself is because that's the only way I've found to reliably execute the command. Hey! The command line was intended for ssh anyway! - Myssh script translates hostname of foobar-pool-01-03-08 into foobar01, foobar03 or foobar08 chosen at random. If there is no "-pool-" mentioned in hostname, then it is used verbatim. -- Maxim Kuvyrkov www.linaro.org

11 years

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[ACTIVITY] 19 - 23 May 2014

by Omair Javaid

== Progress == * GDB arm v8 record/replay -- Completed implementation of system call recording [TCWG-409] [4/10] -- Support for recording A64 Loads and stores [TCWG-409] [2/10] -- Bug Fixing to reduce failures in gdb.reverse testsuite [TCWG-484] [2/10] * Miscellaneous -- Day off on Friday [2/10] == Plan == * GDB arm v8 record/replay -- Submission of patches upstream. -- Bug fixing to reduce failures. -- Advance SIMD load/store instruction recording support.

11 years

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[ACTIVITY] Week 21

by Zhenqiang Chen

== Issue == * None. == Progress == * Investigate PR61220, 61225 and 61278, which are triggered by my previous commits. Patches are in review. (9/10) * Investigate codes generated by shrink-wrapping interrupt routes. It seams no dwarf info issue. * Misc update for Linaro crosstool-ng to make the build work in case someone wants to use it. - Down grade gdb to 7.6. - Disable multilib for 4.9. - Move local patches at binutils/linaro-2.24.0-2014.03 to binutils/linaro-2.24.0-2014.05. == Plans == * Push pending patches. == Planed leaves == * June. 2.

11 years

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ld can't deal with LTO bytecode in static libraries

by Bernhard Rosenkränzer

Hi, I've run into some compile errors after updating to 4.9 -- usually getting undefined references to symbols defined in helper static libraries. It turns out this is triggered by gcc -flto now creating slim object files by default (-ffat-lto-objects "fixes" it) - but I think it is actually an ld bug that should be fixed at some point. ld (regardless of whether I use -fuse-linker-plugin, -fuse-ld=gold or -fuse-ld=bfd) doesn't seem to see LTO bytecode in object files that are inside an ar wrapper. It deals with the library just fine if I use "ar x" to extract its object files and link to them individually as opposed to the .a file. I've attached a small test case to demonstrate ("make broken" shows the error, "make works" shows the workaround). Is there any reason why ld should behave the way it does, or is this a bug that needs fixing? ttyl bero

11 years

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[ACTIVITY] 19- 23 May 2014

by Venkataramanan Kumar

== Progress == * Reload - IRA bug fix (3/10) Not able to reproduce in trunk, r210538 masks the bug again :( Discussed with maxim on extending the macro ,Likely spilled class for thumb2. Decided that it will lead to performance regressions. Conservative fix is to allow the pattern for ARM target alone. Verfying the fix by on armhf schroot * Testing GCC Linaro compiler on Hardware (4/10) Completed GCC Linaro compiler 4.8 and 4.9 correctness tests on hardware. Completed running SPEC 2006 for -O3. Completed running SPEC2006 for -O3 -ftlo and -mcpu=cortex-a57. Triggered PGO runs on hardware. Looked at bootstrap failure with BOOT_CFLAGS="-mcpu=cortex-a57". Changed from system assembler to Linaro assembler solved it as system assembler is old. * Misc (3/10) - Completed installing ubuntu, set up chroot and migrate to toolchain 64 environment. (2/10) - 1-1 meetings (Ryan, Christophe and Maxim) (1/10) - AMD internal support work and meetings == Plan == * Continue bug fixing. * LTO bootstrap failure * Testing GCC Linaro compiler on hardware. * UK VISA processing.

11 years

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[ACTIVITY] 19 - 23 May 2014

by Kugan

== Progress == * Zero/sign extension elimination (TCWG-15) (9/10) - Initiated discussion and started working on alternate approach to handle this. - Gone through couple of prototype to understand approach. - Finshed first implrmentation; Needs cleanup and some failiures in regression needs fixing. * benchmarking (TCWG-468) (1/10) - Changes to Maxim's script is complete; Doing final testing before committing. * SAH1 performance (TCWG-413) - Committed a clean-up patch upstream. - Posted spill_class patch. * FENV for C11 TCWG-447 - Committed AArch64 part. == Plan == * Benchmarking. * Upstream zero/sign extension elimination activities. * sha1 performance.

11 years

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[ACTIVITY] Week 21

by Yvan Roux

== Issues == * None == Progress == * CARD-1162 : Linaro GCC 4.9 and CARD-1355 : stabilization and optimization effort for ARMv8-a (8/10) - Looked at Jenkins build/failures/reportin - Review the backporting process and scripted it - 40 backports are in review and need validation * LP #1169164 : including signal.h exposes various PSR_MODE #defines - Committed upstream. * Misc: o Various meetings (2/10) o LCU'14: Register and booked flights == Next == * Child care today * Improve the backport script and document it's usage * Continue backports * Continue feedback and help with the validation

11 years

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[ACTIVITY] 19-23 May 2014

by Christophe Lyon

== Progress == * GCC trunk cross-validation (4/10) - build broken last week-end, because of a new optimization that broke glibc build. - glibc fixed by Joseph mid-week, updated - to help diagnose build failures earlier, I have setup a reduced version of the validation framework, which only performs a build of binutils+glibc+gcc, at every commit on gcc trunk for 16 arm+aarch64 configurations. [ yes, another buildbot of sorts ] - restarted builds+validations to last known successful status (i.e. before last week-end) - builds are catching up * Neon intrinsics tests (3/10) - continuing conversion (about 40 files done, out of ~140) * Misc (meetings, conf-calls, ...) (3/10) * Backports for 4.9: - started reviewing candidate backports == Next == * GCC trunk cross-build/cross-validation: - monitor and report regressions * Neon intrinsics tests: - continue conversion - prepare a cleaner branch for upstream submission * Backports: - more reviews - process improvements

11 years

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[ACTIVITY] Week 21

by Renato Golin

== Progress == * Kernel (CARD-1246 4/10) - Named registers committed in Clang - GCC seems to break on local named regs, too. - Trying to change the kernel code to use only globals for non-GPRs - Adding support for pointer types, and structure fields in GNRVs * Benchmarks (CARD-716 0/10) - Re-enabling perf reports for LNT bot (ARM fixed reporting) * Background (6/10) - Code review, meetings, discussions, etc. - Removing *all* buildbots' batteries after failure - Testing D01 box, not stable yet for toolchain testing - Moving development to git.linaro.org (for backup) - Planning TCWG rack migration - Drafting an LLVM white paper == Plan == * Continue with named register extra work (http://llvm.org/PR19837) * Start TCWG rack migration * Discussions about LLVM white paper

11 years

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[ACTIVITY] 19 - 23 May 2014

by Will Newton

== Progress == * Investigate and fix building glibc for ARM with -mtls-dialect=gnu2 (3/10) * Investigate ld TLS behaviour for Huawei (1/10) * Refactor scripts to enable benchmarking postgresql malloc performance (2/10, TCWG-441) * Patch review and testing (1/10) * Diagnose and fix glibc testsuite failures on aarch64 (2/10) * Meetings, admin (1/10) == Issues == * None == Plan == * More malloc application benchmarking -- Will Newton Toolchain Working Group, Linaro

11 years

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[ACTIVITY] Week 21

by Bernie Ogden

== Progress== lowlevellock performance bugs - TCWG-435 [5/10] * Tried various methods to build/test glibc for aarch64 * Eventually succeeded (tests passed) cbuild benchmarking - TCWG-360 [3/10] * cbuildized spec2xxx scripts working as far as 'run' Meetings/mail/etc [2/10] == Plan == Holiday for one week After that: * Clean up cbuildized spec2xxx scripts, cbuildize them some more & discuss with Rob * Send lowlevellock patch upstream * If time, put together some more experimental memset implementations

11 years

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Using binfmt_misc for cross testing

by Maxim Kuvyrkov

I have been thinking how to simplify cross-testing our toolchain for both automated and development/debugging builds, and among various options the most universal I came up with is ARM hardware + ssh + binfmt_misc + sshfs. I wonder if anyone has already tried this or can suggest alternatives which are as universal. Given: - host x86_64 development machine - cross-compiler - target hardware with fast network to the host - host and target have ssh - testsuite (gcc/glibc/gdb/etc) Here is how it is going to work 1. On host we create a simple wrapper script that will pass through its arguments as command to execute on target via ssh: === #!/bin/sh ssh -p 22NN $TARGET_BOARD "$@" === 2. We register this script in binfmt_misc to be used as interpreter for target binaries. Value of $TARGET_BOARD will be picked up from the environment and can be set to different boards for different testsuite runs. 3. The target board needs to be prepared for a particular testsuite run: -- Runtime libraries need to be either copied or mounted via sshfs from the host. It is an open question how best to install several sets of libraries (for parallel runs) so that each set appears to be main system libraries. My current thinking is a separate ssh server inside chroot per each test run. -- Test directory needs to be sshfs mounted on target from host so that the target could see test executables. -- Preparation/finalization of the board can either be done explicitly before/after testing. Or it can be done on demand by the aforementioned script: the script checks whether a multiplexed ssh socket exists, and, if not, it prepares the board and starts a multiplexed ssh connection. 4. Testing is fired up as if it is normal "native" testing. Whenever kernel is given an ARM binary to execute -- it passes it off to wrapper, which passes it off to the target board via ssh. The board sees same filesystem as host and happily executes binaries against toolchain runtime libraries. Comments or rotten tomatoes? Thank you, -- Maxim Kuvyrkov www.linaro.org

11 years

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[Activity] May 12-18

by Rob Savoye

= Progress == * Worked on the LLVM branch of Cbuildv2 (TCWG - 1/10). * More work on regression test analysis and reporting. (TCWG 448 - 5/10) * Meetings and Misc (4/10) - Produced lots of test results via Jenkins, need to verify they're not having remote target problems. == Plan == * Verify test runs aren't having problems with remote targets. * Start training the Jenkins Failure Analysis plugin. * Install lava-tool and get it working on all the tcwgbuild* machines. * Continuing work on regression test analysis and reporting. (TCWG 448 - 5/10)

11 years

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[Weekly] 12-16 MAY 2014

by Michael Collison

== This week == - Investigated infinite loop bug [TCWG-290][3/10] - Worked on GCC Launchpad bug dispositions (75% complete) [CARD-300][7/10] == Next week == - Complete spreadsheet for GCC Launchpad bug dispositions - Work on unresolved bugs == Future == No Plans. == Planned holidays == No Plans

11 years

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[ACTIVITY] May 12-16

by Charles Baylis

== Progress: == Holiday [2/10] Rewrite of division optimisation changes following review - TCWG293 [8/10] == Plan == Mostly on holiday this week. I may be working sporadically

11 years

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[ACTIVITY] Week 20

by Yvan Roux

== Issues == * None == Progress == * CARD-1162 : Linaro GCC 4.9 (7/10) - Released GCC 4.9 2014.05 - Iterate with rob on jenkins issues, regression reporting, etc... * LP #1169164 : including signal.h exposes various PSR_MODE #defines - submitted patch upstream * Misc: o Cbuildv1 and tcwg-web baby-sitting (2/10) o Various meetings (1/10) == Next == * Continue on release/backport process * fix tcwg-web broken pages

11 years

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[ACTIVITY] 12-16 May 2014

by Christophe Lyon

Back full time == Progress == * resumed 1:1 calls with Zhenqiang, Venkat, Charles. * GCC trunk cross-validation (2/10): - monitored results - a few improvements/cleanups * Neon-intrinsics tests (5/10) - continuing conversion - needs to add support AArch64 Neon overflow flag * Misc (meetings, conf-call, ..) (3/10) * Successfully tried OpenNX setup put in place by Maxim (on office computer, despite firewall and no root access) == Next == * GCC trunk cross-validation: - monitor and report results - use this system to pre-validate a patch from Kugan - share scripts with Kugan * Neon intrinsics tests: - continue conversion - hopefully push a preliminary version upstream

11 years

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[ACTIVITY] Week 20

by Bernie Ogden

== Progress== lowlevellock performance bugs - TCWG-435 [3/10] * Trying to build/test aarch64 on a foundation model cbuild benchmarking - TCWG-360 [4/10] * Integrating Maxim's spec scripts into Kugan's benchmarking branch * Began modifying the branch to use existing cbuild functions where possible Meetings/mail/etc [3/10] == Plan == Holiday next week (w/c 26th May) This week: * Try testing glibc on system qemu rather than foundation model * Carry on with cbuild benchmarking * If time, put together some more experimental memset implementations

11 years

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[ACTIVITY] 12 - 16 May 2014

by Omair Javaid

== Progress == * GDB arm v8 record/replay -- Bug fixing: Improve gdb.reverse testsuite results on armv8 [TCWG-451] [2/10] -- core files issue submitted bfd patch upstream [TCWG-451] -- Support for recording Data processing - Advanced SIMD and Cryptographic [TCWG-405] [TCWG-407] [3/10] -- Support for recording A64 Data processing - Floating point instructions [TCWG-404] [TCWG-406] [2/10] * Miscellaneous -- UK visa application submission [3/10] == Plan == * Continue work on issues related to GDB arm v8 record/replay

11 years

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[ANNOUNCE] Linaro GCC 4.9 2014.05 released

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.05 stable release of the Linaro GCC 4.9 source package. Linaro GCC 4.9 2014.05 is the second Linaro GCC source package release in the 4.9 series. It is based on FSF GCC 4.9.1+svn210052 and includes performance improvements and bug fixes. With the imminent release of ARMv8 hardware and the recent release of the GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and performance of the compiler as the FSF GCC compiler approaches version 4.9.1. The Linaro TCWG will provide monthly stable[1] source package releases until FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of stable quarterly releases and monthly engineering[2] releases. Interesting changes in this GCC source package release include: * Updates to GCC 4.9.1+svn210052 * Backport of the Ada AArch64 support Feedback and Support Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in Launchpad against "Linaro GCC project": http://bugs.launchpad.net/gcc-linaro/+filebug. * Questions? "ask Linaro": http://ask.linaro.org/. * Interested in commercial support? inquire at "Linaro support":mailto: support(a)linaro.org [1] Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed. [2] Engineering source package releases are defined as releases where the compiler is only put through unit-testing and full validation is not performed.

11 years

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[ACTIVITY] 12 - 16 May 2014

by Venkataramanan Kumar

== Progress == * Reload - IRA bug fix (5/10) - In thumb2 mode, we get a pattern "*ior_scc_scc" for the third argument expression by the combiner pass. - Expression Class:foo(x,0,((y==x)||(z==x))) x gets register r1 and second r2 . - The class object this pointer is passed in r0. r7 is used for stack pointer. - The pattern "*ior_scc_scc" demands more LO_REGISTERS. It needs 5 LO_registers for destination and 4 source operands. But we are left with r3,r4,r5,r6 only. - Such situation is handled for Thumb1 only using TARGET_CLASS_LIKELY_SPILLED_P. Thumb2 should accept HI registers also. - Changing the pattern to accept general registers for destination operation is also not helping. - Need to explore secondary reload macros. * Misc - AMD meetings and internal tasks (2/10) - 1-1 meetings (Ryan, Christophe and Maxim) (1/10) * Testing: Installed packages and ran GCC Linaro compiler 4.8 correctness tests on hardware. Completed running SPEC 2006 for -O3 -mcpu=cortex-a57 flag (2/10). == Plan == * Continue bug fixing. * LTO bootstrap failure * Testing GCC Linaro compiler on hardware. * New laptop install ubuntu, set up chroot and migrate to toolchain 64 environment. * UK VISA processing.

11 years

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[ACTIVITY] 12 - 16 May 2014

by Kugan

== Progress == * TCWG-413 (8/10) sha1 performance - Looked at IRA dumps and aarch64 target hooks. - GCC now uses FP registers as register class and this results in lots of fmovs for the test-case. - Discussed in list and tried spill_class hook for aarch64. This helps sha1. - Regression tested the change. - Ran Spec2000 with the changes and 168.wupwise, 187.facerec are failing. - Investigation continues. * TCWG-468 (1/10) - Continuing with benchmarking. * Set-up NX and started using it (1/10) == Plan == * Benchmarking. * Upstream zero/sign extension elimination activities. * sha1 performance.

11 years

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[ACTIVITY] Week 20

by Zhenqiang Chen

== Issue == * None. == Progress == * Commit three patches to enhance shrink-wrap for loop. But community reports an ICE in dwarf info with the patches. (TCWG-133, 5/10) * Update/test shrink-wrap for apcs patch according to comments (TCWG-482, 2/10) * Loop-invariant heuristic tuning (TCWG-763, 2/10). * Investigate Linaro crosstool-ng gdb build fail for 2014.05 config. But have not find an easy way to fix lsbcc build fail. (1/10). == Plans == * Fix the ICE triggered by shrink-wrap changes. * gdb build fail issue if Linaro still use crosstool-ng for release * Continue loop-invariant heuristic tuning == Planned leaves == * June 2.

11 years

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[ACTIVITY] May 12-18

by Maxim Kuvyrkov

== Week of May 12th == - Rolled out TCWG development environment. (TCWG-483, 4/10) -- https://collaborate.linaro.org/display/TCWG/TCWG+Development+Environment -- Demo'ed it both inside and outside TCWG. -- Finished up configuration of environment and setup backups. - STREAM performance regression (TCWG-388, 2/10) -- Prepared first batch of patches for upstream submission - Various discussions, including ... (4/10) -- register allocation and reload with Venkat -- register allocation with Kugan -- benchmarking with Kugan -- Maxim Kuvyrkov www.linaro.org

11 years

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[ACTIVITY] May 5-11

by Maxim Kuvyrkov

== Week of May 5th == - Worked on standardized development environment (TCWG-483, 8/10) -- Deployed it on toolchain64.lava and maximk.linaro.org. -- Demoed and got early feedback from several people. - Various discussions, including ... (2/10) -- GCC debugging and var-tracking pass with Michael. -- Maxim Kuvyrkov www.linaro.org

11 years

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[ACTIVITY] Week 20

by Renato Golin

== Progress == * Kernel (CARD-1246 5/10) - Named register support in Clang * http://reviews.llvm.org/D3797 * Toolchain (CARD-862 3/10) - Testing libc++abi on ARM, now that it has EHABI - Setting up Chromebook library buildbot (FAILED) - One of the bots had a battery failure, needs to be replaced - Which means we won't have the lib bot soon :( * Background (2/10) - Code review, meetings, discussions, etc. == Plan == * Follow up named register patch upstream * Help LLVMLinux with moving current code to conform to global named regs * Help LLVMLinux with LAVA bots * Replace the failing buildbot * Set up a temporary (local) library buildbot on the spare Chromebook * Try other hardware to replace all Chromebooks

11 years

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[ACTIVITY] 12 - 16 May 2014

by Will Newton

== Progress == * Various patch review and followup (2/10) * Helping diagnose an aarch64 linker crash in buildroot (1/10) * Failed attempt to update kernel on Chromebook (1/10) * Analyze and benchmark cortex-strings to find the oustanding work (1/10) * Get docker setup with cgroups to measure memory usage (4/10, TCWG-441) * Trying to get NX working on Fedora 20 (1/10) == Issues == * None == Plan == * Get postgresql and hopefully others working with new benchmark setup * Figure out how to make NX work -- Will Newton Toolchain Working Group, Linaro

11 years

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[RFC][AArch64] Remove CORE_REGS form reg_class

by Kugan

Hi All, AAarch64 back-end defines GENERAL_REGS and CORE_REGS with the same set of register. Is there any reason why we need this? target hooks like aarch64_register_move_cost doesn’t handle CORE_REGS. In addition, IRA cost calculation also has logics like make common class biggest of best and alternate; this might get confused with this. Attached RFC patch removes it. regression tested for aarch64-none-linux-gnu on qemu-aarch64 with now new regression. Is this OK ? Thanks, Kugan gcc/ 2014-05-14 Kugan Vivekanandarajah <kuganv(a)linaro.org> * config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS to GENERAL_REGS. (aarch64_secondary_reload) : LikeWise. (aarch64_class_max_nregs) : Remove CORE_REGS. * config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS. (REG_CLASS_NAMES) : Likewise. (REG_CLASS_CONTENTS) : LikeWise. (INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS.

11 years

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[ACTIVITY] 5 - 9 May 2014

by Venkataramanan Kumar

== Progress == * Reload - IRA bug fix (5/10) - Expression foo(a,0,((b==a)||(c==a))) a gets register r1 and second a gets register r6, but third a not able to reuse r6 or r1 and spill failure. - Debugging the IRA dumps and reload dumps - Getting Maxim help * TCWG-180 (3/10) - GCC bootstrap fails with compare errors. - comparing the dis assembly. * Misc (2/10) - AMD meetings - 1-1 meetings - looked at 1 x86 related bug == Plan == * Continue bug fixing. * LTO bootstrap failure

11 years

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[ACTIVITY] Week 19

by Yvan Roux

Short week, 2 days off (4/10) == Issues == * None == Progress == * CARD-1162 : Linaro GCC 4.9 (6/10) - Prepared FSF 4.9 branch merge in Linaro one. - Backported Zhenqiang upstream patches. - Iterate with rob on various jenkins issues - Looked at gerrit for the backport reviews * Misc: o Cbuildv1 baby-sitting == Next == * Continue on Linaro GCC 4.9 release.

11 years

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[ACTIVITY] 5 - 9 May 2014

by Kugan

== Progress == * TCWG-413 (5/10) - Rebuild FSF 4.8, Linaro 4.8 and Linaro 4.9 releases for aarch64 with crosstool-ng (Kept all the dependencies same and used different gcc). - Lost all the config for running benchmark on the test-machine and set it up again. - Re-ran spec2k benchmarking and results. * TCWG-468 (5/10) - Looked in detail IRA dumps and cost models. - Also looked at IRA and LRA code to get better understanding of the algorithms. - Costs dumped seems odd and looking further. == Plan == * Benchmarking. * Upstream zero/sign extension elimination activities. * sha1 performance.

11 years

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[ACTIVITY] 5 - 9 May 2014

by Omair Javaid

== Progress == * GDB arm v8 record/replay: core files issue [TCWG-451] [6/10] -- Add bfd support for missing aarch64 core file handlers. -- Added regset caching functions for aarch64 linux gdb. * GDB arm v8 record/replay: Support for recording A64 Data processing - Floating point instructions [TCWG-404] [3/10] * Miscellaneous [1/10] -- Meetings -- Browse through Linaro training resources. -- UK visa documents preparation. == Plan == * Continue work to support GDB arm v8 record/replay -- Support for recording A64 Data processing - Floating point instructions [TCWG-404] -- Support for recording syscalls, signals etc [TCWG-409] * UK visa application submission.

11 years

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[Weekly] 05-09 MAY 2014

by Michael Collison

== This week == - Investigated infinite loop bug [TCWG-290][3/10] Misc (7/10) - Attended ARM Big Picture conference (May 5th - 7th) - Worked on GCC Launchpad bug dispositions as a prelude to bugzilla transition == Next week == - Resolve infinite loop bug - complete spreadsheet for GCC Launchpad bug dispositions == Future == No Plans. == Planned holidays == No Plans

11 years

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[Activity] May 5-11

by Rob Savoye

= Progress == * Continue improving LAVA support in DejaGnu. (TCWG 455 - 1/10) * More work on regression test analysis and reporting. (TCWG 448 - 4/10) - Did builds of 4.8, 4.9, and master to establish baseline test results. - Worked on test analysis script. - Jenkins matrix builds & test runs are working, and copying results to toolchain64. * Meetings and Misc (5/10) - Fixing various Cbuildv2 bugs found by yroux dealing with git. - Fixed bug where the GDB build was polluting the destdir with binutils. - Installed OpenNX chroot on toolchain64 with maxim. - Fixed disk on toolchain64 with maxim to access all 4TB. Use GPT... - Added more config triplets to Jenkins, so now it builds everything we support. == Plan == * Install lava-tool and get it working on all the tcwgbuild* machines. * Continue improving LAVA support in DejaGnu. (TCWG 455) * More work on regression test analysis and reporting. (TCWG 448) - Do diffs of new builds test runs from the baseline, not the previous build. * Try to look at the LLVM branch of Cbuildv2, do some testing of it. == Issues == * Jenkins needs to be able to see LAVA slaves as online, but not booted.. * The skiing is good, but the avalanche danger is high, so limits accessibility. * We need a backup plan for toolchain64. * Google groups have problems, so had to setup test results list on one of my servers instead. (ask me if you want to be on the list) The new beta release of GNU Mailman looks very nice. * The chromebooks in our build farm can't build GCC native. - rob -

11 years

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[ACTIVITY] Week 19

by Zhenqiang Chen

== Issue == * None. == Progress == * Identify a build environment issue for linux64 gdb binaries "Symbol format `elf32-littlearm' unknown". * Send out shrink-wrap related patches from community review (TCWG-133, 2/10) * Move-loop-invariant heuristic tuning (TCWG-469, 8/10). - Update heuristic according to benchmark testing. == Plan == * Update shrink-wrap patches according to comments. * Continue on move-loop-invariants heuristic tune. == Planned leaves == * June 2.

11 years

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[ACTIVITY] Week 19

by Bernie Ogden

== Progress== Holiday [2/10] Fixing performance bugs in lowlevellock - TCWG-435 [4/10] * Initial patch for lowlevellock.h largely done, awaiting an aarch64 test run * About 1/2 of the lowlevellock.h's remain post-patch, need to ask some questions about them cortex-strings memset - TCWG-156 [1/10] * Fixed an alternative implementation, a little more benchmarking investigation cbuild benchmarking branch [1/10] * Hunting for correct benchmark source, added a little more error checking Meetings/mail/etc [2/10] == Plan == More of the same - * Post lowlevellock.h patch and ask some questions * Finish exploring memset alternatives and work out how to benchmark them * Carry on with cbuild benchmarking branch Holiday 26th - 30th May

11 years

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[ACTIVITY] Week 19

by Renato Golin

== Progress == * Kernel (CARD-1246 3/10) - Committed Named Register LLVM change - Working on the Clang part - Helping LLVMLinux to set up bots/LAVA tests * Tests/CBuild2 (CARD-716 2/10) - Submitted CBuild2 LLVM patch, waiting for review - Implemented sqrt to pacify GCC on sphereflake * Background (3/10) - Code review, meetings, discussions, etc. * Bank Holiday Monday (2/10) == Plan == * Continue named registers on Clang * Continue LLVMLinux hardware test bot * Run some benchmarks on AArch64 * Check CBuild2 progress, try builds live

11 years

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[ACTIVITY] 5 - 9 May 2014

by Will Newton

== Progress == * Bank Holiday Monday (2/10) * glibc patch review and followup (1/10) * Started investigating malloc intensive applications (3/10, TCWG-440) * Investigate a couple of linker issues (1/10) * Figure out how to benchmark postgresql (3/10, TCWG-441) == Issues == * None == Plan == * Develop a good general way to measure memory usage of complex applications -- Will Newton Toolchain Working Group, Linaro

11 years

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[ACTIVITY] 21-25 April

by Charles Baylis

== Progress == Bank holiday [2/10] Investigated using D01 board [1/10] Retested and pinged division patch - TCWG-293 [2/10] Added post-index addressing to NEON memory access for ARM -TCWG-430 [5/10] * wrote patch * makes useful improvement to libvpx performance

11 years

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[ACTIVITY] 28 April - 2 May

by Charles Baylis

== Progress == Holiday [3/10] Post-indexed addressing for NEON on Aarch64 - TCWG-430 [3/10] * needs much more work than for ARM Revisited apparent NEON scheduling problem in libvpx - TCWG-429 [2/10] * it transpires that this was an incorrect analysis * the assembler code didn't conform to the ABI * upstream has now fixed this Received review for division patch - TCWG-293 [2/10] * needs a rewrite

11 years

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[ACTIVITY] Week 18

by Bernie Ogden

(Resending to correct address) == Progress== TCWG-435 needless busy-wait in lowlevellock.c (0/10) * Patches for lowlevellock.c sent to list * Patch for lowlevellock.h still to do TCWG-156 cortex-strings memset (5/10) * Dug through a bunch of docs and fiddled with the source Looking at the cbuild benchmarking branch (2/10) * Some back and forth around getting access to lava lab * Poked around the code, made some small improvements == Misc == Meetings/mail/etc 3/10 == Plan == (Public) holiday on Monday Put together lowlevellock.h patch Do something more substantial with cbuild Finish fiddling with the memset source

11 years

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[ACTIVITY] April 28-4

by Maxim Kuvyrkov

== Week of April 28th == - Made a prototype rootfs for benchmarking (CARD-1413, 2/10) -- Got a tutorial from Fathi on how to build openembedded rootfs. -- Wrote up notes at https://collaborate.linaro.org/display/TCWG/How+to+build+openembedded+rootf… - More benchmarking setup (TCWG-413, 2/10) - Various discussions (3/10) -- 1-on-1 with Venkat (NX setup and GCC reload problem) -- 1-on-1 with Kugan (benchmarking handover) -- 1-on-1 with Michael (var-tracking investigation) -- 1-on-1 with Rob (command-line access to LAVA and job submission) - Made NX/schroot rootfs (3/10) -- This can be deployed on Linaro [build] servers and provide standardized development environment for toolchain work. -- More details to follow. - Misc -- Reported a kernel oops related to networking on vexpress64. - Tyler Baker of the LAVA team deserve a special mention for answering all the questions about LAVA from the toolchain group! -- Maxim Kuvyrkov www.linaro.org

11 years

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[ACTIVITY] April 21-27

by Maxim Kuvyrkov

== Week of April 21st == - Setup SPEC benchmarking runs in LAVA environment (TCWG-413, 5/10). -- Built SPEC cpu2000/cpu2006 tools for armv7a/armv8 -- Added SPEC CPU2006 support to spec2xxx-utils. - Various discussions (1/10) - Short week due to public holidays (4/10) -- Maxim Kuvyrkov www.linaro.org

11 years

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