Folks,
This week I acquired an ODroid U2, which is an Exynos4 (quad-core A9 at
1.7GHz each), 2GB RAM, and a massive heat-sink (which even has power supply
for a fan).
I ran some ball-park compilation time benchmarks, comparing to the
Chromebook, and the results are interesting. The ODroid with an SDCard
(32GB Sandisk Ultra HC-1) is faster than the Chromebook with an external
USB 3.0 / SATA hard-drive.
LLVM Build Times (min)ChromebookODroidODroid-USBBuild1008180Check-all545
Test-suite424038
The test-suite and check-all results are statistically equivalent, but the
build time is better because of the number of CPUs, but not twice better.
Disk is more of an issue on the test-suite, which can be clearly seen above
(-j2 for Chromebook, -j4 for ODroid, but same time).
My USB stick is not the best, so that doesn't mean much. Also, I can't get
the ODroid to even recognize the SATA disk when I plug in because of the
power it needs. So, we'll have to do with those numbers. I'm using the
ODroid Ubuntu image (based on 13.04), which worked out of the box (except
the SATA disk and HDMI).
I'll let the board run for a week at home (room temperature ~ 25C) as a
buildbot, with the fan on all the time and see if it copes with constant
load for such a long time. Pandas couldn't do that, Chromebooks can.
Since the ODroid U2 is a dev board, which has a small form-factor, can be
turned on/off remotely and won't sleep when the lid is closed, has a decent
Ethernet port (Chromebook's wired adapters are *horrible*, and having
dozens of Wireless clients in the lab is just not possible), and don't have
the risk of being turned off by someone else, like the Calxedas, I'd say
that it might end up as the best buildbot yet. (The new XU is an Exynos5
octo-core monster, might be even better).
After the initial week load test, if all goes well, I want to bootstrap GCC
and run some tests on it, so I'll be calling for volunteers to help me.
cheers,
--renato
== Progress ==
* 2013.08 4.8 release:
-- merged many backports
- sorted a few dependencies problems between patches
- spawned all intermediate jobs (ie merge commits) to make sure
there was no regression
* 2013.08 4.7 release:
- made a trial branch merge to confirm that all builds succeed
(Matthias reported a build failure for aarch64)
* trunk validation:
- continued to work on internal validation of trunk using our
compute farm (build+cross validation) to help catch regressions early.
== Plan ==
* 2013.08 4.8 release:
- final backports
- actual release
* Resume work on aarch64 frame layout.
* Resume work on disabling peeling.
Last week
* tried cbuildv2 and sent Rob some bug fixes, bug reports, and feature requests
* ported previous testsuite fixes to trunk
This week
* send patch to gcc-patches
* find the next thing to fix
Issues
* need to take desktop PC back to supplier to fix CPU overheating
== Progress ==
* Finished gdb catch syscall support work and performed testing on ARM
and x86. Trying to eliminate a couple of testsuite failures on arm.
* Short week due to Eid Holidays.
== Plan ==
* Evaluate arm catch syscall support patch recently submitted by some
other developer.
* Work on reverse debug support on arm.
* Independence Day Public Holiday on 14th August.
* Getting documents ready and attend UK Visa appointment on 15th August.
== Progress ==
* Libssp support for AArch64 TCWG 23:
Patch was tested for aarch64-none-elf and passed. Sent for internal review.
Looking at supporting stack guard in glibc. Understanding TCB data structure
and looking at ports on how they initialize the stack guard in th TCB.
* TCWG-20 gprof support patches.
Reply to Marcus comments and rework and code mcount routine in assembly.
Ref: http://gcc.gnu.org/ml/gcc-patches/2013-08/msg00148.html
== Plan ==
* Continue Libssp support for AArch64 in GCC and glibc TCWG-23
* Update review comments and upstream gprof patches
== Issues ==
* LTO/PGO work stopped now since libssp support priority is more
Misc
------
15-August Public holiday in India.
== Issues ==
* No idea to fix eglibc backtrace issue.
== Progress ==
* Commit (FSF 4.8 and trunk) the fix for lp: 1189445/1208676.
* Enhance Linaro crosstool-ng:
- Fix gcc respin version issue in README.
- Update big-endian multiarch triplet name.
* Investigate eglibc backtrace issue:
- Test case: linaro-crosstool-ng/contrib/linaro/tests/misc/sort.c.
- gdb report: Backtrace stopped: previous frame identical to this
frame (corrupt stack?)
- Try to rebuild eglibc with gcc 4.7 and -gdwarf-2. But still not work.
* Conditional compare
- Send for Linaro internal review.
- Workaround a new fail case.
- Test the prototype on x86-64 port.
== Plan ==
* Conditional compare RFC review.
== Panned leaves ==
* Aug. 19-20: annual leaves
* Sept. 3-5: ARM internal meeting.
== Progress ==
* spec2k comparison between ARM and x86
- Read papers/documents that list gcc optimization/problem for arm
- Acovea runs fails in Chromebook; Looking into it
- continuing with analysing individual results
* VRP based zero/sign extension elimination
- Final checks ongoing before posting the patch
== Plan ==
* Continue with spec2k comparison between ARM and x86
* post VRP based zero/sign extension elimination patch
== Misc ==
* Was on Leave Thursday/Friday (3 Day week)
* Watched Cauldron 2013 archives
== Progress ==
* Lots more malloc work, slowly progressing
* Created a patch queue in preparation for glibc coming out of freeze
* New strlen code
* Other bugfixes and minor improvements
== Issues ==
* None
== Plan ==
* Move house (Wednesday and Thursday off)
* Submit glibc patches
* Get malloc implementation functionally complete
--
Will Newton
Toolchain Working Group, Linaro
Progress:
* v7 mach-virt upstreaming:
** sent out mach-virt patchset for v7
** thinking/discussions about how to handle the host maybe not being
able to provide a guest CPU; this has converged on a sensible design
based around using "-cpu host" to mean "please give me a VCPU that's
the same as the host's CPU"
** review of the OVS v2 aarch64-kvm-support patchset
* QEMU maintenance:
** rebased qemu-linaro on upstream master
** fixed some minor bugs revealed by clang warnings
** wrote and sent out a cleanup patchset which removes the now
unnecessary 'arm_pic' shim around the CPU
** implemented debug logging of exceptions/interrupts for ARM TCG
(helpful for identifying when a guest has gone into an infinite
loop of taking exceptions)
-- PMM
== Progress ==
* Cbuildv2 can now do a full cross toolchain build ala crosstool-ng.
* Cbuildv2 integrated to work under LAVA team's Jenkins for
automated cross builds.
* Cbuildv2 now allows one to select the version of each toolchain
component.
== Plans ==
* Add support to Cbuildv2 to run 'make check' and create XML files
for MySQL and Junit (which Jenkins uses).
* Add newlib building support to Cbuildv2 as part of "--build all".
== Leave ==
* Off to climb Grand Teton in Wyoming, taking long weekend.
- rob -
When the OMAP I2C controller is operated in master mode, setting the
STP bit in the CON register instructs the controller to generate an I2C
stop condition only after the programmed number of bytes has been sent
on the I2C bus. The current code in QEMU ends the I2C transfer without
first sending the pending data instead.
Fix the above issue, and let the I2C transfer be ended in
omap_i2c_fifo_run(), after the count of bytes to send has reached zero.
Signed-off-by: Francesco Lavra <francescolavra.fl(a)gmail.com>
---
Without this patch, the controller driver in Linux is unable to send
data on the I2C bus, and when the controller triggers an IRQ after
having started an I2C transfer, the XRDY flag in the STAT register
remains always asserted, leading to an endless loop which eventually
results in a kernel oops.
hw/i2c/omap_i2c.c | 4 ----
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/hw/i2c/omap_i2c.c b/hw/i2c/omap_i2c.c
index cfaac07..17d4037 100644
--- a/hw/i2c/omap_i2c.c
+++ b/hw/i2c/omap_i2c.c
@@ -521,10 +521,6 @@ static void omap_i2c_write(void *opaque, hwaddr addr,
omap_i2c_fifo_run(s);
}
omap_i2c_interrupts_update(s);
- } else if (value & 2) { /* STP, but not STT */
- i2c_end_transfer(s->bus);
- s->control &= ~0x0602; /* MST | TRX | STP */
- s->count_cur = s->count;
}
}
break;
--
1.7.5.4
Last week
* Wrote up notes on gcc cross-compiler building (WIP:
https://wiki.linaro.org/WorkingGroups/ToolChain/BuildingGNUToolchains)
* started looking at gcc test suite
This week
* produce at least one fix for a gcc testsuite test problem
* book LCU13
* with luck, receive new laptop
== Progress ==
* 2013-08 4.8 release:
- Reviewed merge requests sent by Yvan.
A few instabilities in x86/x86_64: re-spawned jobs came back clean.
Unexpected improvements in a9: actually the reference had
unexpected regression; re-spawned reference job came back clean.
- prepared another series of backports; had to dig history to find
missing dependencies.
== Plan ==
* 2013.08 4.8 release:
- merge approved backports
- merge fsf-4.8 branch
* 2013.08 4.7 release:
- merge fsf-4.7 branch
* Resume work on aarch64 frame layout.
* Resume work on disabling peeling.
== Progress ==
* Generated arm syscall xml file for gdb and made few code changes in
arm-linux-tdep for catch syscall support on arm TCWG-182.
* Ran reverse debugging test suites on arm with arm/thumb and mix mode.
== Plan ==
* Short week due to EID holidays
* Try to Complete code changes and perform testing on arm/x86 for gdb
catch syscall support for arm TCWG-182.
== Progress ==
* Libssp support for AArch64 TCWG 23:
Basic support is enabled by default when frame is made to grow downwards.
Wrote machine descriptions for stack_protect_set and
stack_protect_test to override this default behavior.
Testing the patch internally.
Plan is to emit instructions as RTL instead of template and see
which approach is better.
* Look at builtin return address behavior in the absence of frame pointer:
For X86_64 usage if __builtin_return_address(n) n>0 and
-fomit-frame-pointer results in undefined behavior.
Discussed with Marcus and Andrew (mail chain) and decided not to
touch __builtin_return_address(n) where n>0.
Decided to leave it as return 0 for frame number other than current frame.
* TCWG-20 gprof support patches.
Re-implemented gprof patches without builtin_return_address usage
for frame number n >0.
The "mcount" in glibc needs two arguments. The "mcount" routine
will be emitted by GCC with an argument to previous frame return
address.
And in the glibc "mcount" routine will be modified to use
builtin_return_address(0) for the second argument.
http://gcc.gnu.org/ml/gcc-patches/2013-08/msg00148.html
Waiting for comments.
Matt suggested to try and return a label address inside the function
while generating mcount. But profiling code is expanded before any
local labels are generated.
Also need to research more on this approach. So stopped and decided
to use simpler approach.
== Plan ==
* Continue Libssp support for AArch64 TCWG-23
* Update review comments and upstream gprof patches
==issues==
* LTO/PGO work stopped now since libssp support priority is more
Misc
------
09-August Public holiday in India.
== Progress ==
* Worked on integrating Cbuildv2 with Jenkins, an automated build
system used by the LAVA team.
- Uses cbuildv2 to fetch, configure, build, and install a C
toolchain
cross or native build.
* Wrote a script to convert DejaGnu sum files into Junit format, which
can be imported into Jenkins for viewing. Initial test is online at:
https://ci.linaro.org/jenkins/view/toolchain/job/junit-parsing/.
A work
in progress, and Jenkins is a bit limited in the allowed test
results.
* Did expense reports for Connect - Cauldron trip.
== Plans ==
* Refactor how cbuildv2 dependencies for packages are handled so
they work more than one level deep.
* Have cbuildv2 build C++ after eglibc.
* More Jenkins integration.
* Work on wiki pages.
- rob -
== Progress ==
- Addressed VRP based zero/sign extension elimination review comments
- Make check passes but spec2k gcc fails in results comparison;
investigating it
- Started again with spec2k comparison for ARM to see potential
optimization opportunities
- Installed libacovea in Chromebook with some tweaks to study affects
of optimization options
== Plan ==
- post the VRP based zero/sign extension elimination patch
- continue with pec2k comparison for ARM
== Misc ==
- Was on holiday until 29th (4 day week)
== Issues ==
* None
== Progress ==
* Validate and release Linaro toolchain binaries 2013.07.
* Commit the fix for pr57637.
* Revise patch and test case for lp1189445.
* Separate conditional compare changes to small patches and test.
* Send out the patch of "Reassociate X == CST1 || X == CST2 if
popcount (CST2 - CST1) == 1 into ((X - CST1) & ~(CST2 - CST1)) == 0"
for internal review.
* R/M toolchain internal release work.
== Plan ==
* Send out the conditional compare patches for review.
== Planned leaves ==
* Aug 19-20.
== Progress ==
* Divmod 64
- Got generic lowering working, with an ugly hack
- Working on custom lowering with new node types
* Testing the SLP vectorizer on O3 and O2
- Found some regressions, need to investigate
- It's going to be on by default on O3 from now on
* SLP vectorizer introduced by default on O3
- Lots of failures in ARM test-suite due to illegal vector types
- Fixed on patch r187658
== Issues ==
Had a bit of a problem with my tooth, had to stay away for a while... put
me away from working on divmod properly... :(
== Plan ==
HOLIDAYS!!!
Progress:
* v7 mach-virt upstreaming:
** implemented architected timer support for TCG, sent patches
** nearly finished cleanup of mach-virt including adding virtio support
** ran into an odd bug where putting RAM not at address zero results in
the kernel not booting -- need to debug
** once that is fixed should just need to do final testing and send patches
Plans:
* look at OVS' v2 a8-kvm-support patches
-- PMM
== Progress ==
* Libssp support for AArch64 TCWG 23
Discussed with Matt and decided to assume "glibc" will export canary
guard variable in TCB, for aarch64.
It will export it as global variable for 32 bit. Working on top of
Christophe patch that make frame grows downward.
* Look at builtin return address behavior in the absence of frame pointer.
For X86_64 usage if __builtin_return_address(n) n>0 and
-fomit-frame-pointer results in undefined behavior.
In Ubuntu 12.04 the native GCC 4.7.1 resulted in segmentation fault
on x86_64 machine for such a test.
Currently planning to close this as undefined behavior in aarch64 as well.
Discussing with Marcus on this.
* TCWG-20 gprof support patches.
Re based with latest trunk and regression tested.
http://gcc.gnu.org/ml/gcc-patches/2013-07/msg01352.htmlhttp://gcc.gnu.org/ml/gcc-patches/2013-07/msg01333.html
Misc
* Tuesday spent on Internal (AMD) work.
== Plan ==
* Continue Libssp support for AArch64 TCWG-23
* Update review comments and upstream gprof patches
==issues==
* LTO/PGO work stopped now since libssp support priority is more.
== Progress ==
* Completed initial investigation on catch syscall support on arm TCWG-182.
* Looked into dwarf assembler to generated architecture independent
debug information for dwarf2 test cases.
* Resolved some gdb.mi configuration issues due to which some test
cases were failing.
* Review status of GDB testing on arm and filled up JIRA with proposed
future work.
== Plan ==
* Continue work on gdb catch syscall support for arm TCWG-182.
* Background task: Understanding dwarf assembler to generate dwarf2
debug information for architecture test cases.
* File UK visa for meetings in September after receiving invitations.
== Progress ==
* Produced spec2000 benchmark data on panda for fsf-4.7, fsf-4.8,
gcc-linaro-4.7, and gcc-linaro-4.8.
* Helped Charlie get stared with building the toolchain.
* Found "experimental" option that got crosstool-ng actually working.
* Got cbuildv2 now doing much of the process crosstool-ng does for
a complete stage1 build.
* Improved native and cross toolchain builds via cbuildv2.
== Plans ==
* Continue working on cbuildv2 till it's usable by others.
* Looks like I have a pile of new wiki pages to write.
== Progress ==
* Induction and set up work environment
* Started investigating how to build gcc cross compilers, so that it can be
documented clearly [TCWG-190 <http://cards.linaro.org/browse/TCWG-190>]
* I can build a working arm-none-linux-gnueabi crosscompiler, and
understand each of the steps involved
* Using the same method, aarch64-none-linux-gnu does not build
== Issues ==
* None
== Plan ==
* Write up knowledge gained so far
* Find out why aarch64 doesn't work
* Find out more about other build variations (multilib/multiarch etc) and
how that affects what I've done so far
== Progress ==
* Backported aarch64 string functions and ARM gcc 4.8 fix in eglibc.
* Released eglibc 2.17 2013.07-2.
* Forward ported binutils AArch64 IFUNC patches to HEAD so Marcus can test them.
* Closed stack guard JIRA card and made a new one for pointer guard.
* More malloc benchmarking, reading etc.
* Started work on malloc code.
* Booked flights for LCU13!
== Issues ==
* None.
== Plan ==
* Deal with any test feedback on IFUNC patches.
* malloc
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Looking at 64-bit divmod on two fronts:
- Clean, but intrusive on target-independent code
- Dirty and duplicated, but restricted to target-specific code
* Long discussion about the purpose of the IR on the LLVMLinux list
* Watching some GNU Caldron videos
== Plan ==
* Continue looking at divmod for 64-bit values
* Start investigating cross-compilation issues
* When Rob is ready, have a look at CBuild2 for LLVM+Benchmarks
Progress:
* started on getting v7 mach-virt into shape for upstreaming:
doesn't currently work on TCG due to missing architected timers emulation
* sent fixes for some minor bugs in virtio-mmio noticed by reviewers
* support for various people for "I tried to boot linux in QEMU/KVM
and nothing happens" issues. This is usually because of a misconfigured
kernel which is either not sending serial output to the right place
or stopped with an error before the point where serial is set up.
However it's pretty awkward for users to debug especially compared
with x86 which doesn't generally have these issues because all x86
hardware is sufficiently the same that console and/or earlyprintk
just about always works.
* started the conversation on kvmarm about what the CPU in a KVM VM
ought to look like (always same as host? always an A57? always some
"generic VM CPU"? do we care (does the OS care?) that it has a GICv2
when the same CPU in h/w has a v3)
* came up with a clever hack for making QEMU QOM object struct fields
be only accessible to the object's implementation and not its users,
using gcc's "deprecated" attribute and some CPP macros.
-- PMM
### About Linaro eglibc
Linaro eglibc is a release of the eglibc C library with bug fixes and
enhancements for ARM platforms. eglibc is a variant of the GNU libc
designed to work well on embedded systems.
### Linaro eglibc 2.17 2013.07-2
The Linaro Toolchain Working Group is pleased to announce the 2013.07-2
release of Linaro eglibc 2.17, the second release in the 2.17 series.
This release is based on the latest upstream eglibc 2.17 stable branch,
but with additional features and bug fixes.
#### Additional Features
* Faster ARM memcpy implementation for hardware with NEON or VFP support.
* Optimized string functions for AArch64: memcmp, memset, memcpy, memmove,
bzero, strcmp, strlen, strnlen, strncmp.
#### Bug Fixes
* None
### Source
#### Release Tarball
* https://releases.linaro.org/13.07/components/toolchain/eglibc-linaro
#### Development Tree
* git://git.linaro.org/toolchain/eglibc.git
This release was built from the `linaro_eglibc-2_17-2013_07-2_release` tag.
### Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
* Linaro Toolchain Development [mailing
list](http://lists.linaro.org/mailman/listinfo/linaro-toolchain)
* Linaro Toolchain IRC channel on irc.freenode.net at `#linaro-tcwg`
* Questions? [ask Linaro](http://ask.linaro.org/).
* Interested in commercial support? inquire at [Linaro
support](mailto:support@linaro.org)
--
Will Newton
Toolchain Working Group, Linaro
Hi,
I am new to the linaro toolchain and have two questions don't find an
explicit answer. Help you experts can help.
1. Can I use linaro arm toolchain to build application for armv5t core?
My box is a arm926ejs.
2. Does anyone has experience in making linaro current version work with
buildroot? I tried, but got a lot of strange error. (maybe it is the
same problem as question 1, since I set my cpu as arm925t in buildroot).
Thanks in advance.
--
I can't go back to yesterday - because I was a different person then
The Linaro Toolchain Working Group announce the 2013.07-1 Linaro GCC
4.8 release. This is a respin of the 2013.07 release because of an
issue with internal memcpy and -mno-unaligned-access.
The source tarball is available from:
https://launchpad.net/gcc-linaro/+milestone/4.8-2013.07-1
Please find the original 2013.07 announcement below.
The Linaro Toolchain Working Group is pleased to announce the release
of both Linaro GCC 4.8 and Linaro GCC 4.7.
Linaro GCC 4.8 2013.07 is the fourth release in the 4.8 series. Based
off the latest GCC 4.8.0+svn200355 release, it includes performance
improvements and bug fixes.
Interesting changes include:
* Updates to GCC 4.8.1+svn200355
* Address Sanitizer support for ARM.
* New -mrestrict-it option support.
* Backport of support for further AArch64 instructions.
* Backport of support for further ARMv8 AArch32 instructions.
* Reverted recent changes to shrink-wrapping and tail-calls.
Linaro GCC 4.7-2013.07 is the sixteenth release in the 4.7
series. Based off the latest GCC 4.7.3+svn200408 release, this is the
third release after entering maintenance.
Interesting changes include:
* Updates to GCC 4.7.3+svn200408
The source tarballs are available from:
https://launchpad.net/gcc-linaro/+milestone/4.7-2013.07https://launchpad.net/gcc-linaro/+milestone/4.8-2013.07
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? http://ask.linaro.org/
Interested in commercial support? inquire at support(a)linaro.org
== Progress ==
Was on vacation most of the week Mon - Wed leave (Thursday half day).
* Libssp support for AArch64 TCWG 23
Restarted the work. Looked at how X86 GCC generated code. Looking at
per thread support for libssp and compiler support.
== Plan ==
* Continue Libssp support for AArch64 TCWG-23
* Look at builtin return address behaviour in the absence of frame pointer.
==issues==
* LTO/PGO work stopped now since libssp support priority is more.
== Issues ==
* None.
== Progress ==
* Attended linaro Connect (Wk 28)
* OE Launchpad bug #1200620 :
[ICE while building Exynos5 kernel with current 4.8 branch]
- Issue due to a bad usage of unaligned load/store in HI mode
- Fix approved and committed upstream
- Release respin ongoing.
* Launchpad bug #1186218 :
[kernel doesn't boot on Arndale/Nexus with Linaro GCC 4.8]
- Discussed the issue at Connect
- Waiting for a reduce testcase from the kernel team.
* LRA on AArch64:
- Some regressions in the testsuite
- Debugging ongoing.
* LRA on AArch32:
- Still some issues with libgcc build in Thumb
- Back on this issue.
* 2013-08 4.8 release:
- Backports from trunk ongoing.
== Plan ==
* 4.8 Backports
* Summer break
== Progress ==
* Debugged gdb.mi and linux-nat code to investigate issues on arm.
* Cleared pending gdb patches.
* Listened to Connect sessions and key notes on youtube
* Follow up on travel hick ups and UK/US visa application
== Plan ==
* Review GDB current status and fill up JIRA with proposed future work
* Windup work on gdb test suite updates and submit remaining patches.
* Follow up on gdb patches
* Clear/Update JIRA cards
* File UK visa for meetings in September.
== Progress ==
* Attended Connect, did presentation and other stuff.
* Left Connect early to attend the Gnu Tool Cauldron. Ran BOF on
testing the toolchain, attended many talks including the one on
Graphite.
* Worked on modularizing cbuildv2 package parsing into functions so
bzr,svn,git URLs and tarball snapshots from toolchain64 work the
same.
* Added LLVM support to cbuildv2, Clang and the testsuites only work
if built separately for now.
* Reproduced build problem Viswanath was having with crosstool,
Zhenqiang knew the missing package(s) that kept C++ builds from
working.
* Built fsf 4.7 and 4.8 as well as Linaro GCC releases for July on Panda
board.
* Got spec200 benchmarks working on panda, ran them for the above
branches and releases.
== Plans ==
* Help Charlie come up to speed on building GCC.
* Run more benchmarks on the above branches and do graphs on
performance.
* See why for me on a panda, all the tests fail with make check.
* Find time to work on cbuild2 so Charlie can beta test it sometime
soon.
- rob -
== Issues ==
* None
== Progress ==
* Enable multi-arch for Linaro aarch64-linux-gnu build.
- Configure gcc with --enable-multiarch.
- Backport eglibc patches for rtlddir.
- Configure eglibc to set libdir, slibdir and rtlddir.
* Follow up the patch for pr57637.
* Reassociate X == CST1 || X == CST2 if popcount (CST2 - CST1) == 1
into ((X - CST1) & ~(CST2 - CST1)) == 0.
- Test is ongoing.
* Rebase conditional compare changes to trunk.
== Leave ==
* July 17.
== Plan ==
* Send out the conditional compare changes for Linaro internal review.
== Progress ==
Short week (3 days)
* Divmod
- Finished most of the work, patch upstream (r186390)
- Trying to lower remainder as divmod without sacrificing the div+mod
merge during legalization
* Buildbots
- One panda fails even at 920MHz, replaced with a new one
- Using decent power supplies now, should work a whole week
- Lab config is messed up, need to start from scratch
- Failed at 920MHz with decent power supply
- Giving up on Pandas as buildbots...
* Background
- Not many code reviews last two weeks, as Connect and the Pandas took
most of my spare time
- Test-suite's Lencod bug fixed upstream, no more need of dirty hacks on
stack offset calculation
== Plan ==
* Continue on divmod lowering, finding a way to merge Custom with Expand
lowering, so not to break the div+rem merge during legalization, but still
lower divmod as Custom. 64-bit types still use them.
* Study cross-compilation issues in Clang and LLVM, prepare a document on
how it works (or not), and what paths we can take to make it better in the
short/medium term.
* Follow up on Phoronix results and CBuild2 benchmarks, time allowing
== Progress ==
* Investigating glibc stack guard support
* Developed initial patches
* Raised ABI issue
* More malloc work
* Integrated tcmalloc into benchmark framework
* Improved benchmark repeatability
* Added Python benchmark script and graphing script
* Respin and commit gdb TLS testsuite patch (my gdb patch queue now empty)
* Committed two of Omair's gdb patches
== Issues ==
* None.
== Plan ==
* Produce some malloc benchmark graphs
* Progress the stack guard work
* Start writing some malloc code
--
Will Newton
Toolchain Working Group, Linaro
Progress:
* attended Linaro Connect (wk 28)
* sent pull requests for target-arm/arm-devs queues
* resent virtio-mmio patchset; this is now ready for commit
and I will send a pullreq with it in next week
* finished off a cleanup of linux-user to remove the support
for configuring targets without threading support
* resorted todo list against cards
* started on getting v7 mach-virt into shape for upstreaming
-- PMM
Hi All,
I am new to linaro. so would like to know more about linaro.
Is linero alternative to yocto project.
does the tool chain support armv5te based SOC.
Ratheendran
Hi Folks,
I'm running two buildbots here at home and am getting consistent failures
from the Pandas because of overheating. I've set up a monitor that will
tell me the current CPU temperature and the allowed maximum, and when the
bot passes 90%, it shuts itself off.
The problem is that I'm running with heat-sinks and the boards are on top
of three fans, so there really isn't much more I can do to solve this
problem.
I personally think this is a hardware problem, since everything is in the
same die, CPU, GPU and RAM, and the physical dimensions of the chip are
quite small. I remember when Intel started overheating (around 486DX66) and
the die was huge (more head dissipation), plus RAM and GPU were separate,
and it still needed a hefty heat-sink.
It's true that gates are far smaller today, but it's not true that a dual
core 1.3GHz + GPU + RAM will produce less heat on a small die than a 66KHz
CPU on a huge die, so why anyone think it's a good idea to release a 1+GHz
chip without *any* form of heat dissipation is beyond my comprehension.
Manufacturers only got away with it, so far, because people rarely use 100%
of the CPU power for extended periods of time, because ARM devices end up
as set-top boxes, mobile phones and tablets. However, even those devices
will heat up when playing 2 h films or games, and they do have some form of
heat sink.
We, at the toolchain group, make things worse by using 100% CPU, 24 / 7,
something that Panda boards, or Arndales were not designed to do. However,
with ARM moving into the server space, their designs will have to be
re-thought, and what a better place than Linaro for making sure we get it
right?
For the time being, I believe we *must* have air conditioning in the Lab
all the time, and we *must* have heat-sinks on every board, and we *must*
monitor the CPU temperature of the boards, at least until we're comfortable
that they're not failing all the time.
Can we make a temperature monitor (like the one attached) a default feature
on Linaro Ubuntu distributions? We could dump that info to the syslog/dmesg
whenever it crosses the (say) 75% threshold, and report more often when it
crosses the 95%, possibly dumping the processe(s) that are consuming more
CPU at the time, to enable post-mortem debugging.
cheers,
--renato
As a side note, the quad-A9 ODroid does ship with a massive heat-sink,
which also serves as a fancy case. Quite clever, really.
Hello,
I use gcc-linaro-aarch64-linux-gnu-4.8 to compile my C code with
thread-local variables.
Here is an example of my C code:
__thread u32 threadedVar;
void test(void)
{
threadedVar = 0xDEAD;
}
gcc produces the following assembly to access my threaded variable:
threadedVar = 0xDEAD;
72b0: d00000c0 adrp x0, 21000
72b4: f945ac00 ldr x0, [x0,#2904]
72b8: d503201f nop
72bc: d503201f nop
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,x0]
This assembly fits dynamically linked code, but in my case I have
statically linked application that does not load any additional modules.
Since I have exactly one TLS block containing all thread-local variable gcc
should be able to calculate the offset at link time.
Can I make gcc to produce the following assembly ?
threadedVar = 0xDEAD;
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,#offset_to_threadedVar]
Thank you,
Vitali
Hello,
I use gcc-linaro-aarch64-linux-gnu-4.8 to compile my C code with
thread-local variables.
Here is an example of my C code:
__thread u32 threadedVar;
void test(void)
{
threadedVar = 0xDEAD;
}
gcc produces the following assembly to access my threaded variable:
threadedVar = 0xDEAD;
72b0: d00000c0 adrp x0, 21000
72b4: f945ac00 ldr x0, [x0,#2904]
72b8: d503201f nop
72bc: d503201f nop
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,x0]
This assembly fits dynamically linked code, but in my case I have
statically linked application that does not load any additional modules.
Since I have exactly one TLS block containing all thread-local variable gcc
should be able to calculate the offset at link time.
Can I make gcc to produce the following assembly ?
threadedVar = 0xDEAD;
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,#offset_to_threadedVar]
Thank you,
Vitali
The Linaro Toolchain Working Group is pleased to announce the release
of both Linaro GCC 4.8 and Linaro GCC 4.7.
Linaro GCC 4.8 2013.07 is the fourth release in the 4.8 series. Based
off the latest GCC 4.8.0+svn200355 release, it includes performance
improvements and bug fixes.
Interesting changes include:
* Updates to GCC 4.8.0+svn200355
* Address Sanitizer support for ARM.
* New -mrestrict-it option support.
* Backport of support for further AArch64 instructions.
* Backport of support for further ARMv8 AArch32 instructions.
* Reverted recent changes to shrink-wrapping and tail-calls.
Linaro GCC 4.7-2013.07 is the sixteenth release in the 4.7
series. Based off the latest GCC 4.7.3+svn200408 release, this is the
third release after entering maintenance.
Interesting changes include:
* Updates to GCC 4.7.3+svn200408
The source tarballs are available from:
https://launchpad.net/gcc-linaro/+milestone/4.7-2013.07https://launchpad.net/gcc-linaro/+milestone/4.8-2013.07
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? http://ask.linaro.org/
Interested in commercial support? inquire at support(a)linaro.org
Hi Linaro toolchain team,
I compiled linaro-toolchain 2013.06 by myself on fedora 18 x86_64,
everything works fine except GDB.
The error message is "Im sorry, Dave, I can't do that. Symbol format
`elf32-littlearm' unknown'."
I searched on google, and leads me to the page
https://bugs.launchpad.net/linaro-toolchain-binaries/+bug/918937
I configured linaro-toolchain to build a native gdb for arm platform, both
native gdb and cross-gdb can't work, they report the same error message.
Is there any way I can get the patch?
Please help me on this!
Thank you very much!
Yupeng Chang
July 05, 2013
Hi Michael,
I have fixed this issue.
I think there is a bug in crosstool-ng-1.13.1-2013.06.
In
crosstool-ng-1.13.1-2013.06/contrib/linaro/patches/gdb/linaro-7.6-2013.05,
there is a patch libintl-as-lib.patch, which adds -lintl to LDFLAGS of gdb,
however, in the 300-gdb.sh,
--without-included-gettext is used, this option makes libintl inside gdb
quit building, in this case, when checking ELF support in BFD, -lintl
cannot be found, this leads to fail.
In eglibc-2.17, intl lib is included in libc, --without-included-gettext is
reasonable to apply to gdb, which means libintl-as-lib.patch is no longer
needed, because this patch adds an option which will be no longer needed
for building gdb with eglibc-2.17
After I removed the patch, every thing works fine now, in gdb/config.log,
checking ELF support in BFD reports OK now.
Yupeng Chang
July 06 2013
On 6 July 2013 03:21, Michael Hope <michaelh(a)juju.net.nz> wrote:
> Hi there. I'm afraid I'm not working on gdb these days but it sounds like
> a configuration error. I suggest asking on
> linaro-toolchain(a)lists.linaro.org as they should be able to help.
>
> -- Michael
> On Jul 5, 2013 8:03 PM, "常桓" <changyp6(a)gmail.com> wrote:
>
>> Hi Michael,
>> Sorry for bothering you about a GDB issue.
>> I compiled linaro-toolchain 2013.06 by myself on fedora 18 x86_64,
>> everything works fine except GDB.
>> The error message is "Im sorry, Dave, I can't do that. Symbol format
>> `elf32-littlearm' unknown'."
>> I searched on google, and leads me to the page
>> https://bugs.launchpad.net/linaro-toolchain-binaries/+bug/918937
>>
>> On that page, you posted this is fixed, could you show me the fix?
>>
>> I configured linaro-toolchain to build a native gdb for arm platform,
>> both native gdb and cross-gdb can't work, they report the same error
>> message.
>>
>> Please help me on this!
>>
>> Thank you very much!
>>
>> Yupeng Chang
>> July 05, 2013
>>
>>
>>
>>
== Progress ==
* 2013.07 release preparation:
* remaining backports
* reverted 2 sets of patches from 2013.06
* started release process
* Worked on setting up an internal build + validation to monitor FSF
trunk on ARM
* Internal support
== Next ==
* All week at Connect
== Progress ==
* 4 day week (leave on Thursday)
* Pushed memcpy improvement to newlib.
* Found and fixed ARM IFUNC issue in glibc.
* memcpy merged into bionic but not yet used (see gerrit review).
* Pinged and applied gdb testsuite patch, only one left to apply.
* More work on malloc benchmarking.
* Preparation for Connect.
== Issues ==
* None.
== Plan ==
* Connect all week
--
Will Newton
Toolchain Working Group, Linaro