Hi Dmitriy,
Linaro Benchmarking CI has flagged several interesting code-speed and code-size regressions for your patch -- see [1].
In particular, could you check if below regressions can be avoided:
- grew in size by 21% - 473.astar:[.] _ZN7way2obj12releasepointEii
- slowed down by 61% - 505.mcf_r:[.] price_out_impl
Both of these are for 32-bit ARM, but AArch64 also has code-speed and code-size regressions.
Let me know if you need any assistance in reproducing these problems.
[1] https://linaro.atlassian.net/browse/LLVM-1001
Kind regards,
--
Maxim Kuvyrkov
https://www.linaro.org
> Begin forwarded message:
>
> From: ci_notify(a)linaro.org
> Subject: [Linaro-TCWG-CI] llvmorg-18-init-7933-ge13bed4c5f35: slowed down by 6% - 464.h264ref on aarch64 O2
> Date: October 8, 2023 at 04:26:39 GMT+4
> To: maxim.kuvyrkov(a)linaro.org
> Reply-To: linaro-toolchain(a)lists.linaro.org
>
> Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel.
>
> In CI config tcwg_bmk-code_speed-spec2k6/llvm-aarch64-master-O2 after:
>
> | commit llvmorg-18-init-7933-ge13bed4c5f35
> | Author: Dmitriy Smirnov <dmitriy.smirnov(a)arm.com>
> | Date: Fri Oct 6 11:15:00 2023 +0100
> |
> | [PATCH] [llvm] [InstCombine] Canonicalise ADD+GEP
> |
> | This patch tries to canonicalise add + gep to gep + gep.
> |
> | Co-authored-by: Paul Walker <paul.walker(a)arm.com>
> |
> | Reviewed By: nikic
> | ... 2 lines of the commit log omitted.
>
> the following benchmarks slowed down by more than 3%:
> - slowed down by 6% - 464.h264ref - from 11126 to 11766 perf samples
> the following hot functions slowed down by more than 15% (but their benchmarks slowed down by less than 3%):
> - slowed down by 44% - 464.h264ref:[.] FastFullPelBlockMotionSearch - from 1531 to 2206 perf samples
>
> The configuration of this build is:
> Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don\'t have access to Linaro TCWG CI.
>
> Configuration:
> - Benchmark:
> - Toolchain: Clang + Glibc + LLVM Linker
> - Version: all components were built from their tip of trunk
> - Target: aarch64-linux-gnu
> - Compiler flags: O2
> - Hardware: NVidia TX1 4x Cortex-A57
>
> This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build : https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6--llvm-aarch64-master-…
> Reference build : https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6--llvm-aarch64-master-…
>
> Reproduce last good and first bad builds: https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/s…
>
> Full commit : https://github.com/llvm/llvm-project/commit/e13bed4c5f3544c076ce57e36d9a11e…
>
> Latest bug report status : https://linaro.atlassian.net/browse/LLVM-1001
>
> List of configurations that regressed due to this commit :
> * tcwg_bmk-code_speed-spec2k6
> ** llvm-aarch64-master-O2
> *** slowed down by 6% - 464.h264ref
> *** https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/s…
> *** https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6--llvm-aarch64-master-…
Hello,
Attended two events in a row in September, so had a bit of a time crunch
and the weekly report fell through the cracks...
# TCWG CI
- Investigated and fixed a few false positives in the GDB precommit CI
which were caused by random failures in
gdb.threads/process-dies-while-detaching.exp. Posted upstream and
later committed patch fixing the testcase to be more stable.
- After conversations during GNU Tools Cauldron and following Maxim's
suggestion, changed Linaro's CI to use the read1 library while running
the GDB testsuite to improve the stability of its results.
- After review from Tom Tromey, posted v2 and later committed a patch
which adds '--with-additional-debug-dirs' configure option.
- Committed a couple of changes to our CI scripts which make sure that
the kernel.yama.ptrace_scope and kernel.core_pattern sysctls have
correct values for running the GDB testsuite.
# [GNU-767] Support changing SVE vector length in remote debugging
- Now that Luis pushed his SME and SME2 patches, merged current GDB main
branch into my local branch. It builds but doesn't work yet.
# GDB Upstream
- Reviewed patch series "[PATCH v3 0/4] Dynamic properties of pointers".
- Investigated upstream bugzilla "18898 - Cannot specify non-default
list of directories as argument of --with-auto-load-dir on Windows",
but concluded it's an autoconf limitation that isn't easy to fix.
# Misc
- Prepared for Linaro's Employees Meeting.
- Attended GNU Tools Cauldron.
- Took a few days of vacation.
--
Thiago
Hi Arjun,
Please ignore this report. We had a new machine added to the testing pool, and it behaved differently than the others.
--
Maxim Kuvyrkov
https://www.linaro.org
> On Oct 4, 2023, at 22:30, ci_notify(a)linaro.org wrote:
>
> Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel.
>
> In CI config tcwg_glibc_check/master-arm after:
>
> | 13 patches in glibc
> | Patchwork URL: https://patchwork.sourceware.org/patch/76970
> | 72a0ec189c Move 'rpc' routines from 'inet' into 'nss'
> | e9e10ad39b Move 'protocols' routines from 'inet' into 'nss'
> | e0694af485 Move 'networks' routines from 'inet' into 'nss'
> | 547bcf6d44 Move 'netgroup' routines from 'inet' into 'nss'
> | 6c43eb641a Move 'hosts' routines from 'inet' into 'nss'
> | ... and 8 more patches in glibc
> | ... applied on top of baseline commit:
> | 1056e5b4c3 tunables: Terminate if end of input is reached (CVE-2023-4911)
>
> FAIL: 7 regressions
>
> regressions.sum:
> === glibc tests ===
>
> Running glibc:io ...
> FAIL: io/tst-close_range
>
> Running glibc:misc ...
> FAIL: misc/tst-epoll
> FAIL: misc/tst-epoll-time64
> FAIL: misc/tst-mount
> FAIL: misc/tst-process_mrelease
> ... and 6 more entries
>
> You can find the failure logs in *.log.1.xz files in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/802/artifa… .
> The full lists of regressions and progressions are in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/802/artifa… .
> The list of [ignored] baseline and flaky failures are in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/802/artifa… .
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build : https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/802/artifa…
> Reference build : https://ci.linaro.org/job/tcwg_glibc_check--master-arm-build/650/artifact/a…
Hi Joe,
Please ignore this report. We had a new machine added to the testing pool, and it behaved differently than the others.
--
Maxim Kuvyrkov
https://www.linaro.org
> On Oct 4, 2023, at 22:32, ci_notify(a)linaro.org wrote:
>
> Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel.
>
> In CI config tcwg_glibc_check/master-arm after:
>
> | glibc patch https://patchwork.sourceware.org/patch/77093
> | Author: Joe Ramsay <Joe.Ramsay(a)arm.com>
> | Date: Wed Oct 4 11:58:09 2023 +0100
> |
> | aarch64: Improve vecmath sin routines
> |
> | * Update ULP comment reflecting a new observed max in [-pi/2, pi/2]
> | * Use the same polynomial in AdvSIMD and SVE, rather than FTRIG instructions
> | * Improve register use near special-case branch
> |
> | Also use overloaded intrinsics for SVE.
> | ... applied on top of baseline commit:
> | 1056e5b4c3 tunables: Terminate if end of input is reached (CVE-2023-4911)
>
> FAIL: 5 regressions
>
> regressions.sum:
> === glibc tests ===
>
> Running glibc:io ...
> FAIL: io/tst-close_range
>
> Running glibc:misc ...
> FAIL: misc/tst-epoll
> FAIL: misc/tst-epoll-time64
> FAIL: misc/tst-mount
> FAIL: misc/tst-process_mrelease
> ... and 2 more entries
>
> You can find the failure logs in *.log.1.xz files in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/810/artifa… .
> The full lists of regressions and progressions are in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/810/artifa… .
> The list of [ignored] baseline and flaky failures are in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/810/artifa… .
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build : https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/810/artifa…
> Reference build : https://ci.linaro.org/job/tcwg_glibc_check--master-arm-build/650/artifact/a…
Hi Siddhesh,
Please ignore this report. We had a new machine added to the testing pool, and it behaved differently than the others.
--
Maxim Kuvyrkov
https://www.linaro.org
> On Oct 4, 2023, at 22:33, ci_notify(a)linaro.org wrote:
>
> Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel.
>
> In CI config tcwg_glibc_check/master-arm after:
>
> | glibc patch https://patchwork.sourceware.org/patch/77054
> | Author: Siddhesh Poyarekar <siddhesh(a)sourceware.org>
> | Date: Tue Oct 3 16:11:50 2023 -0400
> |
> | Make all malloc tunables SXID_ERASE
> |
> | The malloc tunables were made SXID_IGNORE to mimic the environment
> | variables they aliased, in order to maintain compatibility. This
> | allowed alteration of allocator behaviour across setuid boundaries,
> | where a setuid program may ignore the tunable but its non-setuid child
> | can read it and adjust allocator behaviour accordingly.
> | ... 10 lines of the commit log omitted.
> | ... applied on top of baseline commit:
> | 1056e5b4c3 tunables: Terminate if end of input is reached (CVE-2023-4911)
>
> FAIL: 5 regressions
>
> regressions.sum:
> === glibc tests ===
>
> Running glibc:io ...
> FAIL: io/tst-close_range
>
> Running glibc:misc ...
> FAIL: misc/tst-epoll
> FAIL: misc/tst-epoll-time64
> FAIL: misc/tst-mount
> FAIL: misc/tst-process_mrelease
> ... and 2 more entries
>
> You can find the failure logs in *.log.1.xz files in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/806/artifa… .
> The full lists of regressions and progressions are in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/806/artifa… .
> The list of [ignored] baseline and flaky failures are in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/806/artifa… .
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build : https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/806/artifa…
> Reference build : https://ci.linaro.org/job/tcwg_glibc_check--master-arm-build/650/artifact/a…
Hi,
The error reported below was in fact caused by a bug in these tests, which
has now been fixed.
Sorry for the false alarm.
Thanks
On Tue, 26 Sept 2023 at 16:42, <ci_notify(a)linaro.org> wrote:
> Dear contributor, our automatic CI has detected problems related to your
> patch(es). Please find some details below. If you have any questions,
> please follow up on linaro-toolchain(a)lists.linaro.org mailing list,
> Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain
> developer on the usual project channel.
>
> In CI config tcwg_binutils_check/master-aarch64 after:
>
> | binutils patch https://patchwork.sourceware.org/patch/76666
> | Author: Arsen Arsenović <arsen(a)aarsen.me>
> | Date: Tue Sep 26 02:17:33 2023 +0200
> |
> | *: add modern gettext support
> |
> | ChangeLog:
> |
> | * .gitignore: Add '/gettext*'.
> | * configure.ac (host_libs): Replace intl with gettext.
> | (hbaseargs, bbaseargs, baseargs): Split baseargs into
> {h,b}baseargs.
> | ... 64 lines of the commit log omitted.
> | ... applied on top of baseline commit:
> | d86dbbea8a8 aarch64: Allow feature flags to occupy >64 bits
>
> FAIL: 2 regressions
>
> regressions.sum:
> === binutils tests ===
>
> Running binutils:binutils-all/ar.exp ...
> FAIL: replacing non-deterministic member (wrong size, expected: 920)
> FAIL: replacing SOURCE_DATE_EPOCH deterministic member (wrong size,
> expected: 1096)
>
> === Results Summary ===
>
> You can find the failure logs in *.log.1.xz files in
> -
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/376…
> .
> The full lists of regressions and progressions are in
> -
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/376…
> .
> The list of [ignored] baseline and flaky failures are in
> -
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/376…
> .
>
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build :
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/376…
> Reference build :
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-build/302/art…
Hi,
The error reported below was in fact caused by a bug in these tests, which
has now been fixed.
Sorry for the false alarm.
Thanks
On Tue, 26 Sept 2023 at 16:38, <ci_notify(a)linaro.org> wrote:
> Dear contributor, our automatic CI has detected problems related to your
> patch(es). Please find some details below. If you have any questions,
> please follow up on linaro-toolchain(a)lists.linaro.org mailing list,
> Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain
> developer on the usual project channel.
>
> In CI config tcwg_binutils_check/master-aarch64 after:
>
> | binutils patch https://patchwork.sourceware.org/patch/76704
> | Author: Neal Frager <neal.frager(a)amd.com>
> | Date: Tue Sep 26 13:46:37 2023 +0100
> |
> | gas: microblaze: fixing constant range check issue
> |
> | The range check should be checking for the range
> | ffffffff80000000..7fffffff, not ffffffff70000000.
> |
> | This patch has been tested for years of AMD Xilinx Yocto
> | releases as part of the following patch set:
> | ... 5 lines of the commit log omitted.
> | ... applied on top of baseline commit:
> | d86dbbea8a8 aarch64: Allow feature flags to occupy >64 bits
>
> FAIL: 2 regressions
>
> regressions.sum:
> === binutils tests ===
>
> Running binutils:binutils-all/ar.exp ...
> FAIL: replacing non-deterministic member (wrong size, expected: 920)
> FAIL: replacing SOURCE_DATE_EPOCH deterministic member (wrong size,
> expected: 1096)
>
> === Results Summary ===
>
> You can find the failure logs in *.log.1.xz files in
> -
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/379…
> .
> The full lists of regressions and progressions are in
> -
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/379…
> .
> The list of [ignored] baseline and flaky failures are in
> -
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/379…
> .
>
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build :
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/379…
> Reference build :
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-build/302/art…
Hi,
The error reported below was in fact caused by a bug in these tests, which
has now been fixed.
Sorry for the false alarm.
Thanks
On Tue, 26 Sept 2023 at 16:38, <ci_notify(a)linaro.org> wrote:
> Dear contributor, our automatic CI has detected problems related to your
> patch(es). Please find some details below. If you have any questions,
> please follow up on linaro-toolchain(a)lists.linaro.org mailing list,
> Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain
> developer on the usual project channel.
>
> In CI config tcwg_binutils_check/master-aarch64 after:
>
> | binutils patch https://patchwork.sourceware.org/patch/76687
> | Author: YunQiang Su <yunqiang.su(a)cipunited.com>
> | Date: Tue Sep 26 07:20:35 2023 -0400
> |
> | GAS/MIPS: Fix testcase module-defer-warn2 for r2+ triples
> |
> | When gas is configured with --target=mipsisa32r2el-elf,
> module-defer-warn2
> | will fail:
> |
> | /binutils-gdb/gas/testsuite/gas/mips/module-defer-warn2.s:
> Assembler messages:
> | /binutils-gdb/gas/testsuite/gas/mips/module-defer-warn2.s:2:
> Error: `gp=64' used with a 32-bit processor
> | ... 11 lines of the commit log omitted.
> | ... applied on top of baseline commit:
> | d86dbbea8a8 aarch64: Allow feature flags to occupy >64 bits
>
> FAIL: 2 regressions
>
> regressions.sum:
> === binutils tests ===
>
> Running binutils:binutils-all/ar.exp ...
> FAIL: replacing non-deterministic member (wrong size, expected: 920)
> FAIL: replacing SOURCE_DATE_EPOCH deterministic member (wrong size,
> expected: 1096)
>
> === Results Summary ===
>
> You can find the failure logs in *.log.1.xz files in
> -
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/378…
> .
> The full lists of regressions and progressions are in
> -
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/378…
> .
> The list of [ignored] baseline and flaky failures are in
> -
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/378…
> .
>
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build :
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-precommit/378…
> Reference build :
> https://ci.linaro.org/job/tcwg_binutils_check--master-aarch64-build/302/art…
The <bits/version.h> header needs to be regenerated. The changes to
the generated file were not in the diff posted to the mailing list
(but are committed to git).
On Mon, 25 Sept 2023 at 11:55, <ci_notify(a)linaro.org> wrote:
>
> Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel.
>
> In CI config tcwg_gcc_check/master-arm after:
>
> | gcc patch https://patchwork.sourceware.org/patch/76638
> | Author: Jonathan Wakely <jwakely(a)redhat.com>
> | Date: Mon Sep 25 09:53:24 2023 +0100
> |
> | libstdc++: Define C++23 std::forward_like (P2445R1)
> |
> | Tested x86_64-linux. Pushed to trunk.
> |
> | -- >8 --
> |
> | libstdc++-v3/ChangeLog:
> | ... 8 lines of the commit log omitted.
> | ... applied on top of baseline commit:
> | c25d6f15211 LoongArch: doc: Update -m[no-]explicit-relocs for r14-4160
>
> FAIL: 12 regressions
>
> regressions.sum:
> === libstdc++ tests ===
>
> Running libstdc++:libstdc++-dg/conformance.exp ...
> FAIL: 20_util/forward_like/1.cc -std=gnu++23 (test for excess errors)
> FAIL: 20_util/forward_like/1.cc -std=gnu++26 (test for excess errors)
> FAIL: 20_util/forward_like/2_neg.cc -std=gnu++23 (test for errors, line )
> FAIL: 20_util/forward_like/2_neg.cc -std=gnu++23 (test for errors, line 5)
> FAIL: 20_util/forward_like/2_neg.cc -std=gnu++23 (test for errors, line 7)
> FAIL: 20_util/forward_like/2_neg.cc -std=gnu++23 (test for excess errors)
> FAIL: 20_util/forward_like/2_neg.cc -std=gnu++26 (test for errors, line )
> ... and 7 more entries
>
> You can find the failure logs in *.log.1.xz files in
> - https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/3840/artifac… .
> The full lists of regressions and progressions are in
> - https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/3840/artifac… .
> The list of [ignored] baseline and flaky failures are in
> - https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/3840/artifac… .
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build : https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/3840/artifac…
> Reference build : https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1059/artifact/ar…
Progress (short week, three days):
* UM-2 [QEMU upstream maintainership]
- Sent a patch to fix a bug involving QEMU's PSCI emulation when
QEMU is faking being EL3 firmware for a Linux guest
- Sent patch to make our handling of the UNPREDICTABLE T32
LDM-of-single-register case match real hardware (some buggy
software assumes this)
- Patch review
- Converted some more .txt files in our docs directory to rST
* QEMU-486 [Support FEAT_RME guests in a board model]
- JIRA cleanup to more clearly define what this epic is for,
close out some redundant other epics and issues, and create
or move some subtasks to be part of this epic
-- PMM
Hi Patrick,
Did you already get any bug reports for gcc-14-4111-g6e92a6a2a72 ?
In our benchmarking we see that 483.xalancbmk (from SPEC CPU2006) fails to build on 32-bit ARM. Let me know if you need any help in reproducing and troubleshooting this.
Thanks!
--
Maxim Kuvyrkov
https://www.linaro.org
> On Sep 27, 2023, at 11:05, ci_notify(a)linaro.org wrote:
>
> Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel.
>
> In CI config tcwg_bmk-code_speed-spec2k6/gnu-arm-master-O3 after:
>
> | commit gcc-14-4111-g6e92a6a2a72
> | Author: Patrick Palka <ppalka(a)redhat.com>
> | Date: Mon Sep 18 14:47:52 2023 -0400
> |
> | c++: non-dependent assignment checking [PR63198, PR18474]
> |
> | This patch makes us recognize and check non-dependent simple assigments
> | ahead of time, like we already do for compound assignments. This means
> | the templated representation of such assignments will now usually have
> | an implicit INDIRECT_REF (due to the reference return type), which the
> | -Wparentheses code needs to handle. As a drive-by improvement, this
> | ... 51 lines of the commit log omitted.
>
> the following benchmarks slowed down by more than 3%:
> - 483.xalancbmk failed to build
>
> Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don\'t have access to Linaro TCWG CI.
>
> Configuration:
> - Benchmark:
> - Toolchain: GCC + Glibc + GNU Linker
> - Version: all components were built from their tip of trunk
> - Target: arm-linux-gnueabihf
> - Compiler flags: O3
> - Hardware: NVidia TK1 4x Cortex-A15
>
> This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build : https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6--gnu-arm-master-O3-bu…
> Reference build : https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6--gnu-arm-master-O3-bu…
>
> Reproduce last good and first bad builds: https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/sh…
>
> Full commit : https://github.com/gcc-mirror/gcc/commit/6e92a6a2a72d3b7a5e1b29042d8a6a43fe…
>
> Latest bug report status : https://linaro.atlassian.net/browse/GNU-951
>
> List of configurations that regressed due to this commit :
> * tcwg_bmk-code_speed-spec2k6
> ** gnu-arm-master-O3
> *** 483.xalancbmk failed to build
> *** https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/sh…
> *** https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6--gnu-arm-master-O3-bu…
Hello!
I got 3 of these messages about a patch I have upstream, which seems
excessive.
I also just managed to grab an aarch64 box and test it and got no
errors, so I'd appreciate someone double checking that those werent 3
false positives please.
Thank you!
Guinevere Larsen
She/Her/Hers
-------- Forwarded Message --------
Subject: [Linaro-TCWG-CI] 2 patches in gdb: Failure
Date: Mon, 25 Sep 2023 05:37:49 +0000 (UTC)
From: ci_notify(a)linaro.org
Reply-To: linaro-toolchain(a)lists.linaro.org
To: blarsen(a)redhat.com
Dear contributor, our automatic CI has detected problems related to your
patch(es). Please find some details below. If you have any questions,
please follow up on linaro-toolchain(a)lists.linaro.org mailing list,
Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain
developer on the usual project channel.
In CI config tcwg_gdb_check/master-aarch64 after:
| 2 patches in gdb
| Patchwork URL: https://patchwork.sourceware.org/patch/76616
| ca7351280f6 gdb/infrun: simplify process_event_stop_test
| 0e77782d402 gdb/record: print frame information when exiting a
recursive call
| ... applied on top of baseline commit:
| be8e8313099 Automatic date update in version.in
Results changed to
# reset_artifacts:
-10
# build_abe gdb -- --prefix /usr --disable install:
# FAILED
# build_abe dejagnu:
# build_abe check_gdb --:
# First few build errors in logs:
# 00:10:07
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7012:17:
error: ‘curr_frame_id’ was not declared in this scope; did you mean
‘outer_frame_id’?
# 00:10:07
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7185:14:
error: ‘curr_frame_id’ was not declared in this scope; did you mean
‘outer_frame_id’?
# 00:10:07
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7185:31:
error: ‘original_frame_id’ was not declared in this scope
# 00:10:07
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7615:8:
error: ‘curr_frame_id’ was not declared in this scope; did you mean
‘outer_frame_id’?
# 00:10:07
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7615:25:
error: ‘original_frame_id’ was not declared in this scope
# 00:10:07
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7663:11:
error: ‘curr_frame_id’ was not declared in this scope; did you mean
‘outer_frame_id’?
# 00:10:07
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7663:28:
error: ‘original_frame_id’ was not declared in this scope
# 00:10:09 make[1]: *** [Makefile:1923: infrun.o] Error 1
# 00:10:09 make: *** [Makefile:12387: all-gdb] Error 2
# 00:09:18
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7012:17:
error: ‘curr_frame_id’ was not declared in this scope; did you mean
‘outer_frame_id’?
# 00:09:18
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7185:14:
error: ‘curr_frame_id’ was not declared in this scope; did you mean
‘outer_frame_id’?
# 00:09:18
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7185:31:
error: ‘original_frame_id’ was not declared in this scope
# 00:09:18
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7615:8:
error: ‘curr_frame_id’ was not declared in this scope; did you mean
‘outer_frame_id’?
# 00:09:18
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7615:25:
error: ‘original_frame_id’ was not declared in this scope
# 00:09:18
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7663:11:
error: ‘curr_frame_id’ was not declared in this scope; did you mean
‘outer_frame_id’?
# 00:09:18
/home/tcwg-build/workspace/tcwg_gnu_0/abe/snapshots/gdb.git~master/gdb/infrun.c:7663:28:
error: ‘original_frame_id’ was not declared in this scope
# 00:09:22 make[1]: *** [Makefile:1924: infrun.o] Error 1
# 00:09:43 make: *** [Makefile:12387: all-gdb] Error 2
From
# reset_artifacts:
-10
# build_abe gdb -- --prefix /usr --disable install:
-2
# build_abe dejagnu:
-1
# build_abe check_gdb --:
0
-----------------8<--------------------------8<--------------------------8<--------------------------
The information below can be used to reproduce a debug environment:
Current build :
https://ci.linaro.org/job/tcwg_gdb_check--master-aarch64-precommit/642/arti…
Reference build :
https://ci.linaro.org/job/tcwg_gdb_check--master-aarch64-build/326/artifact…
Progress:
* UM-2 [QEMU upstream maintainership]
- Implemented Neoverse N2 CPU model (easy as it's very similar to
the Cortex-A710 we just implemented; but because it supports 48
bit physical addresses we can use it in the sbsa-ref board, so
it's worth having both)
- Wrote code to wire up the NS EL2 virtual timer IRQ on the virt
board. This is part of FEAT_VHE, and we implemented the timer
itself in the CPU ages ago, but forgot to ever wire up the
interrupt line on the board models. Unfortunately doing this
runs into a bug in EDK2 where it incorrectly asserts when it
sees a dtb that reports the interrupt line. Leif Lindholm wrote
patches to fix this in EDK2, but we'll need to update the QEMU
testsuite and figure out how to communicate the need for an
updated EDK2 to users.
- Looked again at a long-standing missing feature in the virt
board where it only has one UART. The main blocker for adding
a second one has been odd EDK2 behaviour when the dtb tells
it there are two UARTs. Investigated and wrote up exactly
what it does to start a discussion about improving it.
- Put together a target-arm pull request
- Squashed a few -Wshadow warnings
- Looking at a bug involving QEMU's PSCI emulation when QEMU
is faking being EL3 firmware for a Linux guest
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- Implemented and sent a patch for FEAT_HPMN0 (a very easy
feature that makes MDCR_EL2.HPMN==0 valid)
-- PMM
I could not reproduce the bootstrap failure at -O3 on x86_64.
I used --with-build-config=bootstrap-O3 .
Maybe this is an arm (32?) only issue.
Thanks,
Andrew
________________________________________
From: ci_notify(a)linaro.org <ci_notify(a)linaro.org>
Sent: Saturday, September 16, 2023 5:33 AM
To: Andrew Pinski
Cc: gcc-regression(a)gcc.gnu.org
Subject: [EXT] [Linaro-TCWG-CI] basepoints/gcc-14-4038-gb975c0dc3be: Failure
External Email
----------------------------------------------------------------------
Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel.
In CI config tcwg_bootstrap_build/master-arm-bootstrap_O3 after:
| commit basepoints/gcc-14-4038-gb975c0dc3be
| Author: Andrew Pinski <apinski(a)marvell.com>
| Date: Thu Sep 14 14:47:04 2023 -0700
|
| MATCH: Improve zero_one_valued_p for cases without range information
|
| I noticed we sometimes lose range information in forwprop due to a few
| match and simplify patterns optimizing away casts. So the easier way
| to these cases is to add a match for zero_one_valued_p wich mathes
| a cast from another zero_one_valued_p.
| This also adds the case of `x & zero_one_valued_p` as being zero_one_valued_p
| ... 13 lines of the commit log omitted.
Results changed to
# reset_artifacts:
-10
# true:
0
# build_abe bootstrap_O3:
# FAILED
# First few build errors in logs:
# 00:30:42 xg++: internal compiler error: Segmentation fault signal terminated program cc1plus
# 00:30:42 make[3]: *** [Makefile:1184: tree-ssa-loop-niter.o] Error 4
# 00:30:42 make[2]: *** [Makefile:5051: all-stage2-gcc] Error 2
# 00:30:42 make[1]: *** [Makefile:25871: stage2-bubble] Error 2
# 00:30:42 make: *** [Makefile:1090: all] Error 2
# 00:07:25 make[3]: [Makefile:1822: armv8l-unknown-linux-gnueabihf/bits/largefile-config.h] Error 1 (ignored)
# 00:25:31 xg++: internal compiler error: Segmentation fault signal terminated program cc1plus
# 00:25:31 make[3]: *** [Makefile:1184: tree-ssa-loop-niter.o] Error 4
# 00:30:14 make[2]: *** [Makefile:5051: all-stage2-gcc] Error 2
# 00:30:14 make[1]: *** [Makefile:25871: stage2-bubble] Error 2
# 00:30:14 make: *** [Makefile:1090: all] Error 2
From
# reset_artifacts:
-10
# true:
0
# build_abe bootstrap_O3:
1
-----------------8<--------------------------8<--------------------------8<--------------------------
The information below can be used to reproduce a debug environment:
Current build : https://urldefense.proofpoint.com/v2/url?u=https-3A__ci.linaro.org_job_tcwg…
Reference build : https://urldefense.proofpoint.com/v2/url?u=https-3A__ci.linaro.org_job_tcwg…
Reproduce last good and first bad builds: https://urldefense.proofpoint.com/v2/url?u=https-3A__git.linaro.org_toolcha…
Full commit : https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_gcc-2Dmirro…
Latest bug report status : https://urldefense.proofpoint.com/v2/url?u=https-3A__linaro.atlassian.net_b…
List of configurations that regressed due to this commit :
* tcwg_bootstrap_build
** master-arm-bootstrap_O3
*** Failure
*** https://urldefense.proofpoint.com/v2/url?u=https-3A__git.linaro.org_toolcha…
*** https://urldefense.proofpoint.com/v2/url?u=https-3A__ci.linaro.org_job_tcwg…
Progress:
* UM-2 [QEMU upstream maintainership]
- sent patches that re-sync our defined set of usermode hwcap bits
and ID register bitmasks with what the Linux kernel currently has
- code review
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- FEAT_HBC: wrote and sent patch for this very simple feature
- FEAT_MOPS: rolled v2 patchset based on review feedback
* QEMU-486 [Update QEMU device models for FEAT_RME]
- Looked at the SMMU spec to see (a) what realm-management
related changes it needs and (b) where we are on the
implementation of other features. Closed a few stale
JIRA issues for features we've already implemented.
- sent a patchset that advertises that we support SMMUv3.1-XNX
(this is a no-op for our implementation)
- investigated what the "expected" setup is for enforcing GPT
checks on the GIC/ITS. Current front-runner is "the SMMU that's
already in the system provides 'GPC checks only' for the
accesses from these devices, as well as stage1/stage2 + GPT
checks for PCI etc devices" (the term in the SMMU spec rev F.a
is for a GPC-checks-only client device is "NoStreamID device")
-- PMM
On 2023-09-14 16:32, ci_notify(a)linaro.org wrote:
> Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel.
>
> In CI config tcwg_glibc_check/master-arm after:
>
> | glibc patch https://patchwork.sourceware.org/patch/75959
> | Author: Siddhesh Poyarekar <siddhesh(a)sourceware.org>
> | Date: Thu Sep 14 06:13:02 2023 -0400
> |
> | getaddrinfo: Fix use after free in getcanonname (CVE-2023-4806)
> |
> | When an NSS plugin only implements the _gethostbyname2_r and
> | _getcanonname_r callbacks, getaddrinfo could use memory that was freed
> | during tmpbuf resizing, through h_name in a previous query response.
> | Fix this by copying h_name over and freeing it at the end.
> |
> | ... 3 lines of the commit log omitted.
> | ... applied on top of baseline commit:
> | 803f4073cc Add MOVE_MOUNT_BENEATH from Linux 6.5 to sys/mount.h
>
> FAIL: 1 regressions
>
> regressions.sum:
> === glibc tests ===
>
> Running glibc:nss ...
> FAIL: nss/tst-nss-gai-hv2-canonname
>
> === Results Summary ===
>
> You can find the failure logs in *.log.1.xz files in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/703/artifa… .
> The full lists of regressions and progressions are in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/703/artifa… .
> The list of [ignored] baseline and flaky failures are in
> - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/703/artifa… .
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build : https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/703/artifa…
> Reference build : https://ci.linaro.org/job/tcwg_glibc_check--master-arm-build/612/artifact/a…
Hello,
I'm looking at the logs and all it has is:
original exit status 127
running post-clean rsync
for the new test. It looks like other NSS tests also fail in the same
way. Is this a known issue on arm?
Thanks,
Sid
I think this is because the patch changes
libstdc++-v3/include/bits/version.def which requires version.h to be
regenerated, by running 'make update-version' in the
objdir/$target/libstdc++-v3/include directory.
The patch I sent to gcc-patches (which is archived in patchwork)
doesn't have the updates to the generated files, but what I committed
to git does have them.
---------- Forwarded message ---------
From: <ci_notify(a)linaro.org>
Date: Mon, 11 Sept 2023 at 21:00
Subject: [Linaro-TCWG-CI] gcc patch #75644: FAIL: 2 regressions
To: <jwakely(a)redhat.com>
Dear contributor, our automatic CI has detected problems related to
your patch(es). Please find some details below. If you have any
questions, please follow up on linaro-toolchain(a)lists.linaro.org
mailing list, Libera's #linaro-tcwg channel, or ping your favourite
Linaro toolchain developer on the usual project channel.
In CI config tcwg_gcc_check/master-aarch64 after:
| gcc patch https://patchwork.sourceware.org/patch/75644
| Author: Jonathan Wakely <jwakely(a)redhat.com>
| Date: Mon Sep 11 14:57:08 2023 +0100
|
| libstdc++: Formatting std::thread::id and std::stacktrace (P2693R1)
|
| Tested aarch64-linux. Pushed to trunk.
|
| -- >8 --
|
| New std::formatter specializations for C++23.
| ... 18 lines of the commit log omitted.
| ... applied on top of baseline commit:
| 390fa3a78c8 libstdc++: Fix -Wunused-parameter warnings
FAIL: 2 regressions
regressions.sum:
=== libstdc++ tests ===
Running libstdc++:libstdc++-dg/conformance.exp ...
FAIL: 19_diagnostics/stacktrace/output.cc (test for excess errors)
FAIL: 19_diagnostics/stacktrace/version.cc (test for excess errors)
=== Results Summary ===
You can find the failure logs in *.log.1.xz files in
- https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/2232/art…
.
The full lists of regressions and progressions are in
- https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/2232/art…
.
The list of [ignored] baseline and flaky failures are in
- https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/2232/art…
.
-----------------8<--------------------------8<--------------------------8<--------------------------
The information below can be used to reproduce a debug environment:
Current build :
https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/2232/art…
Reference build :
https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-build/926/artifact…
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Continuing work on new approach to support changing SVE vector length
in remote debugging. Fixed making native GDB work with the new
approach using the DWARF location expression. Now porting the same
approach to gdbserver, with an ad-hoc minimal location expression.
# TCWG CI
- Fixed GDB testsuite default timeout value, to make GDB check jobs for
32-bit ARM run in a less unreasonable time again.
# Misc
- Started preparation for future work on Guarded Control Stack for GDB.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- sent patch fixing some regexes in our documentation
- patch review and queueing up an arm pull request
- Investigated the mps3-an536 Cortex-R52 FPGA image to see
what work would be required to implement a QEMU model of it,
wrote a draft of a jira epic issue for this
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- FEAT_MOPS:
* Implemented and tested the memcpy/memmove insns CPY*
* Got the whole patchseries into good enough shape to send out
for review
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Resumed working on new approach to support changing SVE vector length
in remote debugging. I was able to use DWARF location expressions in
the target description to express the SVE vector register sizes in
terms of the VG register. Also adapted the regcache to support
variable-length registers, and removed the VQ value from the target
description and from aarch64_gdbarch_tdep, making GDB use one target
description regardless of the vector length size. Still ironing out
some bugs, and haven't tackled gdbserver yet.
--
Thiago
Just FYI.
This test is just bogus and fixing it might be simple as using -fsanitize=undefined to check at runtime there is no undefined behavior being hit.
In this case even if we do the comparison in `signed` and do the negate in `unsigned` types. we can still remove the negate in this case since we know the only value that will be still negative in that branch is LONG_MIN. So my patch just simplifies the inner comparison to that instead of `a < 0` and then be able to remove the neg.
Someone else will have to fix the testcase since it is a testcase issue ...
________________________________________
From: ci_notify(a)linaro.org <ci_notify(a)linaro.org>
Sent: Friday, September 1, 2023 3:07 PM
To: Andrew Pinski
Subject: [EXT] [Linaro-TCWG-CI] 2 patches in gcc: FAIL: 1 regressions
External Email
----------------------------------------------------------------------
Dear contributor, our automatic CI has detected problems related to your patch(es).
Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list.
In CI config tcwg_gcc_check/master-aarch64 after:
| 2 patches in gcc
| Patchwork URL: https://urldefense.proofpoint.com/v2/url?u=https-3A__patchwork.sourceware.o…
| 504821491ff VR-VALUES: Rewrite test_for_singularity using range_op_handler
| f6d1540c3e0 VR-VALUES: Rename op0/op1 to op1/op2 for test_for_singularity
| ... applied on top of baseline commit:
| b0d75f7d3bb libstdc++: Fix debug-mode tests for constexpr algorithms
FAIL: 1 regressions
regressions.sum:
=== gcc tests ===
Running gcc:gcc.target/aarch64/aarch64.exp ...
FAIL: gcc.target/aarch64/vnegd_s64.c scan-assembler-times neg\\tx[0-9]+, x[0-9]+ 1
=== Results Summary ===
-----------------8<--------------------------8<--------------------------8<--------------------------
The information below can be used to reproduce a debug environment:
Current build : https://urldefense.proofpoint.com/v2/url?u=https-3A__ci.linaro.org_job_tcwg…
Reference build : https://urldefense.proofpoint.com/v2/url?u=https-3A__ci.linaro.org_job_tcwg…
Progress (short week, 3 days):
* UM-2 [QEMU upstream maintainership]
- code review:
+ RTH's linux-user ESR signal frame patchset
+ iMX6/7 cleanup patchset
+ some other minor bits and pieces
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- FEAT_MOPS:
* SETG* instructions (memset + MTE tag setting) implemented and
given some basic testing
-- PMM
Hi Jan,
Your patch caused a regression [1] on aarch64-linux-gnu. Would you
please investigate? I am having some trouble to reproduce it outside
our CI environment, but it has been hitting this issues consistently
and it does seems related to your patch.
Let me know if you need any assistance in reproducing these.
Thanks!
[1] https://ci.linaro.org/job/tcwg_bootstrap_build--master-aarch64-bootstrap_pr…
Hi Richard,
Your patch caused a regression [1] on aarch64-linux-gnu. Would you
please investigate? I did a quick analysis and it seems that for
test_copy_lane_f32, test_copy_lane_s32, test_copy_lane_u32, gcc
is now generating zip1 instead of a ins; which does not seem
fully correct.
Let me know if you need any assistance in reproducing these.
Thanks!
[1] https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-build/91…
Hello,
# TCWG CI
- GCC regression GNU-884: Prathamesh confirmed that the new generated
code is better so I posted a patch adjusting the testcase.
- GCC regression GNU-885: Confirmed that the problem is still present in
trunk as of commit 829c0c06fe7b from yesterday, so opened bugzilla
111125 and copied the patch author. He fixed the regression.
- Posted Gerrit review request to increase timeout for GDB check jobs to
accommodate longer times for Armv8l builds.
# GDB Upstream
- Reviewed v4 of Luis' patch series adding SME support to GDB and
gdbserver.
--
Thiago
Hi Andrew,
Your patch caused a regression [1] on aarch64-linux-gnu. Would you
please investigate? I did a quick analysis and it seems that the
expected 18 for aarch64 is now 17:
$ grep "Jumps threaded" a-ssa-dom-thread-7.c.197t.thread2
Jumps threaded: 17
Let me know if you need any assistance in reproducing these.
Thanks!
[1] https://ci.linaro.org/job/tcwg_gnu_native_check_gcc--master-aarch64-build/5…
Hi Richard,
Your patch below ICEs on aarch64-linux-gnu. Should reproduce easily on native or cross aarch64-linux-gnu build.
Let me know if you need any assistance in reproducing this.
Thanks,
--
Maxim Kuvyrkov
https://www.linaro.org
> On Aug 24, 2023, at 22:03, ci_notify(a)linaro.org wrote:
>
> Dear contributor, our automatic CI has detected problems related to your patch.
> Please find below some details about it. If you have any questions, please
> follow up on linaro-toolchain(a)lists.linaro.org mailing list.
>
> In CI config tcwg_gcc_check/master-aarch64 after:
>
> | commit a1558e9ad856938f165f838733955b331ebbec09
> | Author: Richard Biener <rguenther(a)suse.de>
> | Date: Wed Aug 23 14:28:26 2023 +0200
> |
> | tree-optimization/111115 - SLP of masked stores
> |
> | The following adds the capability to do SLP on .MASK_STORE, I do not
> | plan to add interleaving support.
> |
> | PR tree-optimization/111115
> | ... 21 lines of the commit log omitted.
>
> FAIL: 6 regressions
>
> regressions.sum:
> === gcc tests ===
>
> Running gcc:gcc.target/aarch64/sve/aarch64-sve.exp ...
> FAIL: gcc.target/aarch64/sve/mask_struct_store_4.c (internal compiler error: in get_group_load_store_type, at tree-vect-stmts.cc:2121)
> FAIL: gcc.target/aarch64/sve/mask_struct_store_4.c (test for excess errors)
> UNRESOLVED: gcc.target/aarch64/sve/mask_struct_store_4.c scan-assembler-not \\tst2b\\t.z[0-9]
> UNRESOLVED: gcc.target/aarch64/sve/mask_struct_store_4.c scan-assembler-not \\tst2d\\t.z[0-9]
> UNRESOLVED: gcc.target/aarch64/sve/mask_struct_store_4.c scan-assembler-not \\tst2h\\t.z[0-9]
> UNRESOLVED: gcc.target/aarch64/sve/mask_struct_store_4.c scan-assembler-not \\tst2w\\t.z[0-9]
>
> ... and 1 more entries
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build : https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-build/857/artifact…
> Reference build : https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-build/856/artifact…
>
> Reproduce last good and first bad builds: https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/sha1/…
>
> Full commit : https://github.com/gcc-mirror/gcc/commit/a1558e9ad856938f165f838733955b331e…
>
> Latest bug report status : https://linaro.atlassian.net/browse/GNU-893
>
> List of configurations that regressed due to this commit :
> * tcwg_gcc_check
> ** master-aarch64
> *** FAIL: 6 regressions
> *** https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-build/857/
Progress (short week, 3 days):
* UM-2 [QEMU upstream maintainership]
- code review:
+ Xilinx Versal CFI support series
+ v2 of RTH's Cortex-A710 series
- a few more -Wvla patches
- put together and sent the first arm pullreq for the 8.2 cycle
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- FEAT_MOPS:
+ updated to use a refactoring suggested by RTH
+ started looking at SETG operation (memset with MTE tag setting)
-- PMM
Hi Julian,
Your patch series causes regressions on aarch64-linux-gnu. Would you please investigate?
Let me know if you need any assistance in reproducing these.
Thanks!
--
Maxim Kuvyrkov
https://www.linaro.org
> On Aug 19, 2023, at 09:32, ci_notify(a)linaro.org wrote:
>
> [Linaro-TCWG-CI] FAIL: 10 regressions after gcc commit: 5 commits in gcc
>
> Dear contributor, our automatic CI has detected problems related to your patch.
> Please find below some details about it.
>
> In CI config tcwg_gcc_check/master-aarch64 after:
>
> | gcc commits:
> | dce6c135fb52fd631c2fc82d8048d32ce41ece21 OpenMP/OpenACC: Reorganise OMP map clause handling in gimplify.cc
> | dd49dd178e3eac8e9925baa3d71325d8d5f69215 OpenMP/OpenACC: Unordered/non-constant component offset runtime diagnostic
> | bd5a53e6b47907d05672cbb603af363a665b45a4 OpenMP: Pointers and member mappings
> | 4e0359d8a659c8abdca3297fc9b0e20ff89f7f82 OpenMP/OpenACC: Rework clause expansion and nested struct handling
> | a855174e5461d2b423af7f892fd31dfb10ce09ec OpenMP/OpenACC: Reindent TO/FROM/_CACHE_ stanza in {c_}finish_omp_clause
>
> FAIL: 10 regressions
>
> regressions.sum:
> === libgomp tests ===
>
> Running libgomp:libgomp.c++/c++.exp ...
> FAIL: libgomp.c++/../libgomp.c-c++-common/map-arrayofstruct-2.c output pattern test
> FAIL: libgomp.c++/../libgomp.c-c++-common/map-arrayofstruct-3.c output pattern test
>
> Running libgomp:libgomp.c/c.exp ...
> FAIL: libgomp.c/../libgomp.c-c++-common/map-arrayofstruct-2.c output pattern test
> FAIL: libgomp.c/../libgomp.c-c++-common/map-arrayofstruct-3.c output pattern test
>
> ... and 9 more entries
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build : https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/1593/art…
> Reference build : https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-build/836/artifact…
Hi Manos,
New tests in your patch [1] fail on aarch64-linux-gnu build in our CI. Would you please investigate why? Testing logs are at [2].
[1] https://patchwork.sourceware.org/project/gcc/patch/20230818074943.41754-1-m…
[2] https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/1602/art…
--
Maxim Kuvyrkov
https://www.linaro.org
> On Aug 19, 2023, at 08:37, ci_notify(a)linaro.org wrote:
>
> [Linaro-TCWG-CI] FAIL: 6 regressions after gcc commit: basepoints/gcc-14-3331-gcddc26e0274 aarch64: Fine-grained ldp and stp policies with test-cases.
>
> Dear contributor, our automatic CI has detected problems related to your patch.
> Please find below some details about it.
>
> In CI config tcwg_gcc_check/master-aarch64 after:
>
> | commit cddc26e0274b51e775929e497f89d203211689d2
> | Author: Manos Anagnostakis <manos.anagnostakis(a)vrull.eu>
> | Date: Fri Aug 18 10:49:43 2023 +0300
> |
> | aarch64: Fine-grained ldp and stp policies with test-cases.
> |
> | This patch implements the following TODO in gcc/config/aarch64/aarch64.cc
> | to provide the requested behaviour for handling ldp and stp:
> |
> | /* Allow the tuning structure to disable LDP instruction formation
> | ... 47 lines of the commit log omitted.
>
> FAIL: 6 regressions
>
> regressions.sum:
> === gcc tests ===
>
> Running gcc:gcc.target/aarch64/aarch64.exp ...
> FAIL: gcc.target/aarch64/ldp_aligned.c scan-assembler-times ldp\tq[0-9]+, q[0-9] 1
> FAIL: gcc.target/aarch64/ldp_aligned.c scan-assembler-times ldp\tw[0-9]+, w[0-9] 3
> FAIL: gcc.target/aarch64/ldp_aligned.c scan-assembler-times ldp\tx[0-9]+, x[0-9] 3
> FAIL: gcc.target/aarch64/ldp_always.c scan-assembler-times ldp\tq[0-9]+, q[0-9] 2
> FAIL: gcc.target/aarch64/ldp_always.c scan-assembler-times ldp\tw[0-9]+, w[0-9] 6
> FAIL: gcc.target/aarch64/ldp_always.c scan-assembler-times ldp\tx[0-9]+, x[0-9] 6
>
> ... and 1 more entries
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build : https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/1602/art…
> Reference build : https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-build/836/artifact…
>
> Reproduce last good and first bad builds: https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/sha1/…
>
> Full commit : https://github.com/gcc-mirror/gcc/commit/cddc26e0274b51e775929e497f89d20321…
>
> Latest bug report status : https://linaro.atlassian.net/browse/GNU-692
>
> List of configurations that regressed due to this commit :
> * tcwg_gcc_check
> ** master-aarch64
> *** FAIL: 6 regressions
> *** https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/1602/
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Continued working on new approach to support changing SVE vector
length in remote debugging.
# TCWG CI
- Analysed GCC regression GNU-880 which is actually an XFAIL → XPASS so
I sent a patch removing the xfail annotation.
- Analysed GCC regression GNU-881. The problem is that we don't have
Python in the ABE sysroot so a new Python GCC plugin testcase fails to
build. Sent a patch to detect that situation and mark the test as
unsupported. It was committed upstream.
- Tested a couple of new versions of a GDB mailing list patch to see if
it fixed the failure reported by the precommit CI. Reported results to
patch author.
- Fixed silly mistake spotted by Laurent in ABE Gerrit requests to use
TIMEOUTFACTOR for DejaGnu testsuites. Adjusted it to not use the
factor in GDB on armhf and sent new version for review.
- Reviewed a couple of Gerrit requests.
--
Thiago
Progress (short week, 3 days):
* UM-2 [QEMU upstream maintainership]
- sent out another couple of "avoid VLA" patches
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- managed to write some first-pass code for the MTE checks for
FEAT_MOPS memset operations. Got something together enough to
send to RTH for some pre-review before I roll the approach out
to the other insns.
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Returned to implementing support for changing SVE vector length in
remote debugging. The patch series I sent earlier this year used an
approach that some maintainers weren't enthusiastic about (modifying
the Remote Serial Protocol to request XML target descriptions). Now
trying the approach they suggested, which is to extend target
descriptions to support expressing vector registers whose length is
given by the contents of another register.
# TCWG CI
- Following Maxim's suggestion, sent and merged Gerrit review requests
to increase chance of tcwg_gdb_check jobs to be faster at detecting
new or newly expired flaky tests:
- 45151: tcwg_gdb: Increase job frequency
- 45152: round-robin.sh (build_abe): Increase time to re-detect GDB
flaky tests
- Implemented change in ABE to support glibc's TIMEOUTFACTOR environment
variable for DejaGnu testsuites. Testing on armv8l and aarch64.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- code review, notably:
+ RTH's setnegcond series
+ Jean-Philippe's fixes for various FEAT_RME bugs
+ Akihiko's series to make KVM '-machine none' not default to 40 bits
of IPA space if the host doesn't supoprt that (like the Apple CPUs)
- sent a patch to catch the illegal exception return case from
EL3 with bad SCR_EL3.{NSE,NS}
- respin and resend of ptw cleanup patchset
- tidied another 'BiteSizedTask' entry into a gitlab issue
- went back to an old minor cleanup task: getting rid of the
last dozen or so uses of variable-length arrays in the codebase
(so we can enforce not using them in the compiler, and avoid
unchecked-on-stack-allocation security bugs). Sent patches to
zap a few more.
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- thinking a bit more about FEAT_MOPS and MTE checks, but ultimately
not much progress: didn't find enough hours with a sufficiently
alert mind...
-- PMM
Hello,
# TCWG CI
- Implemented increasing testsuite timeout for each testsuite try in GDB
check jobs. Sent a Gerrit review request for it but then found out that
it makes armhf jobs take a lot longer, so abandoned it.
# Community
- Finished reviewing SME patches for GDB and gdbserver.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- some bits and pieces for release
- code review, notably:
+ raspberry pi 4 support patchseries (a big 44-patch set)
+ Xilinx Versal CFI support patches
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- more work on FEAT_MOPS: tested my memset implementation, and
fixed various bugs. Still no MTE tag checking support.
-- PMM
Hello,
# TCWG CI
- CI Babysitting: Worked on two regressions detected at the end of last
week.
- Enabled precommit testing for GDB patches.
# Misc
- Reviewing SME patches for GDB and gdbserver.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- release related stuff: handling merge requests, etc (now passed
back to RTH again)
- sent some patches for a few easy coverity issues
- worked through some code review (in particular some patches
from new contributors)
- created a gitlab "bite sized task" issue that better explains
and has more detail on the "convert from malloc to g_malloc"
suggested task for new contributors
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- a little more progress with FEAT_MOPS. I now have an untested
implementation of the memset insns which I think is complete
except for MTE tag checking
-- PMM
Hello,
# TCWG CI
- Babysat the CI: Investigated 9 regressions in GCC, 2 in GDB, 1 in LLVM
and 1 in glibc. Reported 4 in GCC (GNU-855, GNU-857, GNU-858 and
GNU-859). 3 of which are fixed and another has a tentative fix.
- Reviewed a couple of Gerrit requests.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- fixed some places in our RTC device models where we were
putting a time_t or time_t offset into a 32-bit variable
- took over from RTH briefly for pullreq merge handling
- sent some patches fixing minor Coverity issues
- investigated a couple of "test case fails on big-endian host"
errors: sent patches for Sparc FPRS handling and for
the Arm SMMUv3 model
- Investigated report that our MPS2/3 M-profile models don't
have the same number of MPU regions configured as the real FPGA
images, and so you can't run the same Zephyr binary on both.
Have some preliminary patches to correct the number of regions.
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- finally got back to FEAT_MOPS work; wrote a skeleton of code
for the memset operations that's about right up to the point
where it needs to actually do the memset...
-- PMM
Hi everyone,
I'm not 100% sure whether this is a bot misconfiguration issue, but couldn't find any other source of this failure:
```
******************** TEST 'test-suite :: MultiSource/Applications/ClamAV/clamscan.test' FAILED ********************
Executable '/home/tcwg-buildbot/worker/clang-aarch64-sve-vla/test/sandbox/build/MultiSource/Applications/ClamAV/clamscan' is missing
********************
```
Link: https://lab.llvm.org/buildbot/#/builders/197/builds/8209
Would anyone be able to take a look?
Thank you :)
-Andrzej
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