Short week (3 days)
== Progress ==
* Disable-peeling: got results vs reference, shared with team.
* Revert-coalesce vars: got results vs reference, showing regressions.
* Libsanitizer: committed upstream.
* Neon intrinsics: shared initial proposal of dejagnu-ization of my
existing tests.
* Branch reviews
* Internal support
== Next ==
* Disable-peeling: investigate regression on eon
* Revert-coalesce: discuss how to handle it with team
* Libsanitizer: enable on aarch64
* Neon intrinsics: continue improving crc with vuzp
* Neon intrinsics tests: continue dejagnu-ization
== Progress ==
* Four day week and traditional bank holiday cold slowed progress.
* Tested glibc memcpy patch on big endian and got it committed.
* Submitted some generic IFUNC patches for binutils upstream.
* Further work on AArch64 IFUNC support in binutils.
== Issues ==
* cbuild seems to not be doing much building at the moment.
== Plan ==
* Complete AArch64 IFUNC support and submit a patch.
* Look further at gdb bug if I get time.
--
Will Newton
Toolchain Working Group, Linaro
[three day week]
Progress:
* VIRT-49 [cp15 migration]
** lots of patch cleanup; nearly ready to submit but ideally
I'd like to test KVM migration with Andre's kernel changes first
** improved arndale setup by switching to USB hard disk; confirmed
I can build and boot my own kernel
* VIRT-50 [cp15 reset]
** it turns out that the VIRT-49 patches on their own break
reset handling for the KVM case, so we need to include VIRT-50
work in the same patchset. Fortunately it turns out to be a small
extension; patch done and tested, and will be submitted as part
of the VIRT-49 patchset
* misc
** discussions about early-printk in a virtual machine. I still think
it's important to be able to have a device tree binding to tell
the kernel where its early-printk uart is. Grant Likely said he
and Nico actually tossed this idea around in the past, it just
never got implemented.
Plans:
* VIRT-49/50: test against Andre's kernel timer save/load patches,
then submit
* more in-depth review and test of John Rigby's mach-virt and
aarch64 patchsets
-- PMM
Hi,
I'm running into an interesting problem with driver blobs when building
Android with the 4.8 toolchain:
E/libEGL ( 1219):
load_driver(/vendor/lib/egl/libEGL_POWERVR_SGX540_120.so): Cannot load
library: soinfo_link_image(linker.cpp:1635): could not load library
"libIMGegl.so" needed by "libEGL_POWERVR_SGX540_120.so"; caused by
soinfo_link_image(linker.cpp:1635): could not load library "libsrv_um.so"
needed by "libIMGegl.so"; caused by soinfo_relocate(linker.cpp:975): cannot
locate symbol "__aeabi_uidiv" referenced by "libsrv_um.so"...
__aeabi_uidiv is a libgcc.a function (Android doesn't have libgcc_s) - and
the blob makers didn't link libgcc.a properly, so it is understandable why
this would be missing.
However, Android's libc has an ugly but (up until now) working workaround
that is supposed to address this sort of issue.
It includes libgcc_compat.c, which comes down to
#define COMPAT_FUNCTIONS_LIST \
XX(__aeabi_uidiv) \
... (same for other libgcc functions)
#define XX(f) extern void f(void);
COMPAT_FUNCTIONS_LIST
#undef XX
void __bionic_libgcc_compat_hooks(void)
{
#define XX(f) f();
COMPAT_FUNCTIONS_LIST
#undef XX
}
Running nm on libc.so shows the symbol is actually in libc.so, and it seems
to be visible.
$ nm /system/lib/libc.so |grep aeabi_uidiv
0004f5d8 t __aeabi_uidiv
0004f680 t __aeabi_uidivmod
libsrv_um.so is linked to libc too, so it should see it...
$ objdump -x /vendor/lib/libsrv_um.so |grep libc.so
NEEDED libc.so
Can anyone think of a reason why this would work fine if the system is
built with the 4.7 toolchain, but break with 4.8?
My first thought was that 4.8 might have miscompiled the dynamic linker -
but the problem remains if I copy in /system/bin/linker from the 4.7 build.
ttyl
bero
Hi all,
You probably don't care, but here is a quick post (with pictures!) of the
EuroLLVM 2013 that just happened last week.
http://blog.llvm.org/2013/05/eurollvm-2013-paris-france.html
Linaro helped organize (mainly so I could get free booze in Paris), and it
seems that other people liked it, too.
If you're really interested in knowing more, let me know.
cheers,
--renato
== Progress ==
* SD card purchased dumped ubuntu for chromebook on sd card and configured
chromebook for development.
* Created newly released GDB 7.6 test suite results by running on
chromebook and x86 machine in native-none,native-gdbserver and
remote-gdbserver configurations
* Created GDB 7.5.1 test suite results by running on chromebook and x86
machine in native-none,native-gdbserver and remote-gdbserver configurations
* Created comparisons of gdb 7.6 test suite results in different
configuration.
* Public Holiday on 1st of May
== Plan ==
* Fill up the googledoc comparison sheets of gdb 7.6 test suite run in
different configuration on chromebook and x86.
* Fill up the googledoc comparison sheets of gdb 7.5.1 test suite run in
different configuration on chromebook and x86.
* Analyse difference between test suite results between gdb 7.5.1 and gdb
7.6.
* Pakistan General Elections 2013 might have to take a day off.
== Progress ==
* AARCH64 - gprof support.
Make GCC generate profile information (Completed).
Defined macros in GCC to enable frame return address and insert profile call.
Changed glibc to use generic gprof calls. Now gmon.out is generated
when run in openembedded on V8 model.
Used PROFILE_HOOK and generated mcount call using emit_library_call.
Misc
-------
1 May was a holiday.
== Plan ==
* Continue AARCH64 gprof support
* Post patches in GCC for profile and RETURN_ADDR_RTX
* Look at gprof "-c" option support in binutils
* Run gcc testsuite with changes on openembeded/V8 model.
Hi,
I tried compiling a hello-world program for cortex -a53/57 but, gcc does not recognize the mcpu option.
Here is my command ...
aarch64-linux-gnu-gcc hello_world.c -mcpu=cortex-a53 -o hello_world
Does the compiler support these options? I see that lib/gcc/aarch64-linux-gnu/4.8.1/plugin/include/config/aarch64/aarch64-cores.def do have the entries for cortex a53 & a57.
Thanks,
Kalai
== Progress ==
* Committed binutils testsuite fix for precise, should be green in cbuild now.
* Comitted binutils fix for ARM IFUNC issue.
* Various small binutils fixes for AArch64.
* Lots of rework of glibc memcpy patch, now up to v6.
* Integrated latest bionic string functions into cortex-strings.
* AArch64 IFUNC code and tests beginning to take shape.
== Issues ==
* None.
== Plan ==
* Another respin of glibc memcpy patch (last one?).
* More work on AArch64 IFUNC.
* May get time to look into gdb bug Peter found.
* 4 day week due to bank holiday.
--
Will Newton
Toolchain Working Group, Linaro
Progress:
* office move
* checking up on status of licensing issues with QEMU's softfloat
* cleaned up obsolete qemu blueprints in launchpad [Matt G-D is
going to finish the last bits of transferring the backlog to
JIRA where appropriate]
* booked travel/hotel for Connect Dublin
* reviewed John Rigby's mach-virt and aarch64 patches
* VIRT-49
** can run KVM with this code now, need to test migration proper
(requires kernel to support arch timer state save/load),
and clean up some TODOs and other cruft
** GDB is behaving oddly connected to QEMU's stub, which I think is
a GDB bug (LP:1175525) but may also be a QEMU side issue
Plans:
* VIRT-49 debug & patch cleanup
* NB: UK bank holiday next week, will be 3 day week for me
-- PMM
== Issues ==
* None
== Progress ==
* Short week (only 2 days)
* Libunwind AArch64 support:
- Did some fixes and cleanups after review.
- re-submitted upstream
* LRA on ARM and AArch64:
- Enabled LRA on trunk for ARM target
- build doesn't complete, investigation ongoing
* Internal meetings
== Plan ==
* Short week too
* Continue on LRA
== Progress ==
* EuroLLVM 2013
- Conference Mon~Tue
- Analysing questionnaire's response
- Writing a blog entry, reports
* Shorter week, low progress
== Plan ==
* Release
- Start testing version 3.2
- Check-out frozen 3.3 and run the same tests
- Make sure calxeda node is up to the task
- Buy a Chromebook for further testing (?)
I'll probably spend all my time worrying about the release, one way or
another...
Hi,
I'm trying to build the aarch64 tool chain from source on a Redhat machine. I see that build.mk in the crosstool package requires a few .deb packages. If I want to build this on a Redhat machine, what are the changes I have to do?
Thanks,
Kalai
Hi,
I am looking for pre-build (binary, tar) GCC for native ARM e.g. I need to
use in Angstrom FS and panda board to compile the code.
Thanks & regards,
Sukumar
Hi,
I am trying to compile Qt 4.8 for ARMv8. I need following packages.
libqt4-dev libqt4-opengl-dev libphonon-dev libicu-dev libsqlite3-dev
libxext-dev libxrender-dev gperf libfontconfig1-dev libphonon-dev
libpng12-dev libjpeg62-dev
I could not find these or any such packages on Linaro website. Is there any
website which maintains packages compiled for ARMv8?
I downloaded Qt4.8 source code. But it seems I need to do many hacks to get
it compiled for ARMv8. Is it already available some where?
Any help will be appreciated.
Thanks
Aparna
== Progress ==
* Compared gdb test suite results in arm native none and arm remote
gdbserver configurations. Filled up the googledoc sheet with the
comparison.
* Created a patch for dwarf failures still need to sync it with gdb main
trunk and then need to test it on chrome book and submit after review.
* Investigated gdb.mi test suite failures most of them seems to be occuring
due to long delay. Will retest on chrome book and update.
* Received chrome book on Friday started configuration created a recovery
disk and SD card, facing a kernel panic for now.
* 1:1 with Matt
== Plan ==
* Complete chrome book configuration.
* Run arm test suite in different configurations on chrome book.
* Update the comparison sheet of gdb test suite results in different
configurations after running tests on chrome book.
* Public Holiday on 1st of May
== Progress ==
* AARCH64 - Gprof support.
Make GCC generate profile information (On-going).
Defined hook and macros in GCC to emit "mcount" instrumented calls.
Looked at ARM implementation and veener code in glibc which implements mcount.
Discussed with Matt, and decided to use generic "mcount"
implementation in glibc for aarch64.
The generic uses built_in_return_address. Looking at defining macros
and function which traverses
frames back and returns the desired frame address.
== Plan ==
* Continue gprof support work for Aarch64
Planned leaves:
1 May: Labor Day's holiday.
== Summary ==
- http://cards.linaro.org/browse/TCWG-14
- ran into space issues with chromebook and issues running spec2000
locally due to that. Finally reinstalled Ubuntu on 32GB card and set-up
everything.
- There is a potential issue with zero/sign extension based VRP.
- 254.gap goes into infinite loop. Investigating it.
- checked VRP for improvement of zero/sign extension (missing case
in CRC).
== Plan==
- http://cards.linaro.org/browse/TCWG-14
- Find the cause for 254.gap infinite loop and fix it.
- Find a solution to missing case in CRC
Summary:
* Enhance Linaro crosstool-ng.
Details:
1. Work with Bero to release 4.8 binary build.
2. Update Linaro crosstool-ng to use ISL/CLooG for 4.8 build (lp:1172595).
3. Rebase conditional compare experimental codes to lp:gcc-linaro/4.8.
Plan:
* Investigate the impact of conditional compare on optimizations.
Planned leaves:
* 29 April - 1 May: Labor Day's holiday.
Best Regards!
-Zhenqiang
== Issues ==
* None
== Progress ==
* Libunwind AArch64 support:
- Fixed signal frame issue.
- Sent patch upstream for review.
- Delivered patch to OE team for early testing.
* LRA on ARM and AArch64:
- Start to look at what is missing.
== Plan ==
* 3 days off next week
* Continue on LRA.
Hi,
I need following packages for ARMv8 (aarch64) target. Where can I find
these packages? Or do I have to download source code and compile those
using linaro-cross-compiler?
libqt4-dev libqt4-opengl-dev libphonon-dev libicu-dev libsqlite3-dev
libxext-dev libxrender-dev gperf libfontconfig1-dev libphonon-dev
libpng12-dev libjpeg62-dev
Thanks
Aparna
== Progress ==
* Benchmarks
- Running EEMBC on a Panda
- LLVM on par with GCC in code size and run time
* Release Planning
- Calxeda busted, delays, but got test-suite running on it
- Bootstrap and test-suite fail with atomic support, investigating
- Preparing a Beagleboard for conscience relief
- Coordinating with other parties on hardware/testing/roles
* EuroLLVM 2013
- Meetings, badges, preparations, final run
* Support
- Helping folks with test-suite, buildbots, reviewing patches, etc
== Issues ==
Broke my glasses on a place impossible to fix, had to resort to epoxy while
I wait for an eye test
== Plan ==
* EuroLLVM Mon~Tue
* Continue setting up release hardware/process, order some more boards
* Help Sylvestre/Galina setting up Jenkins/Buildbots for release
* Try to run a more substantial benchmark
* Fix my glasses
== Progress ==
* Disable-peeling: had to re-spawn benchmark jobs (both reference and
updated patch)
* Libsanitizer: updated patch running under cbuild before updating my
proposal upstream.
* Neon intrinsics:
- some progress on removing unnecessary moves around vuzp.
- there are still some around veor
* Bi-endian compiler: read article, attended call
* Internal support
== Next ==
Holidays next week
== Future ==
* Disable peeling: analyze results
* Revert-coalesce: same
* Libsanitizer: sent updated patch upstream if validation OK
* Neon intrinsics: continue improving crc with vuzp
== Progress ==
* Submitted binutils patch for testsuite failure on precise.
* Updated glibc memcpy patch based on feedback.
* Updated binutils IFUNC patch based on feedback.
* Started working on AArch64 IFUNC.
* Submitted a couple of cleanup patches for AArch64 binutils.
== Issues ==
* 2 cards blocked on upstream review, 1 blocked on Android team.
== Plan ==
* Should get binutils IFUNC patch committed Monday.
* Need to ping other patches again.
* More work on AArch64 IFUNC.
--
Will Newton
Toolchain Working Group, Linaro
Progress:
* office move
* VIRT-49:
** confirmed I can run KVM on the Arndale, started using it as
test platform for the migration work
** I have most of the code for cp15 register migration written
** in debug phase; there is a case I hadn't considered that needs a
little thought
Plans:
* keep pushing on with VIRT-49
* book travel/hotel for Connect Dublin
* office move unpacking
-- PMM
Hi.
First.
#include <Im-doing-something-somewhat-odd.h>
I'm trying to use a current clang/llvm (current as in git checkout
from just the other day) to build an opencl kernel and then link that
with some code which has been compiled with gcc/g++.
When the clang .o is linked to the gcc/gcc+, I'm getting
/home/tgall/opencl/SNU/tmp2/cl_temp_1.tkl uses VFP register arguments,
/home/tgall/opencl/SNU/tmp2/cl_temp_1.o does not
the cl_temp_1.o was produced with clang.
the cl_temp_1.tkl via gcc/g++.
Let's dive into details.
This is following in the footsteps of an open source framework called
SNU which implements OpenCL. Within SNU they had a fairly old version
of clang+llvm which wouldn't even build on ARM so step one has been to
figure out what SNU was doing with clang and replicate this using
latest clang.
So given the following minimal test kernel placed into cl_temp_1.cl
/* Header to make Clang compatible with OpenCL */
#define __global __attribute__((address_space(1)))
int get_global_id(int index);
/* Test kernel */
__kernel void test(__global float *in, __global float *out) {
int index = get_global_id(0);
out[index] = 3.14159f * in[index] + in[index];
}
then we following the following steps:
clang -mfloat-abi=hard -mfpu=neon -S -emit-llvm -x cl
-I/home/tgall/opencl/SNU/src/compiler/tools/clang/lib/Headers
-I/home/tgall/opencl/SNU/inc -include
/home/tgall/opencl/SNU/inc/comp/cl_kernel.h
/home/tgall/opencl/SNU/tmp2/cl_temp_1.cl -o
/home/tgall/opencl/SNU/tmp2/cl_temp_1.ll
with the resulting cl_temp_1.ll we:
llc /home/tgall/opencl/SNU/tmp2/cl_temp_1.ll
which results in cl_temp_1.s. Then:
clang -c -mfloat-abi=hard -mfpu=neon -o
/home/tgall/opencl/SNU/tmp2/cl_temp_1.o
/home/tgall/opencl/SNU/tmp2/cl_temp_1.s
so now in theory we should have a perflectly good cl_temp_1.o ready for linking.
But first let's get the bits ready that will be built by the
traditional gnu toolschain. We have:
gcc -shared -fPIC -O3 -o /home/tgall/opencl/SNU/tmp2/cl_temp_1_info.so
/home/tgall/opencl/SNU/tmp2/cl_temp_1_info.c
and
gcc -shared -fPIC -march=armv7-a -mtune=cortex-a9 -mfloat-abi=hard
-mfpu=neon -fsigned-char -DDEF_INCLUDE_ARM -I. -I
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu -I
/home/tgall/opencl/SNU/src/runtime/include -I
/home/tgall/opencl/SNU/src/runtime/core -I
/home/tgall/opencl/SNU/src/runtime/core/device -I
/home/tgall/opencl/SNU/src/runtime/hal -I
/home/tgall/opencl/SNU/src/runtime/hal/device -DTARGET_MACH_CPU -O3 -c
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/hal.c -o
/home/tgall/opencl/SNU/tmp2/hal.o
And here we try to link it all together.
g++ -shared -fPIC -march=armv7-a -mtune=cortex-a9 -mfloat-abi=hard
-mfpu=neon -fsigned-char -DDEF_INCLUDE_ARM -O3 -o
/home/tgall/opencl/SNU/tmp2/cl_temp_1.tkl
/home/tgall/opencl/SNU/tmp2/hal.o
/home/tgall/opencl/SNU/tmp2/cl_temp_1.o
-L/home/tgall/opencl/SNU/lib/lnx_arm
-lsnusamsung_opencl_builtin_lnx_arm -lpthread -lm
and bang we're back to the error I first mentioned:
/usr/bin/ld: error: /home/tgall/opencl/SNU/tmp2/cl_temp_1.tkl uses VFP
register arguments, /home/tgall/opencl/SNU/tmp2/cl_temp_1.o does not
so first obvious question is -mfloat-abi=hard -mfpu=neon correct for clang?
tgall@miranda:~/opencl/SNU/tmp2$ clang --version
clang version 3.3
Target: armv7l-unknown-linux-gnueabihf
Thread model: posix
Thanks for any suggestions!
--
Regards,
Tom
"Where's the kaboom!? There was supposed to be an earth-shattering
kaboom!" Marvin Martian
Tech Lead, Graphics Working Group | Linaro.org │ Open source software
for ARM SoCs
w) tom.gall att linaro.org
h) tom_gall att mac.com
The Linaro Toolchain and Platform Working Groups are pleased to announce
the 2013.04 release of the Linaro Toolchain Binaries, a pre-built version
of Linaro GCC and Linaro GDB that runs on generic Linux or Windows and
targets the glibc Linaro Evaluation Build.
This will likely be the last binary release based on gcc 4.7 -- it also
introduces the first gcc 4.8 based build.
Uses include:
* Cross compiling ARM applications from your laptop
* Remote debugging
* Build the Linux kernel for your board
What's included:
* Linaro GCC 4.7 2013.04 and Linaro GCC 4.8 2013.04
* Linaro GDB 7.5 2012.12
* A statically linked gdbserver
* A system root
* Manuals under share/doc/
The system root contains the basic header files and libraries to link your
programs against.
Interesting changes include:
* gcc is updated to 4.8 (in the 4.8 builds)
* rpc support in eglibc is re-enabled
* Version reported by ARMv7 and AArch64 cross toolchains has been unified
The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian 6.0.2,
Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation 5.7 and
later, and should run on any Linux Standard Base 3.0 compatible
distribution. Please see the README about running on x86_64 hosts.
The Windows version is supported on Windows XP Pro SP3, Windows Vista
Business SP2, and Windows 7 Pro SP1.
The binaries and build scripts are available from:
https://launchpad.net/linaro-toolchain-binaries/trunk/2013.04
Need help? Ask a question on https://ask.linaro.org/
Already on Launchpad? Submit a bug at
https://bugs.launchpad.net/linaro-toolchain-binaries
On IRC? See us on #linaro on Freenode.
Other ways that you can contact us or get involved are listed at
https://wiki.linaro.org/GettingInvolved.
Summary:
* ARM internal training and R/M toolchain related work.
* Investigate Linaro toolchain 4.8 build issues.
Details:
1. Fix several linaro toolchain 4.8 binary build issues:
* nls patch need be updated to add (char *) when assigning the
result of xmalloc to a char*.
* gcc build pass-2 need build libbacktrace (get patch from
crosstool-ng upstream).
* gcc build pass-2 build with "-j4" fail. Seams build order issue. A
workaround is to remove "-j4".
* Mingw32 confiugre fail due to missing ISL. A workaround is to add
"--without-isl"
Plan:
* Work with Bero to release 4.8.
* Swith to ISL/CLooG for future release.
Best Regards!
-Zhenqiang
I couldn't find the arm-none-eabi- bare metal version of Linaro GCC 4.8. Please provide the link for prebuilt baremetal tool chain binaries?
-Sugumar
-- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Paul,
I've been having some thoughts about CBuild and Lava and the TCWG
integration of them both. I wish to share them and open them up for general
discussion.
The background to this has been the flakiness of the Panda's (due to heat),
the Arndale (due to board 'set-up' issues), and getting a batch of Calxeda
nodes working.
The following discussion refers to building and testing only, *not*
benchmarking.
If you look at http://cbuild.validation.linaro.org/helpers/scheduler you
will see a bunch of calxeda01_* nodes have been added to CBuild. After a
week of sorting them out they provide builds twice as fast as the Panda
boards. However, during the setup of the boards I came to the conclusion
that we set build slaves up incorrectly, and that there is a better way.
The issues I encountered were:
* The Calxeda's run quantal - yet we want to build on precise.
* Its hard to get a machine running in hard-float to bootstrap a
soft-float compiler and vice-versa.
* My understanding of how the Lava integration works is that it runs the
cbuild install scripts each time, and so we can't necessarily reproduce a
build if the upstream packages have been changed.
Having thought about this a bit I came to the conclusion that the simple
solution is to use chroots (managed by schroot), and to change the
architecture a bit. The old architecture is everything is put into the main
file-system as one layer. The new architecture would be to split this into two:
1. Rootfs - Contains just enough to boot the system and knows how to
download an appropriate chroot and start it.
2. Chroots - these contain a setup build system that can be used for
particular builds.
The rootfs can be machine type specific (as necessary), and for builds can
be a stock linaro root filesystem. It will contain scripts to set the users
needed up, and then to download an appropriate chroot and run it.
The chroot will be set up for a particular type of build (soft-float vs
hard-float) and will be the same for all platforms. The advantage of this
is that I can then download a chroot to my ChromeBook and reproduce a build
locally in the same environment to diagnose issues.
The Calxeda nodes in cbuild use this type of infrastructure - the rootfs is
running quantal (and I have no idea how it is configured - it is what Steve
supplied me with). Each node then runs two chroots (precise armel and
precise armhf) which take it in turns to ask the cbuild scheduler whether
there is a job available.
So my first question is does any of the above make sense?
Next steps as I see it are:
1. Paul/Dave - what stage is getting the Pandaboards in the Lava farm
cooled at? One advantage of the above architecture is we could use a stock
Pandaboard kernel & rootfs that has thermal limiting turned on for builds,
so that things don't fall over all the time.
2. Paul - how hard would it be to try and fire up a Calxeda node into
Lava? We can use one of the ones assigned to me. I don't need any fancy
multinode stuff that Michael Hudson-Doyle is working on - each node can be
considered a separate board. I feel guilty that I put the nodes into CBuild
without looking at Lava - but it was easier to do and got me going - I think
correcting that is important
3. Generally - What's the state of the Arndale boards in Lava? Fathi has
got GCC building reliably, although I believe he is now facing networking
issues.
4. Paul - If Arndale boards are available in Lava - how much effort would
it be to make them available to CBuild?
One issue the above doesn't solve as far as I see it is being able to say to
Lava that we can do a build on any ARMv7-A CBuild compatible board. I don't
generally care whether the build happens on an Arndale, Panda, or Calxeda
board - I want the result in the shortest possible time.
A final note on benchmarking. I think the above scheme could work for
benchmarking targets all we need to do is build a kernel/rootfs that is
setup to provide a system that produces repeatable benchmarking results.
Comments welcome from all.
Thanks,
Matt
--
Matthew Gretton-Dann
Toolchain Working Group, Linaro
== Progress ==
* Disable-peeling: waiting for reference job results
* Libsanitizer:
- identified the reason for different behaviour on board and on simulator
- proposed a workaround on gcc-patches (qemu-user has a few
limitations, so it's desirable to skip some libsanitizer tests)
- in the mean time libsanitizer developers received similar concerns
from android, and are considering a runtime environment variable to
control use of stderr
* Neon intrinsics:
- resumed investigation on vuzp crc
* Internal support
== Next ==
* Peeling: analyze results when available
* Revert-coalesce: same
* Libsanitizer: reach agreement with upstream
* Neon intrinsics: continue with vuzp crc
== Progress ==
* Further work on glibc memcpy IFUNC patch based on review.
* Ported libdwarf to aarch64 and submitted upstream.
* Disabled gold build in binutils cbuild job and created a gold job.
* Investigated binutils testsuite failure on precise.
* On leave Friday.
== Issues ==
* None.
== Plan ==
* Submit a patch for binutils testsuite failure on precise.
* Complete work on glibc memcpy iFUNC patch.
* Follow up binutils IFUNC patch.
* AArch64 IFUNC next...
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Completed investigation of GDB dwarf test suite failures on ARM.
Almost all failures will be fixed with small updates to test cases
assembly language files.
* Checked-out GDB 7.6 branch and did comparison of dwarf test case failures
on arm. Some test cases have been updated already and dont need a patch.
* Started filtering GDB test suite results on ARM for possible failures due
to assembly language incompatibility.
* Tried some experimentation with cbuild, and ec2 instances only to find
out they are not connected with lab.
* Completed Ireland Visa process. Spent Friday and most part of Thursday
for the documents attestation, fee submission and postage stuff.
*** Still No blue-print available to log work in JIRA.
== Plan ==
* Filter all arm assembly language compatibility updates required to gdb
test suite and create a patch.
* Get an intro to gdb patch submission process for a possible fix to gdb
test suite for arm assembly compatibility.
* Start looking into gdb.mi test suite failures on arm.
* Fill up the arm native vs arm remote comparison sheet.
* Figure out a way to use hackbox for gdb testing on arm.
== Progress ==
Very short week, was doing some AMD internal tasks and attend local meetings.
* gprof support work for Aarch64.
Not much progress this week.
Working on GCC side to support gprof for Aarch64.
== Plan ==
* Continue gprof support work for Aarch64
== Summary ==
- http://cards.linaro.org/browse/TCWG-13
- performance regression is due to alignment of function.
- there is an increase in runtime of core_state_transition even
though there is no difference in the code generated with the patch
- Adding nops seems to improve the locality and performance; it gets
better than without the patch for THUMB2.
- Get spec2000 results for http://cards.linaro.org/browse/TCWG-14 to
decide on the next step
- Couldn’t get SPEC2000 results with CBUILD
- set-up spec benchmarks in chromebook and now running locally.
-
https://blueprints.launchpad.net/gcc-linaro/+spec/better-end-of-loop-counte…
- Initial investigation shows that the code generated is same as
expected.
== Plan ==
- http://cards.linaro.org/browse/TCWG-13 - follow it up
- Get spec2000 results for http://cards.linaro.org/browse/TCWG-14 to
decide on the next step
- Look for improvement in VRP for zero/sign extension
== Progress ==
* Running around JM/lencode bug
- caused by a codegen opt (ICMP fold) that had repercussions only on A9
and A15 code generation
- spent three days trying to reduce the case when the problem fixed itself
miraculously >:(
* Planning for the future
- Agreeing on short-term plans for Q2
* Buildbot
- Working on self-hosting bot
- Moved local buildmaster to hackbox
* Investigating LLVMLinux
- Building Android kernel with LLVM
- Investigating breakage in Debug mode
== Plans ==
* Continue self-hosting bot
* Try running a CBuild benchmark with LLVM
* Start putting up together the infrastructure for release 3.3
* Try to extract useful information from perf database
Progress:
* qemu maintenance
** sent arm-devs and target-arm pullreqs now we're in softfreeze
* VIRT-4
** received Arndale board, confirmed it works (took several
hours mostly due to bonkers power switch design)
** VIRT-49
*** making progress; updated card with a list of sub-subtasks
Plans:
* keep pushing on with VIRT-49
* finish config of arndale board, test running KVM on it
* book travel/hotel for Connect Dublin
* office move Fri 26/Mon 29
-- PMM
All,
http://cbuild.validation.linaro.org/helpers/recent was reporting an Internal
Server Error earlier today, and after looking at the logs the resultant
cause was because the gcc-4.8+svn198079 Lava job
(https://validation.linaro.org/lava-server/scheduler/job/52224) decided that
it was an a9 (as opposed to a9hf) job and that it didn't no which version of
Ubuntu it was running on.
The caused the logs to be put in
http://cbuild.validation.linaro.org/build/gcc-4.8+svn198079/logs/armv7l--cb…
The tcwg-web app then fell over because it couldn't pass the
armv7l--cbuild-panda-es06-cortexa9r1 name.
I fixed the issue by manually renaming the build log directory to:
http://cbuild.validation.linaro.org/build/gcc-4.8+svn198079/logs/armv7l-pre…
And once the cron job which scans the builds had run everything now works.
Actions:
1. Paul - do you mind taking a look at the build and seeing what went wrong
- my initial cursory glance makes me believe its the board having heat
issues causing random things to happen.
2. Paul & Matt - Looking at the code (and from something else Michael said
to me last week) I think having hostnames with '-' characters in them will
confuse the cbuild interface. I propose changing cbuild to do a s/-/_/g on
all the hostname it reads as a workaround. I don't plan on changing actual
hostnames of boards. Paul is this going to cause a problem for you in Lava?
Thanks,
Matt
--
Matthew Gretton-Dann
Toolchain Working Group, Linaro
Hi,
Some time ago I had some problems linking my project libraries for
Android using the Linaro toolchain 4.7.1 which I reported to the
list:
http://lists.linaro.org/pipermail/linaro-toolchain/2012-June/002631.html
I ended up using the 4.6.x version of the compiler because
I could not find a fix and I did not get any hints from
the mailing list.
Now I need to really switch to 4.7(for better C++11 support)
but I'm pretty much having the same issue with the 4.7.3 version:
E.g.
System/Logging/DroidLogger.cpp.o: requires unsupported dynamic reloc
R_ARM_REL32; recompile with -fPIC
/home/dev/android/android_linaro_toolchain_4.7/bin/../libexec/gcc/arm-linux-androideabi/4.7.3/real-ld:
error:
/home/marius/Development/ToolChains/Android/experimental_ndk/sources/cxx-stl/gnu-libstdc++/4.7.3/libs/armeabi-v7a/libsupc++.a(eh_globals.o):
requires unsupported dynamic reloc R_ARM_REL32; recompile with -fPIC
/home/dev/android/android_linaro_toolchain_4.7/bin/../libexec/gcc/arm-linux-androideabi/4.7.3/real-ld:
error: hidden symbol '__dso_handle' is not defined locally
/home/dev/android/android_linaro_toolchain_4.7/bin/../libexec/gcc/arm-linux-androideabi/4.7.3/real-ld:
error: hidden symbol '__dso_handle' is not defined locally
I'm using it with the Android NDK version r8e.
I have downloaded the prebuilt binaries:
android-toolchain 4.7 (ICS, JB) <http://www.linaro.org/downloads/> 4.7-2013.03
13.03
(Linaro GCC 4.7-2013.03) 4.7.3 20130226 (prerelease)
Does anyone have any hints on how to overcome the above mentioned problem?
--
Marius Cetateanu | Software Engineer
T +32 2 888 42 60
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E mce(a)softkinetic.com
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Hi Matt,
This week I found an error in LLVM that can only be reproduced on ARM
hardware, if the GCC that compiles it specifies --mcpu=cortex-a15. The
error is a segfault on one of the tests compiled by that Clang/LLVM. As you
can see, it's not something trivial that we'd expect people to do easily.
My question is: How do we tackle this type of bug?
One option is to do all the debugging and interface with the original patch
author until we fix the problem. This works well for simple bugs, but in
this case I'm not sure it will work.
Another option was to have a board on Linaro's DMZ with no access to
anything else internally, so that people could log in and debug the problem
in situ.
This board would have to be setup just for the debugging with a random
password given only to the author of the patch and cleaned up right after
the bug is fixed (to avoid external abuse).
We could use the same board for LLVM, GCC, GDB, etc. but it should be easy
to re-flash it to a minimum system, so that we don't spend too much time
setting it up.
Does anyone have a better idea?
cheers,
--renato
Hi,
Feel free to point me at a newer toolchain. Was building the SNU
OpenCL SDK native on my chromebook running ubuntu raring when I hit
the following:
make: Entering directory `/home/tgall/opencl/SNU/src/runtime/build/cpu'
arm-linux-gnueabihf-g++ -fsigned-char -march=armv7-a -mfloat-abi=hard
-mfpu=neon -ftree-vectorize -ftree-vectorizer-verbose=0 -fsigned-char
-fPIC -DDEF_INCLUDE_ARM -g -c -o smoothstep.o
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/common/smoothstep.c
-I/home/tgall/opencl/SNU/inc
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/async
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/atomic
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/common
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/conversion
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/geometric
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/integer
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/math
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/reinterpreting
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/relational
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/vector -O0 -g
In file included from
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/cl_cpu_ops.h:47:0,
from
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/common/smoothstep.c:34:
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/type/cl_ops_floatn.h:
In function 'float2 operator-(float, float2)':
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/type/cl_ops_floatn.h:114:1:
internal compiler error: output_operand: invalid operand for code 'P'
Please submit a full bug report,
with preprocessed source if appropriate.
See <file:///usr/share/doc/gcc-4.7/README.Bugs> for instructions.
Preprocessed source stored into /tmp/cciluYVq.out file, please attach
this to your bugreport.
Traceback (most recent call last):
File "/usr/share/apport/gcc_ice_hook", line 34, in <module>
pr.write(open(apport.fileutils.make_report_path(pr), 'w'))
File "/usr/lib/python2.7/dist-packages/problem_report.py", line 254, in write
self._assert_bin_mode(file)
File "/usr/lib/python2.7/dist-packages/problem_report.py", line 632,
in _assert_bin_mode
assert (type(file) == BytesIO or 'b' in file.mode), 'file stream
must be in binary mode'
AssertionError: file stream must be in binary mode
make: *** [smoothstep.o] Error 1
tgall@miranda:~/opencl/SNU$ arm-linux-gnueabihf-g++ --version
arm-linux-gnueabihf-g++ (Ubuntu/Linaro 4.7.2-23ubuntu2) 4.7.3
I've attached the preprocessed source as well.
FWIW, I don't hit this when building with -O3. In this case I was
compiling for debug.
Thanks!
--
Regards,
Tom
"Where's the kaboom!? There was supposed to be an earth-shattering
kaboom!" Marvin Martian
Tech Lead, Graphics Working Group | Linaro.org │ Open source software
for ARM SoCs
w) tom.gall att linaro.org
h) tom_gall att mac.com
== Progress ==
* Disable-peeling:
- some benchmarking jobs ran, thanks to the new boards in cbuild.
- Spawned other jobs for reference
* Libsanitizer:
- Built native GCC on snowball to understand the isatty() behaviour
compared to qemu.
* Neon intrinsics codegen:
- resumed looking at the vuzp crc example from Steve Capper.
* Neon intrinsics codegen:
- added fp16 support (works with RVCT, GCC does not support it yet)
* Internal support
== Next ==
* Disable-peeling: analyze results when available.
* Revert-coalesce-vars: idem.
* Libsanitizer: analyze isatty() on board
* Neon intrinsics: continue with vuzp example.