I've set up a new user on my laptop that we can use for experimenting
with benchmarks during Connect. Here's what we've got:
* A user called 'connect'
* Ramana, Ulrich, Åsa, and myself can log in via SSH
* bzr repo for trunk, 4.6, and gcc-linaro 4.6
* Tarballs of all gcc-linaro 4.4, 4.5, and 4.6 releases
* Tarballs of the recent CSL, Google 4.6, and Android 4.4 compilers
* A sysroot in ~/sysroot
* Cross-binutils etch in ~/cross
* A shared ccache in ~/ccache primed with these
* A ~/env.sh that sets up the right paths etc
* A ~/builds/doconfigure.sh that configures for our standard ARMv7-A
C/C++/Fortran configuration
* EEMBC, DENBench, and SPEC 2000 under ~/benchmarks
The trees under build/ build into build/$ver/build and install into
build/$ver/install.
The benchmarks are set up to cross build and cross run. I've pulled
ursa2 out of the farm and nuked it, so we can do something like:
make CROSS_COMPILE=arm-linux-gnueabi- RUN="$PWD/sshrun ursa2"
to run the benchmarks.
I'll see about perf. We still need to re-baseline the benchmarks and
get perf traces.
Anything else needed?
You can log in and try things if you want. Go through the bounce host
and try connecting as connect@crucis.
-- Michael
Hi Ramana,
as you pointed out, in the gcc.dg/vect/vect-double-reduc-6.c test case,
using compiler options as described in PR 51819, we see the following
inefficient code generation:
vmov.32 r2, d28[0] @ 57 vec_extractv4si [length = 4]
vmov.32 r1, d22[0] @ 84 vec_extractv4si [length = 4]
str r2, [r0, #4] @ 58 *thumb2_movsi_vfp/7 [length =
4]
vmov.32 r3, d0[0] @ 111 vec_extractv4si [length = 4]
str r1, [r0, #8] @ 85 *thumb2_movsi_vfp/7 [length =
4]
vst1.32 {d2[0]}, [r0:64] @ 31 neon_vst1_lanev4si
[length = 4]
str r3, [r0, #12] @ 112 *thumb2_movsi_vfp/7 [length =
4]
bx lr @ 120 *thumb2_return [length = 12]
(The :64 alignment in vst1.32 is incorrect; that is that actual problem in
PR 51819, which is now fixed.)
The reason for this particular code sequence turns out to be as follows:
The middle end tries to store the LSB vector lane to memory, and uses the
vec_extract named pattern to do so. This pattern currently only supports
an "s_register_operand" destination, and is implemented via vmov to a core
register. The contents of that register are then stored to memory. Now
why does any vst1 instruction show up? This is because combine is able to
merge the vec_extract back into the store pattern and ends up with a
pattern that matches neon_vst1_lanev4si. Note that the latter pattern is
actually intended to implement NEON built-ins (vst1_lane_... etc).
Now there seem to be two problems with this scenario:
First of all, the neon_vst1_lane<mode> patterns seem to be actually
incorrect on big-endian systems due to lane-numbering problems. As I
understand it, all NEON intrinsics are supposed to take lane numbers
according to the NEON ordering scheme, while the vec_select RTX pattern is
defined to take lane numbers according to the in-memory order. Those
disagree in the big-endian case. All other patterns implementing NEON
intrinsics therefore avoid using vec_select, and instead resort to using
special UNSPEC codes -- the sole exception to this happens to be
neon_vst1_lane<mode>. It would appear that this is actually incorrect, and
the pattern ought to use a UNSPEC_VST1_LANE unspec instead (that UNSPEC
code is already defined, but nowhere used).
Now if we make that change, then the above code sequence will contain no
vst1 any more. But in any case, expanding first into a vec_extract
followed by a store pattern, only to rely on combine to merge them back
together, is a suboptimal approach. One obvious drawback is that the
auto-inc-dec pass runs before reload, and therefore only sees plain stores
-- with no reason whatsoever to attempt to introduce post-inc operations.
Also, just in general it normally works out best to allow the final choice
between register and memory operands to be make in reload ...
Therefore, I think the vec_extract patterns ought to support *both*
register and memory destination operands, and implement those via vmov or
vst1 in final code generation, as appropriate. This means that we can make
the choice in reload, guided as usual by alternative ordering and/or
penalties -- for example, we can choose to reload the address and still use
vst1 over reloading the contents to a core register and then using an
offsetted store.
Finally, this sequence will also allow the auto-inc-dec pass to do a better
job. The current in-tree pass doesn't manage unfortunately, but with
Richard's proposed replacement, assisted by a tweak to the cost function to
make sure the (future) address reload is "priced in" correctly, I'm now
seeing what appears to be the optimal code sequence:
vst1.32 {d6[0]}, [r0:64]! @ 30 vec_extractv4si/1
[length = 4]
vst1.32 {d22[0]}, [r0]! @ 56 vec_extractv4si/1 [length =
4]
vst1.32 {d2[0]}, [r0:64]! @ 82 vec_extractv4si/1
[length = 4]
vst1.32 {d4[0]}, [r0] @ 108 vec_extractv4si/1 [length =
4]
bx lr @ 116 *thumb2_return [length = 12]
(Again the :64 is wrong; it's already fixed on mainline but I haven't
pulled that change in yet.)
The attached patch implements the above-mentioned changes. Any comments?
I'll try to get some performance numbers as well before moving forward with
the patch ...
(As an aside, it might likewise be helpful to update the vec_set patterns
to allow for memory operands, implemented via vld1.)
(See attached file: diff-gcc-arm-vecextractmem)
B.t.w. I'm wondering how I can properly test:
- that the NEON intrinsics still work
- that everything works on big-endian
Any suggestions would be appreciated!
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzende des Aufsichtsrats: Martina Koederitz | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Hi Andrew. gcc-4.7~svn183693 just finished running through the auto
builders and builds and tests in the ARM, Cortex-A9, i686, and x86_64
configurations.
You could base the Linaro 4.7 branch off that. It's r114897 in bzr
and, suitably, Sandra is the author.
-- Michael
For your records:
Loïc wrote a script that pushes the revisions from a GCC branch into
the current development focus. This makes branching on a shared
repository much faster. The script is here:
http://bazaar.launchpad.net/~linaro-toolchain-dev/cbuild/tools/view/head:/e…
and it runs daily on a cronjob as the cbuild user on the 'apus' EC2
instance (phew).
We'll need to update this when 4.7 comes along.
-- Michael
I've gone through the documentation on the wiki about how to get
going with KVM on Fast Models, to clean it up and reorganise it
and add some of the missing bits (notably how to set up a KVM
guest kernel and filesystem). It's now at:
https://wiki.linaro.org/PeterMaydell/KVM/HowTo
The only minor point I'd still like to address is that at the
moment we document the old-style "build your kernel and arguments
into an .axf file" boot-wrapper, because my changes to support
specifying them at model runtime haven't yet gone into the
boot-wrapper git repo. When they do land I'll update the wiki.
(Yes, technically TCWG2011-A15-KVM says "one page summary" but
I thought splitting it into four pages was much clearer :-))
-- PMM
Ken, Åsa: could you add a -O0 and -O1 build to the size and benchmark
results? I'm looking at the writeup and it would be interesting to
contrast the speed/size of -O0 with -O2.
Ta,
-- Michael
Continued work on 64-bit shifts in core registers. This has now been
posted to gcc-patches, and is awaiting review.
64-bit shifts in NEON are also working correctly, but the register
allocator chooses not to use them most of the time. I've begun trying to
work out why, but it's quite involved in ira-costs.c and will take some
unpicking, I think.
Attempted to create a Linaro GCC 4.7 branch, but my test build failed,
so that'll have to wait until it's stabilized a little.
Hi Marcin, Ricardo. How is the work on pre-built sysroots coming
along? I'd like to use/reference them in the next binary toolchain
release.
I'm looking for:
* Scripts that produce the sysroots
* A README that covers what they contain and how to reproduce them
* Test plan
* An official tagged branch holding the above
* A tarball release of the above
* A tarball release of the different sysroots
* Done in a way so they easily integrate with the binary builds[1]
and are useful to others as a sysroot
* Relocatable
* Usable on win32 and Linux
all hosted somewhere. Zhenqiang and I can test and give you feedback.
For reference, here's the README for the binary builds:
http://launchpadlibrarian.net/90998258/README.txt
Here's the simple script I used to make a libc only sysroot:
http://bazaar.launchpad.net/~linaro-toolchain-dev/crosstool-ng/linaro/view/…
I used chdist as I don't know multistrap. I guessed and added
build-dep support to download the build dependencies. It also fixes
up the absolute symlinks to relative.
-- Michael
[1] https://launchpad.net/linaro-toolchain-binaries
==Progress===
* Fixed PR48308 on FSF trunk. Needs backporting to FSF GCC 4.6 branch
* Fixed a number of failing testcases on trunk.
* Read up on Partial-partial PRE . Slow progress but getting a handle
on the theory now. A couple of approaches being benchmarked . Still
slow progress.
* Debugged Andrew's issues with 64 bit shifts. Nice that skype screen
sharing works well on Ubuntu.
* Started notes for Connect 2012.q1.
* Looked into the strd / strexd failure on the testcase in trunk.
Looked at a small patch to implement sync_lock_releasedi for ARM but
needs some more time and effort. Filed issue
https://bugs.launchpad.net/gcc-linaro/+bug/922474
=== Plans ===
* Finish 1x AFDS
* Continue with partial-partial PRE .
* Finish backport of fix for PR50313 to appropriate branches
* Start preparing for Connect 2012.q1
* Do something about the PGO and ABI patches next week.
Absences.
* Feb 6-10 : Linaro Connect Q1.12.
* Feb 13- 18 : Holiday.
Hi,
* libunwind
* reviewed small patch from T. R. of Nokia who provided a
bugfix in case unwind instructions are popping VFP registers
* exchanged mails with P. W. from Bosch who encountered a crash
in case DWARF info is involved
* OpenEmbedded
* changed Qt build to respect the optimization flags
* wrote a script around QEMU to measure the memory footprint
using named pipes to communicate with the serial console of the guest
* rebuilt the minimal, sato and qt4e images using the
gcc-linaro-arm-linux-gnueabi-2012.01-20120125_linux
(optimization levels: -O2, -O3 -fno-tree-vectorize and -O3)
* collected/updated the ELF size and memory footprint results:
*
https://docs.google.com/spreadsheet/ccc?key=0AmsCLxCMnnISdDNQSEM2ZHIxd3dVNj…
*
https://docs.google.com/spreadsheet/ccc?key=0AmsCLxCMnnISdHFtZll0OWdiTlhpdj…
* uploaded the image packs to: http://people.linaro.org/~kwerner/oe-core/
* prepared the environment to build the images using -O1
Regards,
Ken
== GDB ==
* Committed follow-on patch to fix cosmetic issues resulting from
the remote "info proc" patch set.
== GCC ==
* Created 4.6 backport branch including Richard's subreg forward-
propagation branch, the modes-tieable patch, and the combine.c
regression fix, and evaluated for correctness and performance.
Investigation of performance regressions uncovered a problem in
the register allocator: tied subregs (validly) cause somewhat
larger register pressure in certain cases, and this caused the
4.6 IRA to generate spills. Note that the 4.7 IRA is still
able to allocate every pseudo in the very same code; this is
a result of Vladmir's significant IRA rewrite in 4.7 ...
* Investigated Ramana's vld1 patches, and a problem with excessive
vmov's in the PR 51819 test case pointed out by Ramana. It turns
out that when we extract a lane from a vector to memory using an
offsetted address, we move the value through a core register
instead of simply computing the address and using vst1.
I'm working on a patch to address this.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
RAG:
Red:
Amber:
Green:
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-02-20 || ||
||qemu-kvm-getting-started || 2012-03-04?|| 2012-03-04?|| ||
(for blueprint definitions: https://wiki.linaro.org/PeterMaydell/QemuKVM)
Historical Milestones:
||a15-usermode-support || 2011-11-10 || 2011-11-10 || 2011-10-27 ||
||upstream-omap3-cleanup || 2011-11-10 || 2011-12-15 || 2011-12-12 ||
||initial-a15-system-model || 2012-01-27 || 2012-01-27 || 2012-01-17 ||
== cp15-rework ==
* discussions with Rusty
== qemu-kvm-getting-started ==
* wrote patches for the A15 Fast Models boot-wrapper that allow you
to pass the kernel/initrd/kernel command line via a parameter to
the model rather than having to hard code them into an ELF file
along with the boot-wrapper. This should make life a lot easier for
the validation folk.
* various discussions with validation/etc about what you can and
can't do with a model and what the best setup is going to be
* sorted out a Debian fs to use for KVM guest : this is needed because
the kernel module doesn't do Thumb or VFP yet.
* started on rearranging and improving the writeup/HOWTO on the wiki
== other ==
* target-arm/arm-devs queues pushed upstream [Calxeda Highbank model
is now in upstream QEMU]
* helping Will Deacon track down what looks like a race condition in
Linux's handling of VFP on SMP where signal handlers are involved
* a QEMU Object Model patch series has landed upstream -- this will
be a nasty rebase for qemu-linaro next week I think
Hi!
* -o2/-o3 benchmarking:
Worked on and shared charts for the -o2/-o3 benchmark runs with
gcc-linaro-4.6-2012.01. I have created charts for both the score of the
benchmarks and the sizes (text segment) of the executables. Making
improvements continuously as I get feedback from the team.
The charts are stored in GoogleDocs:
https://docs.google.com/a/linaro.org/leaf?id=0B1IP4dZWVaxZOGZlM2UwMGQtOGQyZ…
* gcc4.7 benchmarking:
Did benchmark runs on a late revision of gcc4.7.
Next week I will process the data and list regressions/improvements against
gcc4.6.2 and gcc-linaro-4.6-2012.01.
* v8:
Investigated possibility of running SunSpider stand-alone on the v8 engine.
Found out that there is a stand-alone driver included in WebKit.
Have built v8 on x86 and ARM (on ARM it takes ~18 min) and run SunSpider
and the v8 benchmark suite.
Next step I will try to build with another toolchain. It is not Make but
SCons that controls the build, so I am not sure how to do that.
https://wiki.linaro.org/AsaSandahl/Sandbox/JavaScriptBenchmarks
* Bug triaging:
I have triaged all "easy" ones in the list of new tickets. Michael will
help me look through the rest of new and incomplete bugs which are mostly
old ones (waiting for someone to take some action) or very tricky ones.
Regards
Åsa
On Wed, Jan 25, 2012 at 7:02 AM, Ulrich Weigand
<Ulrich.Weigand(a)de.ibm.com> wrote:
>
> Hi Michael,
>
> GDB 7.4 has finally been released. What do we need to do to get the
> 7.4-branch imported into Launchpad? I think last time (for 7.3) you did
> that somehow ...
Done as:
lp:~linaro-toolchain-dev/gdb/7.4
and documented at:
https://wiki.linaro.org/MichaelHope/Sandbox/GDBImport
-- Michael
Peter, could you review:
https://wiki.linaro.org/WorkingGroups/ToolChain/QEMUARMGuestQ411
please? I'm interesting in anything I've missed or exaggerated. The
audience is the TSC or people outside Linaro who are interested in a
summary of the changes.
-- Michael
Hi Zygmunt. I've enabled the ARM native build on the QEMU auto
builders. These are built in the validation lab on the Natty based
tcpanda boards and end up on control under
~cbuild/cbuild/build/qemu-$version/qemu-$something.tar.xz.
I've uploaded this build to
http://people.linaro.org/~michaelh/incoming/qemu-armv7l-natty-cbuild236-tcp….
There's something wrong with embedding of the version number into the
name. A quick 'does it run' test passes.
Peter, could you check the configure log at:
http://builds.linaro.org/toolchain/qemu-linaro-0~20120118+gitcc8661e/logs/a…
and see if there's anything missing.
The auto builders fire with each commit so there's always something up
to date. You can list the builds at:
http://ex.seabright.co.nz/helpers/buildlog/qemu
and see the raw results at:
http://builds.linaro.org/toolchain/qemu-linaro-0~20120118+gitcc8661e/logs/a…
(after a lag)
-- Michael
---------- Forwarded message ----------
From: Linaro Toolchain Builder <michael.hope+cbuild(a)linaro.org>
Date: Thu, Jan 26, 2012 at 11:14 AM
Subject: [cbuild] qemu-linaro-0~20120118+gitcc8661e armv7l completed
To: "linaro-toolchain-builds(a)lists.launchpad.net"
<linaro-toolchain-builds(a)lists.launchpad.net>
tcpanda05 finished running job qemu-linaro-0~20120118+gitcc8661e on
armv7l-natty-cbuild236-tcpanda05-cortexa9r1.
The results are here:
http://builds.linaro.org/toolchain/qemu-linaro-0~20120118+gitcc8661e
9 PASS 9 TEST
This email is sent from a cbuild (https://launchpad.net/cbuild) based
bot which is administered by Michael Hope <michael.hope(a)linaro.org>.
The Linaro Toolchain Working Group is pleased to announce the release
of the Linaro Toolchain Binaries, a pre-built version of Linaro GCC
and Linaro GDB that runs on generic Linux or Windows and targets the
glibc Linaro Evaluation Build.
This is the first release. Releases will be made each month shortly
after the corresponding source release.
Uses include:
* Cross compiling ARM applications from your laptop
* Remote debugging
* Build the Linux kernel for your board
What's included:
* Linaro GCC 2012.01
* Linaro GDB 2011.12
* A statically linked gdbserver
* A system root
* Manuals under share/doc/
The system root contains the basic header files and libraries to link
your programs against.
The Linux version is supported on Ubuntu 10.04.3 and 11.10, Debian
6.0.2, Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation
5.7 and later, and should run on any Linux Standard Base 3.0
compatible distribution. Please see the README about running on
x86_64 hosts.
The Windows version is supported on Windows XP Pro SP3, Windows Vista
Business SP2, and Windows 7 Pro SP1.
The binaries and build scripts are available from:
https://launchpad.net/linaro-toolchain-binaries/trunk/2012.01
Need help? Ask a question on https://ask.linaro.org/
Already on Launchpad? Submit a bug at
https://bugs.launchpad.net/linaro-toolchain-binaries
On IRC? See us on #linaro on Freenode.
Other ways that you can contact us or get involved are listed at
https://wiki.linaro.org/GettingInvolved.
-- Michael
On Wed, Jan 25, 2012 at 2:33 AM, Ulrich Weigand
<Ulrich.Weigand(a)de.ibm.com> wrote:
>
> Michael, Åsa,
>
> as discussed in today's performance call, the 4.6 backport of Richard's
> sched-pressure enhancements is available here:
> https://code.launchpad.net/~rsandifo/gcc-linaro/alt-sched-pressure-4.6
>
> To activate the feature, you need to use the options:
>
> -fsched-pressure -fsched-pressure-algorithm=model
Åsa, I think we're ready to spawn benchmark jobs through the build
farm. I've made a front end:
http://ex.seabright.co.nz/helpers/scheduler/spawn
to make it a little easier to use. To spawn a benchmark run, enter a
job called benchmarks-<buildname> such as
benchmarks-gcc-linaro-4.6+bzr106857~rsandifo~alt-sched-pressure-4.6
and spawn it into the 'test' queue. See the page for how to change
the flags and benchmarks that are run.
The results end up at:
http://ex.seabright.co.nz/benchmarks/
which needs the password from:
https://wiki.linaro.org/Internal/ToolChain
I've spawned Ulrich's job into the queue as a test run. Let's see how
it goes. If it works, you can spawn the ancestor
(benchmarks-gcc-linaro-4.6+bzr106856) and later do a diffbench on the
results.
-- Michael
Hi,
I am looking at ticket 739305 "[armhf] libffi variadic support"
which still has status "New" for Linaro gcc.
https://bugs.launchpad.net/ubuntu/+source/libffi/+bug/739305
If I understand correctly, David's patch is included in libffi in Oneiric,
but not yet backported to Linaro gcc?
What is the correct thing to do with this ticket for Linaro GCC?
I was thinking it could be set to "Triaged", waiting for an appropriate
time to backport.
Regards
Åsa
Spotted this in a Phoronix article today:
Overall it seems that most of the computational tests are performing
better with the newer Ubuntu 11.10 and 12.04 user-space packages,
which upgrades the GNU Compiler Collection to the 4.6 series over
the 4.5 release found in Ubuntu 11.04. The 4.6 compiler upgrade with
greater ARMv7 architecture enhancements is likely what can be
attributed to most of the performance improvements found in this
article. [...]
See the results for yourself at:
http://www.phoronix.com/scan.php?page=article&item=nvidia_tegra2_ubuntu&num…
Good job,
--
Christian Robottom Reis, Engineering VP
Brazil (GMT-3) | [+55] 16 9112 6430 | [+1] 612 216 4935
Linaro.org: Open Source Software for ARM SoCs
* Linaro
Continued work on 64-bit multiplies. Cleaned up the patches a lot.
Started testing work to check for correctness. Ironed out a few bugs.
My turn for patch review week.
* Other
Spent most of the week in San Diego attending the formerly-known-as
CodeSourcery annual meeting, now Mentor Graphics' ESD TOOLS team annual
meeting.
Mostly bug hunting week with some time on Partial partial PRE.
==Progress===
* Fixed PR50313 - backport submitted to Linaro 4.6 branch for testing
- Testing on FSF GCC 4.6 branch as well currently.
* Followed up on PR48308 fix . No reply yet.
* Triaged some of the test failures that we are currently seeing on
FSF trunk. Reported a few bugs upstream which I think are now fixed.
There are still too many vect failures for my liking ( nearly 30 odd
unique) . Some of them are testisms and some of them probably need a
bit of knowledge in the vectoriser. So could do with a hand here in
case someone has some free time and needs things to look at .
* Read up on Partial-partial PRE . Slow progress but getting a handle
on the theory now.
* Handed over the vld1 / vldm work to Uli - found another case where
the compiler could do better while fixing up PR51819. Essentially in
loop end code where we have cleanup code involving single elements
from the vector, the backend prefers to move this to an integer
register and store the value to memory which is just silly - See
https://pastebin.linaro.org/385
* Fixed PR51819. Backported fix to Linaro 4.6 branch - The FSF 4.6
branch *doesn't* show this particular problem.
=== Plans ===
* Continue with partial-partial PRE .
* Finish submitting PGO patch and ABI tests patch
* Finish backporting PR50313 fix to the correct repositories.
* Follow up on PR48308 and investigate this a bit further.
* Start preparing for Connect 2012.q1
Absences.
* Feb 6-10 : Linaro Connect Q1.12.
* Feb 13- 18 : Holiday.
== GDB ==
* Fixed some final minor issues with remote "info proc".
Committed patch set to implement remote "info proc" (LP #804411)
and remote core file generation (LP #804406) to mainline.
Backported to Linaro GDB 7.3.
== GCC ==
* Created patch to fix optimization failures on x86_64 exposed by
Richard's subreg forward-propagation patch.
* Set up Richard's loop-microbenchmarks suite and verified that the
subreg forward-propagation patch causes no regression anywhere,
and shows measurable improvements on some cases in GCC mainline.
With the Linaro GCC 4.6 backport, results don't look as good;
still investigating the cause.
* Started looking into Ramana's vld1 patches.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Hi,
* hacked the external toolchain recipe to use the latest version of the
binary toolchain
this kind of reverts the multiarch changes since oe doesn't support
it yet
* built the minimal, sato and qt images for armv7-a
in three different flavors (-O2, -O3 -fno-tree-vectorize, -O3)
using gcc-linaro-arm-linux-gnueabi-2012.01-20120112+bzr2318~linux
see: http://people.linaro.org/~kwerner/oe-core/
* encountered that binutils 2.22 (the gas) fails to build with -O3
due to a warning about an unitialized variable
I'm not convinced this is a real bug, I'll look at it as time permits
workaround: --disable-werror
* all nine of them (the images) are booting within qemu using
vexpress_defconfig!
There is one glitche with the mouse pointer:
it doesn't match to the one of the SDL/VNC window as
the guest pointer sometime accelerates faster that the host pointer
I can hardly imagine this is due to miscompiled code
* Extracted size informations about the generated ELF files:
https://docs.google.com/spreadsheet/ccc?key=0AmsCLxCMnnISdDNQSEM2ZHIxd3dVNj…
Regards,
Ken
RAG:
Red:
Amber:
Green: A15 vexpress system model sufficient for KVM guest now done
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-02-20 || ||
||initial-a15-system-model || 2012-01-27 || 2012-01-27 || 2012-01-17 ||
||qemu-kvm-getting-started || 2012-03-04?|| 2012-03-04?|| ||
(for blueprint definitions: https://wiki.linaro.org/PeterMaydell/QemuKVM)
Historical Milestones:
||a15-usermode-support || 2011-11-10 || 2011-11-10 || 2011-10-27 ||
||upstream-omap3-cleanup || 2011-11-10 || 2011-12-15 || 2011-12-12 ||
== cp15-rework ==
* some (slow) progress on this
* made a list of the missing pieces in my current patchset and
knocked off a few of the easier ones
* fortunately this blueprint isn't really a critical blocker for
KVM work any more
== initial-a15-system-model ==
* vexpress-a15 now submitted upstream (in review) and in qemu-linaro
* ...so this blueprint is complete
* NB: doesn't boot in KVM but this is a trivial kernel-side issue
== other ==
* this category seems to take most of my time :-(
* patch review: still Calxeda, Samsung
* patch review: softfloat type fixes
* identified some bugs in softfloat and arm code that surface if a
softfloat type is 64 bits (at the moment it is 32 bits in practice
but it is being proposed to widen it)
* wrote up the issues to be solved so somebody else can do qemu-linaro
releases
* got qemu-jeos building for ARM [an attempt at making qemu testing
easier by having an automated "build toolchain/kernel/initrd" setup]
* retested QEMU fused-multiply-accumulate against an A15 FPGA
Hi Åsa. The GCC 4.7 release is coming up and the ARM testsuite shows
a lot of regressions:
http://ex.seabright.co.nz/helpers/testlog/gcc-4.7~svn183205/logs/armv7l-nat…
We've been running three builds a week:
http://ex.seabright.co.nz/helpers/buildlog/gcc-4.7~svn
and can use the result to track down the range of commits where a
fault was introduced or exposed.
Could you please look through the results and narrow down where each
failure appeared? I've uploaded all of the results to:
http://people.linaro.org/~michaelh/incoming/trunks.tar.xz
One way is to look at the testsuite-diff.txt in each build as it
should show the change in test results between one build and the next
but might be incomplete. Another way is to pull the failures out of
gcc-testsuite.txt and do a diff against the previous version.
The output should be a revision range for each of the current failures.
Script it up. Don't do it by hand. I'm not that mean.
Ta,
-- Michael
* Started with bug triaging, looked at four different bugs (including
Michael's example). Challenging, but interesting. Got great help from
Ramana and Andrew.
* -o2/-o3 benchmark runs with gcc-linaro-4.6-2012.01 done. coremark, eembc,
denbench, pybench and spec2000. Uploaded all results
~linaro-toolchain-wg/linaro-toolchain-benchmarks/private-runs. Posted
results for -o2-neon vs -o3-neon-novect. Working on charts including also
-o3-neon and -os. Got a bit too occupied with making the matplotlib charts
look pretty. I will try to get all results posted next week.
* Started the add-sunspider-as-a-benchmark blueprint in the background.
Built the v8-engine stand alone on x86 (just with default options). It has
a sample shell included. You can feed it with .js-files. Tried the v8
benchmark, which also comes with the engine.
Regards
Åsa
Hi all,
I will be out for vacation during Chinese Spring Festival (Jan
21-29, 2012). For emergency, call me at +86-13817948562.
Best regards!
-Zhenqiang
Summary:
* Enhance crosstool-ng build process.
Details:
1. Linaro crosstool-ng patches:
* Update and commit the patch to strip debug sections.
* rm *-cc.exe symblink for win32.
* enable gdb for win32 (lp:918479)
* Update README to add flip dependence for build.
2. Verify the following bugs and change status to "Fix Committed"
* lp:906729 baremetal libc headers and libraries are in inconsistent places
* lP:906077 binaries: baremetal include files are in the wrong place
* lP:894527 binaries: remove all symlinks from the Windows build
* lp:889984 binaries: should step across helper functions
* lp:906662 binaries: pgversion can get out of sync with product
3. Analyzed bugs
* lp:915137 Link failure due to absolute paths: Need more
information to reproduce.
* lp:p18478 wind32 doesn't have pkg-config: Try to build pkg-config
for mingw32 host. But failed since it required preinstalled glib2. And
configure error if cross building the glib.
* lp:894528 binaries: can't run if the patch contains whitespace.
Can not reproduce it on cygwin, but still have issue in DOS cmdline
4. Verify the prerelease binary package on windows. And find and
workaround a gdb document name issue since filename on windows is case
insensitive (lp:909195).
5. Raise the gcc trunk build fail issue to crosstool-ng mail-list. But
not confirm "-EL" is the final root cause. Need more investigation.
Planned Absence:
* Jan 21-29, 2012 Chinese Spring Festival
Best regards!
-Zhenqiang
Hello experts,
I don't know whether this is the place to ask this question.Please forgive
if i am wrong.
I am trying to cross-compile Eglibc,(which i thought is similar to the
glibc) library with Linaro tool chain.My aim is to cross-compile the
library and add it with the tool-chain( i assumed that Linaro doesn't ahve
the eglibc libraries by itself).
.
I referred to the link http://www.eglibc.org/archives/patches/msg00078.html
(README.cross-compiling of the libc) and did the following.
I thought that binutils is not required as the tool chain itself contains
the loader, assembler etc.(which are the most important in the binutils).So
i skipped that step.(i am not sure whether this is right.please correct me
if i am wrong).
I did the below steps as in the above link.
1) Copied the Linux Kernel Headers
2) EGLIBC Headers and Preliminary Objects
2.1) configuring the Eglibc headers by the below steps.
appan@oplt$ ~/cross_compile_eglibc/ppc/obj/eglibc-headers$ BUILD_CC=gcc
CC=/home/appan/cross_compile_eglibc/ppc/tools/bin/arm-linux-gnueabi-gcc
CXX=/home/appan/cross_compile_eglibc/ppc/tools/bin/arm-linux-gnueabi-cpp
AR=/home/appan/cross_compile_eglibc/ppc/tools/bin/arm-linux-gnueabi-ar
RANLIB=/home/appaan/cross_compile_eglibc/ppc/tools/bin/arm-linux-gnueabi-ranlib
/home/appan/cross_compile_eglibc/src/libc/configure
--prefix=/home/appan/CC_EGLIBC
--with-headers=/home/appan/cross_compile_eglibc/ppc/sysroot/usr/include/
--build=i686-pc-linux-gnu --host=arm-unknown-linux-gnu --enable-add-ons
--with-tls --with-__thread
2.2) compilation
make install-headers install_root=$sysroot install-bootstrap-headers=yes
But following is the error i get.
> /home/appan/cross_compile_eglibc/ppc/obj/eglibc-headers/Versions.v.iT<http://versions.v.it/>
In file included from <stdin>:1:0:
ports/sysdeps/arm/nptl/tls.h:48:3: error: #*error "TLS support is required.*
"
make[1]: *** No rule to make target `headers_install'. Stop.
make[1]: Leaving directory `/home/appan/cross_compile_eglibc/src/libc'
make: *** [headers_install] Error 2
I tried googling, but i did not get the solution for this..
please provide me with some suggestions and that will be of great help to
me...
thanks and regards
appan
Hi there!
I need some help with how to handle this bug:
https://bugs.launchpad.net/gcc-linaro/+bug/873977
It looks like an improvement suggestion more than a bug.
Regards
Åsa
*Automatically save preprocessed source on ICE*In order to help with bug
reporting, gcc could save the preprocessed source of the unit that caused
the ICE, so one can just pick it up and attach it to bug reports instead of
trying to reproduce it manually.
Hi Peter. I've had a poke about in qemu-linaro, OpenStack, and
libvirt to get a feel for the KVM integration work. My scratch notes
are here:
https://wiki.linaro.org/MichaelHope/Sandbox/QEMUA15GuestNotes
I'm feeling happy about the integration. The parts that I've seen
have good separation, are architecture neutral, and have some ARM
support. We can prototype using virtual x86 based masters and QEMU
TCG based compute instances.
I've seen a few bugs and assumptions: OpenStack defaults to virtio,
boot=hda, and fixed kernel args; and libvirt can't parse the the
qemu-linaro version string. There will be more.
I'll feed this into the KVM 1.0 task list and share it.
-- Michael
Hi there. Starting next week we'll switch to the Zip conference line. See:
https://wiki.linaro.org/Resources/ZipConferenceLine
under 1-719-457-1414 for a list of numbers. A selected few are:
UK 0 808 101 1146
Germany 0 800 181 9019
Sweden 02 079 7556
Brazil, Sao Paulo Local +55 11 5582 6534
Australia 1 800 105 680
China +400 148 5400
NZ 0800 451 015
The code is 763 804 0680. I've updated the meeting calendar and will
update the wiki page once Monday comes around. The moderator code is
on the toolchain internal page.
Amber, could you update the public event please?
Ramana, could you update the performance call for two weeks time?
Maybe move it to linaro-events so I can edit it.
-- Michael
Hi Michael,
So, I gave my best shot at:
https://bugs.launchpad.net/gcc-linaro/+bug/914703
Kind of similar to the one in your walk-through, but I couldn't actually
reproduce on the version reported.
Could you please check if this looks OK?
Regards
Åsa
Hi Åsa. I've triaged a bug and written down my notes on the way. See:
https://wiki.linaro.org/MichaelHope/Sandbox/TriageRunThrough
This one turned out to be easy but at least you have the basics.
Could you triage the bug for real and see what I've missed?
I'm unsatisfied with the result on that bug. The fault is in the
Ubuntu Natty compiler which we've long since fixed in Linaro GCC. It
would be nice if we could point the bug reporter to an updated GCC.
Ask Marcin and Matthias what they think.
-- Michael
Summary:
* Enhance crosstool-ng build process.
Details:
1. crosstool-ng patches:
* Reproduce the build process by following the README and enhance
the document.
* Update .config to strip all toolchain executables
* Replace harded-coded VERSION by reading config file.
* Remove host libiberty.a
* Patch on how to strip debug sections is in discussion.
2. Update the crosstool-ng based embedded toolchain build scripts
according to the review comments. And replace most of hard-coded
config by reading them from .config.
3. Unexpected build fail for gcc 4.7/trunk from crosstool-ng due to
unsupported ENDIAN_LDFLAG "-EL", which is used in "LDFLAGS_FOR_TARGET"
to build libstdc++. (LDFLAGS_FOR_TARGET seams not used in gcc 4.6).
Need more investigation.
Plan:
* Fix the binary build related bugs.
* Ramp-up on gcc.
Planned Absence:
* Jan 21-29, 2012 Chinese Spring Festival
Best regards!
-Zhenqiang
Hi,
I use pre-built version of linaro toolchain (got from http://people.linaro.org/~michaelh/incoming/binaries/) to build a uImage.
The build succeeded, but the uImage couldn't start.
The console hangs at:
Using FEC0 device
TFTP from server 10.193.100.158; our IP address is 10.193.102.233
Filename 'uImage_linaro'.
Load address: 0x70800000
Loading: #################################################################
#################################################################
#################################################################
#######################
done
Bytes transferred = 3193292 (30b9cc hex)
## Booting kernel from Legacy Image at 70800000 ...
Image Name: Linux-2.6.38-01026-gc9c8ead
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3193228 Bytes = 3 MB
Load Address: 10008000
Entry Point: 10008000
Verifying Checksum ... OK
Loading Kernel Image ... OK
OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
Does anyone meet this before?
How can I fix it?
Thanks~~
Yours
Terry
* Started with some day-to-day activities in the team. Looking after the
proposals and the cbuild scheduler. Will start
Created problem log for scheduler problems, there is a link to it from the
jobs page. https://wiki.linaro.org/WorkingGroups/ToolChain/SchedulerProblems
* Worked on producing graphs for benchmark results using matplotlib.
Michael: Would it be ok to put my script in
linaro-toolchain-benchmarks/scripts?
* Kicked off some benchmarks with gcc-linaro-4.6-2012.01. To start with
coremark, eembc, denbench, pybench and spec2000. We will see what's there
after the weekend.
Variants: os-neon, o2-neon, o3-neon-novect and o3-neon.
/Regards
Åsa
== GDB ==
* Implemented, tested, and posted for discussion yet another version
of remote support for "info proc" and core file generation, this
time via accessing /proc files via generic file I/O primitives.
== GCC ==
* Tested and merged Revital's fix for LP #879725.
* Tested Richard's patch to help code generation for NEON strided
loads by enabled forward-propagation of subreg expressions. This
caused optimization failures on x86_64; investigated the root
cause and engaged in discussion on mailing list on potential fixes.
* Helped Ramana look into PR 43808 and PR 50313.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Continued work on 64-bit shifts. I've tidied up most of the nastiness I
had in my first attempt at this work, unified the logic into fewer
places, and fixed the one logic error that I knew about. I had a
mysterious reload bug that just wouldn't go away, but having stared at
it for some time I've decided that what I was doing wasn't the best
option in any case, and the new way seems to work. I still have the
problem that register-allocation prefers to allocate the values in
core-registers, even when it would seem to me to work better in NEON.
This maybe because the shift amount must be negated in some cases, and
there isn't a neon instruction for that.
Continued trying to use LAVA to do builds. Unfortunately this seems to
have hit against a lava-test bug. Filed as lp:915915.
Hi,
* built linaro binary toolchain using Michaels crosstool-ng environment:
* disabled multiarch and pkg-config
* uses eglibc 2.13 (due to RPC headers)
* using Linux kernel version 2.6.32.48 (longterm)
* debugged why /sbin/init fails when using the linaro binary toolchain:
* the loader and libc of the binary toolchain is build for armv7
* the binaries (init, busybox, ...) are linked against this glibc and
using the libdl-2.13.so of the binary toolchain
* it causes the boot to fails due to illegal insn caused by the dl
* built the minimal image for armv7-a:
* use the vexpress_defconfig of linaro 3.1 tree linux-linaro-3.1.git
(instead of the OE vesatilebp kernel)
* boots fine using the vexpress-a9 QEMU system model
* sato image (X and gtk+ apps) for armv7-a:
* Tremor (vorbis): inline assembly only supports ARM mode
quick workaround: undefine _ARM_ASSEM_ to fall back to C
* pulseaudio/libatomics-ops: inline asm that only supports ARM mode
quick workaround: use the latest version from upstream
* gtk+_2.24.8 fails due to the libstdc++ libtool archive
easy fix: delete the *la files (just like most of the distributors)
the *la files prevent the the binary toolchain from being "relocatable"
* sato image boots and shows the gui but the X resolution is higher and
the X cursor behaves strange (probably not a miscompile but a
difference of the linaro kernel)
Regards,
Ken
RAG:
Red:
Amber:
Green: good progress on A15 vexpress system model
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-02-20 || ||
||initial-a15-system-model || 2012-01-27 || 2012-01-27 || ||
||qemu-kvm-getting-started || 2012-03-04?|| 2012-03-04?|| ||
(for blueprint definitions: https://wiki.linaro.org/PeterMaydell/QemuKVM)
Historical Milestones:
||a15-usermode-support || 2011-11-10 || 2011-11-10 || 2011-10-27 ||
||upstream-omap3-cleanup || 2011-11-10 || 2011-12-15 || 2011-12-12 ||
== cp15-rework ==
* estimate shifted back since it turns out we can do something useful
in initial-a15-system-model without this as a prerequisite, so that's
a better order to do things in
== initial-a15-system-model ==
* I now have a working vexpress-a15 board model, and enough of the a15
private peripheral region and CPU definition that we can boot a
kernel compiled for A15-without-LPAE
* patchseries mostly looks ok to upstream but there are some loose ends
to fix up involving SMP secondary boot CPU protocol and making sure
the right one of the two graphics controllers gets to display things;
also it depends on some patches in the Calxeda/Samsung patchseries
== other ==
* patch review: Calxeda now basically ready to commit, another round
with Samsung
* made qemu-linaro 2012.01 release
* usual round of meetings etc
==Progress===
* Backported one part of the partial-partial PRE patch . Still looking into it.
* Investigate PR48308 - a bug where combine was generating incorrect
transformations.
* Reopened PR50313 - a bug which I originally thought was a dup of PR48308.
* Looked at upstream bugzilla for sometime and triaged a few bugs.
* Linaro patch review.
=== Plans ===
* Continue looking at partial-partial PRE and try and understand it further.
* Look at PR50313 further
* Upstream patch review.
* Finish submitting PGO patch and ABI tests patch
* Look at Andrew's patches for neon shifts -
Absences.
* Feb 6-10 : Linaro Connect Q1.12.
* Feb 13- 18 : Holiday.
==Progress===
* Short week - 4 days only after the bank holiday monday.
* Investigated PR48308 for a bit.
* Caught up with emails after vacation.
* Looked at fate an automatic tester for libav to validate my fixed
to fp conversions . Need to finish that off.
* 1 more bug with output_move_double ICE looked at briefly. Appears
to be memory corruption but valgrinding didn't find the issue.
Prioritizing PR48308 above this.
=== Plans ===
* Look at PR48308 a bit more seriously.
* Finish my long standing patches.
Absences.
* Feb 6-10 : Linaro Connect Q1.12.
* Feb 13- 18 : Holiday.
Amber noticed this on her Twitter feed: a L4 microkernel based
para-virtualisation that runs on the A9:
http://l4dev.org/
They're currently running the 11.12 LEB on a Versatile Express. The
project overview:
http://l4dev.org/codezero_overview
talks about their 'hyperswitch' method to reduce the
para-virtualisation overhead and reduce the number of changes to the
Linux kernel.
-- Michael