[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
Got to "kvm enabled with vhe" kernel message, but then
the kernel hangs there. Irritatingly works with the
kernel I built myself, but not a distro supplied kernel.
Need to track down the config difference so I can continue
using gdbstub.
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Regenerated an mte+linux-user branch for Google engineers
to use to develop llvm. This is code previously posted,
but my current branch striped out linux-user for ease of
review of the system code.
[VIRT-327 # Richard's upstream QEMU work ]
Fixed mmap assert, signal handler method.
Fixed constant folding of extract2.
Fixed aarch64 host output of extract2.
Posted pull request for those.
Started reviewing the GSoC risugen patches, v3 for avx.
r~
== This Week ==
* PR90723
- Committed fix to trunk in r273466.
* PR90724
- Posted patch upstream, waiting for feedback.
* Validation
- SPEC2k6 with SVE seems to compile, but spotted couple of infra issues.
- Sent abe patch to store sum files.
* Misc
- Meetings
== Progress ==
* GCC:
- FDPIC: received feedback on generic patches, will address after holidays
- noinit attribute: iterated on generic attribute patch, not approved yet
* GNU-583 (Fix Linux kernel built for Thumb-2 with GCC using LTO)
- no progress this week
* GCC upstream validation:
- reported a few regressions.
* Binutils:
- Non-contiguous memory regions support in the BFD linker: proposal
looks OK, will start implementation after holidays
* misc:
- infra fixes / troubleshooting
- reported several regressions in QEMU, promptly fixed by our awesome
team members
== Next ==
GCC:
- handle feedback on FDPIC and noinit patches
- binutils/linker support for non-contiguous memory regions
- GNU-583
- GCC upstream validation: Add a config for cortex-m33 (v8-m)
== Holidays ==
July 13-27
Aug 2-11
QEMU Tooling ([VIRT-252])
=========================
QEMU plugin support ([VIRT-280])
- posted {PATCH for semihosting-tests} semihosting tests: add v7m
tests Message-Id: <20190711135726.14191-1-alex.bennee(a)linaro.org>
- semihosting re-factor now in v4 branch
- cleaned up translator_ld stuff for arm
- posted {PATCH for 4.1?} includes: remove stale {smp|max}_cpus
externs Message-Id: <20190711130546.18578-1-alex.bennee(a)linaro.org>
- fixed up code needing smp/max_cpus
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
[v4 branch] https://github.com/stsquad/qemu/tree/plugins/plugins-v4
GSoC Mentoring ([VIRT-348])
- starting to look quite workable
- looks like chunks of CONFIG_PROFILER can be made runtime
select-able
Upstream Work ([VIRT-109])
==========================
- more regression hunting for 4.1 release
- looked at bugs [1834496] and [1836078]
- posted {PATCH v2 for 4.1} target/arm: report ARMv8-A FP support
for AArch32 -cpu max Message-Id:
<20190711103737.10017-1-alex.bennee(a)linaro.org>
- rth and pm215 also posted various fixes
- ieee_6 test looks like a [fortran/gcc runtime issue]
- posted {PATCH for 4.1? v1 0/7} testing/next (docker, win-cross)
Message-Id: <20190712111849.9006-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[1834496] https://bugs.launchpad.net/bugs/1834496
[1836078] https://bugs.launchpad.net/bugs/1836078
[fortran/gcc runtime issue]
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78314
Completed Reviews [5/5]
=======================
{PATCH 0/5} tcg: Fix mmap_lock assertion failure, take 2
Message-Id: <87zhlned2x.fsf(a)zen.linaroharston>
{PATCH for-4.1} target/arm: Set VFP-related MVFR0 fields for arm926 and arm1026
Message-Id: <20190711121231.3601-1-peter.maydell(a)linaro.org>
{PATCH for-4.1 0/2} Compatibility fixes for nettle 2.7 vs 3.0 vs 3.5
Message-Id: <20190712101849.8993-3-berrange(a)redhat.com>
{PATCH v2 0/5} tests/docker: add podman support
Message-Id: <20190709194330.837-1-marcandre.lureau(a)redhat.com>
- CLOSING NOTE [2019-07-12 Fri 18:07]
Looks ok - need to get a podman system up for testing
{RISU PATCH v3 00/18} Support for generating x86 SIMD test images
Message-Id: <20190711223300.6061-5-jan.bobek(a)gmail.com>
Absences
========
- 18-19th July
Current Review Queue
====================
* {PATCH 0/2} tests/acceptance: Add test of NeXTcube framebuffer using OCR
Message-Id: <20190629150056.9071-1-f4bug(a)amsat.org>
* {Qemu-devel} {PATCH 0/4} Introduce the microvm machine type
Message-Id: <20190628115349.60293-1-slp(a)redhat.com>
* {PATCH 0/3} tests/acceptance: Add tests for the Leon3 board
Message-Id: <20190627115331.2373-1-f4bug(a)amsat.org>
* {PATCH 0/5} tests/acceptance: Add bFLT loader linux-user test
Message-Id: <20190625101524.13447-1-philmd(a)redhat.com>
* {PATCH v2 0/9} KVM: arm/arm64: vgic: ITS translation cache
Message-Id: <20190611170336.121706-1-marc.zyngier(a)arm.com>
* {Qemu-devel} {RFC PATCH 0/7} Proof of concept for Meson integration
Message-Id: <1560165301-39026-1-git-send-email-pbonzini(a)redhat.com>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ QEMU 4.1 rc0 sent out of the door
+ investigated and sent fix for a regression with arm926 and arm1020
emulation: we accidentally turned off VFP double-precision support
on these cores with the recent VFP refactoring
+ helped track down a booting failure Beata ran into on aarch64 hosts
to a regression in the TCG backend, which RTH has now sent a patch for
+ sent a cleanup for some dead code spotted by Coverity in the imx6ul SoC
thanks
-- PMM
== Progress ==
* Investigate running benchmarks in containers [TCWG-1513]
- Faffing about with our benchmarking scripts, not sure how to test
changes without disrupting our infrastructure
- Cooked up some viz scripts so I can easily look at the noise
levels in benchmark results with/without containers
* Started LLVM 8.0.1 rc4 build
- In progress on ARM, infrastructure issues on AArch64
== Plan ==
* Upcoming vacation: 6 - 13 August
[LLVM-583] LLVM Code Size reduction ideas from Zephyr and CMSIS
- Started a ticket to record areas of improvement where GCC does
better than LLVM.
- Upstream defaults to -mno-unaligned-access for clang which needs to
be corrected for.
- Much of the difference goes away when inlining is disabled, implying
that different inlining strategies could be most significant
difference.
- Sent in Linaro Connect presentation submission to cover all of TCWGs
code-size improvement work.
Planned absences
- Rest of this week, back in the office on the 15th July
[Code size investigation]
Results (clang 2% larger than gcc) replicated on cortex-m0 and
cortex-m4 on Zephyr.
- Clang optimisation to use BLX rather than BL when same function
called multiple times is a pessimisation on Zephyr, especially on M0.
- GCC register allocation seems to result in fewer spills
TODO: Get an estimate of how much code-size difference is down to
different inlining decisions.
On CMSIS DSP cortex-m4f clang appears to be producing smaller than
GCC, not measured averages yet.
[LLD]
- Quite a few upstream reviews, PRs and investigations surrounding them.
- Likely that LLD will be converting to the new variable naming convention.
- Received a request to add cortex-a8 erratum fix for Google Android team.
[Linaro Connect]
Registered and contacted travel.
Drafted a submission for presentation, will submit next week.
Planned Absences:
On holiday Wednesday, Thursday, Friday next week
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ catching up with email and code review -- managed to get some
series reviewed in time for softfreeze on Tuesday, notably the
'sbsa-ref' reference platform model that Hongbo Zhang was working on
+ a lot of release-herding, working through the huge pile of pull
requests that need merging
+ fixed a silly bug in recent VFP refactoring, spotted by coverity
+ fixed a memory leak that broke our CI sanitizer build (not a new
piece of code, but we currently only sanitize the x86-64 targets
and a recent change meant this old code is now used on x86-64 for
the ATI PCI display device model)
* Misc:
+ first KVM Forum Programme Committee meeting (and attendant
review of all the submitted abstracts; bumper crop this year)
thanks
-- PMM
