=Progress=
memset performance improvement - TCWG-156 [2/10]
* Bugfixed/improved cortex-strings-bench-on-lava
memcpy regression on A9 - TCWG-390 [6/10]
* Scanned through lots of data
* Learned some perf and some streamline
* Still don't know what's going on here
lowlevellock performance bugs - TCWG-435 [0/10]
* Stalled until someone reacts to my pings
Meetings/mail/etc [2/10]
* Including some questions about whether we need softfloat support in
binary releases
=Plan=
Keep prodding at memcpy with perf/streamline
Explore repeatability of cortex-strings benchmark
See how much quicker I can make cortex-strings benchmark without
compromising repeatability
Possibly try out a bare metal version of (a subset of) cortex-strings benchmark
* Analysis of PR61411 (CARD-341) [2/10]
* Attempted to analyse VP8 decode performance on Aarch64 vs Aarch32
(TCWG-?) [6/10]
. took a while to find compatible libvpx source and compilers :(
. can't find a good way to profile on Aarch64, perf is broken, gprof
results look implausible
* Misc [2/10]
== Issues ==
* None
== Progress ==
* Take care Linaro binaries release (1/10).
* Send out ccmp patches for community review (TCWG-488, 1/10).
* loop2_invariants heuristics tune (1/10, TCWG-469). One patch was
committed @r212135.
* Constant optimization (TCWG-486, 7/10 )
- Try to keep constant in register when expanding. But benchmark
results show regression due to combine behavior changes.
- Try to keep unsigned constant when expanding. For crc |= 0x8000,
crc is unsigned short. If 0x8000 is represented as unsigned value, no
need to split 0x8000. But in middle-end, wide_int_storage::set_len and
trunc_int_for_mode always do sign extension. "trunc_int_for_mode
(INTVAL (op), mode) == INTVAL (op)" is always checked when checking
operand (e.g. in general_operand of recog.c). And in RTL, there is no
"unsigned" information at all.
== Plans ==
* Update ccmp patches according to comments.
* Continue on constant optimization.
* Ping pending patches.
== Progress ==
* Zero/sign extension elimination (TCWG-15) (10/10)
- Posted two patches for review and gone through few iterations
- Looked at flag_wrapv and !flag_strict_overflow regressions
* ARM (and possibly some other targets) truncates negative values and
this makes them incompatible with the value range in SSA. One solution
is to ignore any gimple statements that load negative constants when
eliminating zero/sign extension elimination.
* We also loose the OVF(INF) information in tree when they are
converted to wide_int and propagated to SSA.
- Testing on a target that support PTR_EXTEND
* Trying to set-up x86_64-linux with -mx32. Still not able to compile
as I am getting various errors in glibc. Looking into it,
== Plan ==
* Upstream zero/sign extension elimination activities
== Week of June 23rd ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Various cleanups and improvements to cbuild2.
-- Troubleshooting of Jenkins stability problems.
-- Increasing test coverage for arm big-endian toolchains.
- Various meetings and discussions (3/10)
--
Maxim Kuvyrkov
www.linaro.org
== Week of June 16th ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Refactored cbuild2's schroot support after Rob's review
-- Posted updated patches
- Started moving TCWG dev environment master vm to Linaro's AWS (1/10)
-- This the the VM from where toolchain64.lava.schroot and maximk.schroot are synchronized.
-- Once migrated, all TCWG admins can access it, not just me.
- Various meetings and discussions (2/10)
--
Maxim Kuvyrkov
www.linaro.org
== Week of June 9th ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Added support for native testing inside schroot
-- Troubleshooting of various problems
-- Assisted Yvan in testing of the 2014.06 source release and general fire-fighting
- Various meetings and discussions (2/10)
- Interviewed 2 potential assignees (1/10)
--
Maxim Kuvyrkov
www.linaro.org
== Progress ==
* Patch review, testing and follow-up (4/10, CARD-341)
- glibc 2.20 freeze upcoming
- submit some warning fix patches
* Add support for ARM HWCAP2 to glibc (2/10, TCWG-499)
* Submit a patch for increasing ld max page size on ARM (1/10)
* Reformatted backports spreadsheet for glibc, binutils and gdb (1/10)
* Investigated language runtimes (1/10)
* Meetings (1/10)
== Issues ==
* None
== Plan ==
* More glibc patch work for the freeze (1st July)
* malloc benchmarking
--
Will Newton
Toolchain Working Group, Linaro
