== GDB ==
* Ongoing work to fix single-stepping over signal handlers (bug #615978).
* Posted patch to support NEON registers in core files (bug #615972).
* Failure to disable address space randomization (bug #616001) is shown
to be a kernel problem; created stand-alone test case and opened bug
against kernel team.
== Schedule ==
* On vacation 04/07 - 04/15.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
On 25/03/11 21:48, Diane Holt wrote:
> I hope you don't mind me sending you mail, but I'm a bit stuck...I've
> been told I need the Linaro 4.5.2 toolchain because it has some "neon
> optimizations" that the CS 4.5.1 doesn't have.
In general, you'd be better addressing these questions on the Linaro
Toolchain mailing list: linaro-toolchain(a)lists.linaro.org (I've copied
it in).
Not least because I'm on vacation for the next week. :)
> Unfortunately, the Linaro
> 4.5.2 that's available for download (already built) won't work in my
> Scratchbox environment, since it was compiled against a glibc that's too
> new. The CS 4.5.1 works fine -- but I'm not allowed to use it, because
> of the neon stuff.
The CS and Linaro compilers are really very similar, but CodeSourcery
has not made a release since the autumn, so Linaro will have some extra
features.
> Do you know whether CS actually does have (or will have) the same neon
> optimizations Linaro has?
It depends which optimizations you are referring to? The existing CS
release had the latest improvements at the time it was released, and I
believe that the upcoming release will probably be very similar to
Linaro (at least, with respect to ARMv7 - there'll be many differences
for other architecture variants), but I'm not promising that.
Sorry if that's a bit vague, but I the contents of the next CS release
is still not finalised.
> If it doesn't (and won't), then I'm going to have to build the Linaro
> one from source. Unfortunately, I've not been able to find any detailed
> information on how to go about doing that. Do you know if that's
> documented anywhere?
Are you talking about building native compiler, or a cross-compiler? The
former is very simple (provided you have all the dependencies), while
the latter is more involved.
Here's the recipe to build a native compiler:
tar xf gcc-linaro.....tar.bz2
mkdir objdir
cd objdir
../gcc-linaro....../configure --prefix=<your-install-path> <opts>
make bootstrap
make install
You can copy the configure <opts> from another compiler using 'gcc -v'
and './configure --help' in the source tree should tell you what they mean.
If you want to build a cross compiler, I suggest you look at crosstool
or crosstool-ng, or OpenEmbedded. Building cross-toolchains is non-trivial.
Hope that helps.
Andrew
== Last week ==
* Finished the patch that I was working on last week to use memory operands
rather than register operands in neon.md. Submitted upstream:
http://gcc.gnu.org/ml/gcc-patches/2011-03/msg01996.html
Among other things, this allows the intrinsics to use post-modified
addresses.
* Submitted patches to make the number of rtl generator arguments
(as opposed to insn operands) available to the expand-time code:
http://gcc.gnu.org/ml/gcc-patches/2011-03/msg02227.htmlhttp://gcc.gnu.org/ml/gcc-patches/2011-03/msg02228.htmlhttp://gcc.gnu.org/ml/gcc-patches/2011-03/msg02229.html
This is part of the tree-rtl expansion "cleanups" that I've been
doing in preparation for the vectoriser work.
* More discussion about the handling of type modes vs. per-function
target switching. I've think we've agreed what the right approach is,
although it's probably outside the scope of this project. The discussion
was still useful because it meant I could submit & defend the next patch.
* Submitted a patch to use non-BLK modes for arrays of vectors
(like uint32x2x2_t & co. in arm_neon.h);
http://gcc.gnu.org/ml/gcc-patches/2011-03/msg02192.html
This avoids that stack spilling that was discussed during the week.
Richard Guenther seemed happy with the patch in principle, but
understandably wanted to see how the optabs stuff worked out first.
Also, the testcase he asked me to try exposed another instance of:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46329
so that needs to be fixed first.
* Started writing & testing a fix for that PR (46329).
== This week ==
* Finish fix for PR46329.
* More vld & vst stuff.
Richard
== Last week ==
* PR48250 / CS Issue #9845 / Launchpad #723185. Unaligned DImode reload
under NEON. Went back and forth with Richard Earnshaw on gcc-patches for
most of the week. The issues should finally be clear, and I think it
would be better to modify the significant parts of
arm_legitimize_reload_address() to do the right thing rather than just
fixing the bug. I have a new patch done over the weekend, though it
still shows a few regressions after some testing. I hope this gets done
by this week...
* PR48325 / Launchpad #744754, another NEON ICE in postreload. This
appears to be the IA/DB modes for VLDM/VSTM for NEON struct modes were
not enabled. This ICE actually does not happen currently on upstream
trunk, but sent patch anyways. Pending review.
* Spent some time on Launchpad #736661 (C++ ICE in expr.c), and looked
at upstream testsuite regressions of gcc.dg/pr17957.c and
gcc.dg/torture/pr47975.c under -mfpu=neon (ICE on OImode const0_rtx
assignment).
* Call with Ramana on ARM optimization work.
== This week ==
* Get PR48250/Launchpad #723185 nailed.
* Other pending GCC issues.
* TW Public Holiday, Mon. and Tue. (Apr.4-5)
The Bazaar team have been working on improving the performance of bzr
on the gcc-linaro tree. Here's how long the steps take on my machine
with the current 2.4 development version:
Update tip before branching:
bzr pull 20.4 s (no revisions)
Make the branch:
bzr branch --hardlink 4.5 optspace 26.8 s
Do some work and commit it:
...change two files
bzr status 1:05
(again) bzr status 1.7 s
bzr commit . 3.6 s
Push the changes up:
bzr push lp:~michaelh1/gcc-linaro/optspace 3:47 ~9 MB (~40 kB/s
which is saturating my uplink)
Later, the merge master pulls the branch down and merges:
bzr branch --no-tree lp:~michaelh1/gcc-linaro/optspace 36 s ~900 k
bzr merge ../optspace 3:26
The bzr status and bzr commit are quite good. I've asked them to look
into bzr merge.
-- Michael
Hi All,
After downloading linaro toolchain by apt-get in ubuntu, I compiled
the uboot for ARM1136 SoC with -march=armv5 option. And it can compile
successfully. Then I let the uboot run on target boards and system
failed due to "undefined instructions". Checked linaro toolchain
options, it is:
#arm-linux-gnueabi-gcc -v
Using built-in specs.
COLLECT_GCC=arm-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/usr/lib/gcc/arm-linux-gnueabi/4.5.2/lto-wrapper
Target: arm-linux-gnueabi
Configured with: ../src/configure -v --with-pkgversion='Ubuntu/Linaro
4.5.2-5ubuntu2~ppa1'
--with-bugurl=file:///usr/share/doc/gcc-4.5/README.Bugs
--enable-languages=c,c++,fortran,objc,obj-c++ --prefix=/usr
--program-suffix=-4.5 --enable-shared --enable-multiarch
--enable-linker-build-id --with-system-zlib --libexecdir=/usr/lib
--without-included-gettext --enable-threads=posix
--with-gxx-include-dir=/usr/arm-linux-gnueabi/include/c++/4.5.2
--libdir=/usr/lib --enable-nls --enable-clocale=gnu
--enable-libstdcxx-debug --enable-libstdcxx-time=yes --enable-plugin
--enable-gold --enable-ld=default --with-plugin-ld=ld.gold
--enable-objc-gc --disable-sjlj-exceptions --with-arch=armv7-a
--with-float=softfp --with-fpu=vfpv3-d16 --with-mode=thumb
--disable-werror --enable-checking=release
--program-prefix=arm-linux-gnueabi-
--includedir=/usr/arm-linux-gnueabi/include --build=x86_64-linux-gnu
--host=x86_64-linux-gnu --target=arm-linux-gnueabi
--with-headers=/usr/arm-linux-gnueabi/include
--with-libs=/usr/arm-linux-gnueabi/lib
Thread model: posix
gcc version 4.5.2 (Ubuntu/Linaro 4.5.2-5ubuntu2~ppa1)
The imporant options are "--with-arch=armv7-a --with-float=softfp
--with-fpu=vfpv3-d16". I just want to ask whether these options stop
arm-linux-gnueabi-gcc to support old arch? If so, according to gcc
documents at http://gcc.gnu.org/install/configure.html,
"
--with-cpu=cpu
--with-cpu-32=cpu
--with-cpu-64=cpu
Specify which cpu variant the compiler should generate code for by
default. cpu will be used as the default value of the -mcpu= switch.
This option is only supported on some targets, including ARM, i386,
M68k, PowerPC, and SPARC. The --with-cpu-32 and --with-cpu-64 options
specify separate default CPUs for 32-bit and 64-bit modes; these
options are only supported for i386, x86-64 and PowerPC.
--with-schedule=cpu
--with-arch=cpu
--with-arch-32=cpu
--with-arch-64=cpu
--with-tune=cpu
--with-tune-32=cpu
--with-tune-64=cpu
--with-abi=abi
--with-fpu=type
--with-float=type
These configure options provide default values for the
-mschedule=, -march=, -mtune=, -mabi=, and -mfpu= options and for
-mhard-float or -msoft-float. As with --with-cpu, which switches will
be accepted and acceptable values of the arguments depend on the
target.
"
There are only default values for later compiling. Users should be
able to swith to other values by setting other options. But why did
arm-linux-gnueabi-gcc still build "undefined instructions" to arm1136
with "arch=armv5"? In fact arm1136 is armv6.
Then i compiled a toolchain for linaro gcc-linaro-4.4-2011.02-0 codes
by myself, the options are simple:
#arm-none-linux-gnueabi-gcc -v
Using built-in specs.
Target: arm-none-linux-gnueabi
Configured with: ../gcc-linaro-4.4-2011.02-0/configure
--target=arm-none-linux-gnueabi
--prefix=/home/vmuser/development/toolchain/build-toolchain/tools
--enable-languages=c,c++ --disable-libgomp
Thread model: posix
gcc version 4.4.5 (Linaro GCC 4.4-2011.02-0)
Then I compiled uboot by this toolchain again, the uboot can work.
Then why can the toolchain compiled by myself support more arch? And
what performance is lost in my compiling?
Thanks
Barry
== GCC ==
Progress:
* Investigated excessive VFP moves . Partially investigating ways forward.
* Polished up my divmodsi4 patch. Discussed it during the call.
Looking for ways to do it properly at the tree level.
* Got Panda board on Friday.
* Off on Wednesday.
* Conversations with Revital and Chung-Lin. Need to sync up with
Andrew next week.
* Found an issue with binutils and Neon and this is now LP:747837
Plans:
* Continue looking at excessive VFP moves.
* Finish working through Thumb2 speed tickets.
* Set up new Panda board.
* Conversation with Andrew sometime this week.
Meetings:
* 1-1s
* Linaro toolchain meeting
Absences:
* April 15 – 26 -> Booked Holiday.
* May 9-14 - LDS Budapest
== GDB ==
* Committed patch to fix single-stepping across bad ARM/Thumb boundary
(bug #667309) to mainline and Linaro GDB.
* Committed patch to fix accessing "fpscr" register to mainline.
* Ongoing work to fix single-stepping over signal handlers (bug #615978).
Posted yet another updated patch to gdb-patches for comments.
* Implemented patch to support NEON registers in core files (bug #615972).
* Investigated failure to disable address space randomization
(bug #616001).
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
