On Aug 20, 2025, "Richard Earnshaw (lists)" Richard.Earnshaw@arm.com wrote:
On 19/06/2025 14:25, Alexandre Oliva wrote:
On Jun 19, 2025, Alexandre Oliva oliva@adacore.com wrote:
- v7 "-march=armv7" __ARM_ARCH_7__
Similarly to the line directly below, this needs to be 'armv7+fp', otherwise this won't work on targets that use the hard float abi and use -mfpu=auto (pretty much the default these days).
Aah, so that's the reason for the '+fp' that were unexpected to me. Thanks, here's what I'm checking in momentarily.
armv7 was not covered by the long list of arm variants in target-supports.exp, so add it, and use it for the effective target requirement and for the option.
for gcc/testsuite/ChangeLog
PR rtl-optimization/120424 * lib/target-supports.exp (arm arches): Add arm_arch_v7. * g++.target/arm/pr120424.C: Require armv7 support. Use dg-add-options arm_arch_v7 instead of explicit -march=armv7. --- gcc/testsuite/g++.target/arm/pr120424.C | 4 +++- gcc/testsuite/lib/target-supports.exp | 1 + 2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/gcc/testsuite/g++.target/arm/pr120424.C b/gcc/testsuite/g++.target/arm/pr120424.C index 4d0e49013c04a..40295ac80da93 100644 --- a/gcc/testsuite/g++.target/arm/pr120424.C +++ b/gcc/testsuite/g++.target/arm/pr120424.C @@ -1,5 +1,7 @@ /* { dg-do compile } */ -/* { dg-options "-march=armv7 -O2 -fstack-clash-protection -fnon-call-exceptions" } */ +/* { dg-require-effective-target arm_arch_v7_ok } */ +/* { dg-options "-O2 -fstack-clash-protection -fnon-call-exceptions" } */ +/* { dg-add-options arm_arch_v7 } */ /* { dg-final { scan-assembler-not {#-8} } } */ /* LRA register elimination gets confused when register spilling causes arm_frame_pointer_required to switch from false to true, and diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index b49363caa12b2..2ab405a151329 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -6122,6 +6122,7 @@ foreach { armfunc armflag armdefs } { v6z_arm "-march=armv6z+fp -marm" "__ARM_ARCH_6Z__ && !__thumb__" v6z_thumb "-march=armv6z+fp -mthumb -mfloat-abi=softfp" "__ARM_ARCH_6Z__ && __thumb__" v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__ + v7 "-march=armv7+fp" __ARM_ARCH_7__ v7a "-march=armv7-a+fp" __ARM_ARCH_7A__ v7a_arm "-march=armv7-a+fp -marm" "__ARM_ARCH_7A__ && !__thumb__" v7a_fp_hard "-march=armv7-a+fp -mfpu=auto -mfloat-abi=hard" __ARM_ARCH_7A__