gfortran.dg/pr112877-1.f90 is ----------- ! { dg-do compile } ! { dg-options "-Os" }
program test use iso_c_binding, only: c_short interface subroutine foo(a) bind(c) import c_short integer(kind=c_short), intent(in), value :: a end subroutine foo end interface integer(kind=c_short) a(5); call foo (a(3)) end
! { dg-final { scan-assembler "movswl\t10\(%rsp\), %edi" { target { { *-*-linu x* *-*-gnu* } && { ! ia32 } } } } } ! { dg-final { scan-assembler "movswl\t-14\(%ebp\), %eax" { target { { *-*-lin ux* *-*-gnu* } && { ia32 } } } } } ----------
Why does it fail
FAIL: gfortran.dg/pr112877-1.f90 -O scan-assembler movswl\t10\(%rsp\), %edi
on arm-linux-gnueabihf?
H.J. ---------- Forwarded message --------- From: ci_notify@linaro.org Date: Wed, Dec 4, 2024 at 7:26 PM Subject: [Linaro-TCWG-CI] 7 patches in gcc: 1 regressions on arm To: hjl.tools@gmail.com
Dear contributor,
Our automatic CI has detected problems related to your patch(es). Please find some details below.
In gcc_check master-arm, after: | 7 patches in gcc | Patchwork URL: https://patchwork.sourceware.org/patch/102351 | 97708c5e402 [PATCH v5 7/7] ssa-fre-4.c: Enable for all targets and adjust scan match | 9c6ba8e5347 [PATCH v5 6/7] scev-cast.c: Enable for all targets and adjust scan matches | d78236fd00e [PATCH v5 5/7] vect-simd-clone-1[6-8][cd].c: Expect in-branch clones for x86 | a9ef03a445d [PATCH v5 4/7] i386: Adjust apx-ndd.c for frontend promotion removal | 14ece135ff9 [PATCH v5 3/7] Use incoming small integer argument type if possible | ... and 2 more patches in gcc | ... applied on top of baseline commit: | fb64a7b0e1d RISC-V: Add assert for insn operand out of range access [PR117878][NFC]
Produces 1 regressions: | Running gfortran:gfortran.dg/dg.exp ... | FAIL: gfortran.dg/pr112877-1.f90 -O scan-assembler movswl\t10\(%rsp\), %edi
Used configuration : *CI config* tcwg_gcc_check master-arm *configure and test flags:* --target arm-linux-gnueabihf
If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.
-----------------8<--------------------------8<--------------------------8<--------------------------
The information below contains the details of the failures, and the ways to reproduce a debug environment:
You can find the failure logs in *.log.1.xz files in * https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/10456/artifac... The full lists of regressions and improvements as well as configure and make commands are in * https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/10456/artifac... The list of [ignored] baseline and flaky failures are in * https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/10456/artifac...
Current build : https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/10456/artifac... Reference build : https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/3116/artifact/art...
Warning: we do not enable maintainer-mode nor automatically update generated files, which may lead to failures if the patch modifies the master files.
On Wed, 4 Dec 2024 at 13:59, H.J. Lu hjl.tools@gmail.com wrote:
gfortran.dg/pr112877-1.f90 is
! { dg-do compile } ! { dg-options "-Os" }
program test use iso_c_binding, only: c_short interface subroutine foo(a) bind(c) import c_short integer(kind=c_short), intent(in), value :: a end subroutine foo end interface integer(kind=c_short) a(5); call foo (a(3)) end
! { dg-final { scan-assembler "movswl\t10\(%rsp\), %edi" { target { { *-*-linu x* *-*-gnu* } && { ! ia32 } } } } } ! { dg-final { scan-assembler "movswl\t-14\(%ebp\), %eax" { target { { *-*-lin ux* *-*-gnu* } && { ia32 } } } } }
Why does it fail
FAIL: gfortran.dg/pr112877-1.f90 -O scan-assembler movswl\t10\(%rsp\), %edi
on arm-linux-gnueabihf?
Probably because the "real" target name is expanded to armv8l-unknown-linux-gnueabihf, so target { { *-*-linu > x* *-*-gnu* } && { ! ia32 } } matches
Thanks,
Christophe
H.J. ---------- Forwarded message --------- From: ci_notify@linaro.org Date: Wed, Dec 4, 2024 at 7:26 PM Subject: [Linaro-TCWG-CI] 7 patches in gcc: 1 regressions on arm To: hjl.tools@gmail.com
Dear contributor,
Our automatic CI has detected problems related to your patch(es). Please find some details below.
In gcc_check master-arm, after: | 7 patches in gcc | Patchwork URL: https://patchwork.sourceware.org/patch/102351 | 97708c5e402 [PATCH v5 7/7] ssa-fre-4.c: Enable for all targets and adjust scan match | 9c6ba8e5347 [PATCH v5 6/7] scev-cast.c: Enable for all targets and adjust scan matches | d78236fd00e [PATCH v5 5/7] vect-simd-clone-1[6-8][cd].c: Expect in-branch clones for x86 | a9ef03a445d [PATCH v5 4/7] i386: Adjust apx-ndd.c for frontend promotion removal | 14ece135ff9 [PATCH v5 3/7] Use incoming small integer argument type if possible | ... and 2 more patches in gcc | ... applied on top of baseline commit: | fb64a7b0e1d RISC-V: Add assert for insn operand out of range access [PR117878][NFC]
Produces 1 regressions: | Running gfortran:gfortran.dg/dg.exp ... | FAIL: gfortran.dg/pr112877-1.f90 -O scan-assembler movswl\t10\(%rsp\), %edi
Used configuration : *CI config* tcwg_gcc_check master-arm *configure and test flags:* --target arm-linux-gnueabihf
If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.
-----------------8<--------------------------8<--------------------------8<--------------------------
The information below contains the details of the failures, and the ways to reproduce a debug environment:
You can find the failure logs in *.log.1.xz files in
The full lists of regressions and improvements as well as configure and make commands are in
The list of [ignored] baseline and flaky failures are in
Current build : https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/10456/artifac... Reference build : https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/3116/artifact/art...
Warning: we do not enable maintainer-mode nor automatically update generated files, which may lead to failures if the patch modifies the master files.
-- H.J. _______________________________________________ linaro-toolchain mailing list -- linaro-toolchain@lists.linaro.org To unsubscribe send an email to linaro-toolchain-leave@lists.linaro.org
On Wed, Dec 4, 2024 at 10:28 PM Christophe Lyon christophe.lyon@linaro.org wrote:
On Wed, 4 Dec 2024 at 13:59, H.J. Lu hjl.tools@gmail.com wrote:
gfortran.dg/pr112877-1.f90 is
! { dg-do compile } ! { dg-options "-Os" }
program test use iso_c_binding, only: c_short interface subroutine foo(a) bind(c) import c_short integer(kind=c_short), intent(in), value :: a end subroutine foo end interface integer(kind=c_short) a(5); call foo (a(3)) end
! { dg-final { scan-assembler "movswl\t10\(%rsp\), %edi" { target { { *-*-linu x* *-*-gnu* } && { ! ia32 } } } } } ! { dg-final { scan-assembler "movswl\t-14\(%ebp\), %eax" { target { { *-*-lin ux* *-*-gnu* } && { ia32 } } } } }
Why does it fail
FAIL: gfortran.dg/pr112877-1.f90 -O scan-assembler movswl\t10\(%rsp\), %edi
on arm-linux-gnueabihf?
Probably because the "real" target name is expanded to armv8l-unknown-linux-gnueabihf, so target { { *-*-linu > x* *-*-gnu* } && { ! ia32 } } matches
Should be fixed in v6.
Thanks,
Christophe
H.J. ---------- Forwarded message --------- From: ci_notify@linaro.org Date: Wed, Dec 4, 2024 at 7:26 PM Subject: [Linaro-TCWG-CI] 7 patches in gcc: 1 regressions on arm To: hjl.tools@gmail.com
Dear contributor,
Our automatic CI has detected problems related to your patch(es). Please find some details below.
In gcc_check master-arm, after: | 7 patches in gcc | Patchwork URL: https://patchwork.sourceware.org/patch/102351 | 97708c5e402 [PATCH v5 7/7] ssa-fre-4.c: Enable for all targets and adjust scan match | 9c6ba8e5347 [PATCH v5 6/7] scev-cast.c: Enable for all targets and adjust scan matches | d78236fd00e [PATCH v5 5/7] vect-simd-clone-1[6-8][cd].c: Expect in-branch clones for x86 | a9ef03a445d [PATCH v5 4/7] i386: Adjust apx-ndd.c for frontend promotion removal | 14ece135ff9 [PATCH v5 3/7] Use incoming small integer argument type if possible | ... and 2 more patches in gcc | ... applied on top of baseline commit: | fb64a7b0e1d RISC-V: Add assert for insn operand out of range access [PR117878][NFC]
Produces 1 regressions: | Running gfortran:gfortran.dg/dg.exp ... | FAIL: gfortran.dg/pr112877-1.f90 -O scan-assembler movswl\t10\(%rsp\), %edi
Used configuration : *CI config* tcwg_gcc_check master-arm *configure and test flags:* --target arm-linux-gnueabihf
If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.
-----------------8<--------------------------8<--------------------------8<--------------------------
The information below contains the details of the failures, and the ways to reproduce a debug environment:
You can find the failure logs in *.log.1.xz files in
The full lists of regressions and improvements as well as configure and make commands are in
The list of [ignored] baseline and flaky failures are in
Current build : https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/10456/artifac... Reference build : https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/3116/artifact/art...
Warning: we do not enable maintainer-mode nor automatically update generated files, which may lead to failures if the patch modifies the master files.
-- H.J. _______________________________________________ linaro-toolchain mailing list -- linaro-toolchain@lists.linaro.org To unsubscribe send an email to linaro-toolchain-leave@lists.linaro.org
linaro-toolchain@lists.linaro.org
-
Christophe Lyon -
H.J. Lu