Linaro-uefi May 2016

linaro-uefi@lists.linaro.org

19 participants
36 discussions

[PATCH] Platforms/ARM: Juno: Update _PRT to provide interrupt type

by Punit Agrawal

The PCI Routing Table (_PRT) for Juno does not specify the Interrupt trigger type and polarity. In the absence of this information, the kernel uses PCI default interrupt type (level triggered, active low) which is incompatible with GICv2 compliant interrupt controller such as on Juno. Absence of interrupt type leads to errors such as following in kernel boot log - [ 1.353696] genirq: Setting trigger mode 8 for irq 9 failed (gic_set_type+0x0/0x5c) [ 1.478286] genirq: Setting trigger mode 8 for irq 17 failed (gic_set_type+0x0/0x5c) [ 1.563723] genirq: Setting trigger mode 8 for irq 18 failed (gic_set_type+0x0/0x5c) Fix this issue by providing the correct information (level triggered, active high) to the kernel by using the PCI Link device. Signed-off-by: Punit Agrawal <punit.agrawal(a)arm.com> --- Hi, This patch to the OpenPlatformPkg for Juno ACPI tables fixes an issue I reported earlier[0]. All feedback welcome. Thanks, Punit [0] https://lists.linaro.org/pipermail/linaro-uefi/2016-April/001776.html Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl | 60 +++++++++++++++++------ 1 file changed, 44 insertions(+), 16 deletions(-) diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl index 800d2cb..55b76d6 100644 --- a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl +++ b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl @@ -15,20 +15,43 @@ #include "ArmPlatform.h" /* - See Reference [1] 6.2.12 - "There are two ways that _PRT can be used. ... - In the second model, the PCI interrupts are hardwired to specific interrupt - inputs on the interrupt controller and are not configurable. In this case, - the Source field in _PRT does not reference a device, but instead contains - the value zero, and the Source Index field contains the global system - interrupt to which the PCI interrupt is hardwired." + See ACPI 6.1 Section 6.2.13 + + There are two ways that _PRT can be used. ... + + In the first model, a PCI Link device is used to provide additional + configuration information such as whether the interrupt is Level or + Edge triggered, it is active High or Low, Shared or Exclusive, etc. + + In the second model, the PCI interrupts are hardwired to specific + interrupt inputs on the interrupt controller and are not + configurable. In this case, the Source field in _PRT does not + reference a device, but instead contains the value zero, and the + Source Index field contains the global system interrupt to which the + PCI interrupt is hardwired. + + We use the first model with link indirection to set the correct + interrupt type as PCI defaults (Level Triggered, Active Low) are not + compatible with GICv2. */ -#define PRT_ENTRY(Address, Pin, Interrupt) \ - Package (4) { \ +#define LNK_DEVICE(Unique_Id, Link_Name, irq) \ + Device(Link_Name) { \ + Name(_HID, EISAID("PNP0C0F")) \ + Name(_UID, Unique_Id) \ + Name(_PRS, ResourceTemplate() { \ + Interrupt(ResourceProducer, Level, ActiveHigh, Exclusive) { irq } \ + }) \ + Method (_CRS, 0) { Return (_PRS) } \ + Method (_SRS, 1) { } \ + Method (_DIS) { } \ + } + +#define PRT_ENTRY(Address, Pin, Link) \ + Package (4) { \ Address, /* uses the same format as _ADR */ \ Pin, /* The PCI pin number of the device (0-INTA, 1-INTB, 2-INTC, 3-INTD). */ \ - Zero, /* allocated from the global interrupt pool. */ \ - Interrupt /* global system interrupt number */ \ + Link, /* Interrupt allocated via Link device. */ \ + Zero /* global system interrupt number (no used) */ \ } /* @@ -36,7 +59,7 @@ "High word–Device #, Low word–Function #. (for example, device 3, function 2 is 0x00030002). To refer to all the functions on a device #, use a function number of FFFF)." */ -#define ROOT_PRT_ENTRY(Pin, Interrupt) PRT_ENTRY(0x0000FFFF, Pin, Interrupt) +#define ROOT_PRT_ENTRY(Pin, Link) PRT_ENTRY(0x0000FFFF, Pin, Link) // Device 0 for Bridge. @@ -45,6 +68,11 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM // // PCI Root Complex // + LNK_DEVICE(1, LNKA, 168) + LNK_DEVICE(2, LNKB, 169) + LNK_DEVICE(3, LNKC, 170) + LNK_DEVICE(4, LNKD, 171) + Device(PCI0) { Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge @@ -60,10 +88,10 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM // PCI Routing Table Name(_PRT, Package() { - ROOT_PRT_ENTRY(0, 168), // INTA - ROOT_PRT_ENTRY(1, 169), // INTB - ROOT_PRT_ENTRY(2, 170), // INTC - ROOT_PRT_ENTRY(3, 171), // INTD + ROOT_PRT_ENTRY(0, LNKA), // INTA + ROOT_PRT_ENTRY(1, LNKB), // INTB + ROOT_PRT_ENTRY(2, LNKC), // INTC + ROOT_PRT_ENTRY(3, LNKD), // INTD }) // Root complex resources Method (_CRS, 0, Serialized) { -- 2.8.0.rc3

7 years, 12 months

[PATCH] Platforms/AMD/Styx: remove unused BootMode module from DSC

by Ard Biesheuvel

The boot mode PPI is already produced by the PlatformPeim.inf in ArmPlatformPkg, and the Nt32Pkg BootModePei is not even referenced in our .FDFs. So just drop it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 1 - Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 1 - 2 files changed, 2 deletions(-) diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 345f04a25e3e..0828d02dff43 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -481,7 +481,6 @@ DEFINE DO_RTK = 0 OpenPlatformPkg/Platforms/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf ArmPkg/Drivers/CpuPei/CpuPei.inf - Nt32Pkg/BootModePei/BootModePei.inf MdeModulePkg/Universal/Variable/Pei/VariablePei.inf MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { <LibraryClasses> diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 68c3321be37e..1bd6f2ba70a5 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -512,7 +512,6 @@ DEFINE DO_RTK = 0 OpenPlatformPkg/Platforms/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf ArmPkg/Drivers/CpuPei/CpuPei.inf - Nt32Pkg/BootModePei/BootModePei.inf MdeModulePkg/Universal/Variable/Pei/VariablePei.inf MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { <LibraryClasses> -- 2.7.4

7 years, 12 months

[PATCH] OpenPlatformPkg/AcpiTables ACPI table for Juno LAN9118

by Daniil Egranov

The patch corrects Juno LAN9118 base address. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov <daniil.egranov(a)arm.com> --- Platforms/ARM/Juno/AcpiTables/Dsdt.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl index c80f46a..c324ded 100644 --- a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl +++ b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl @@ -65,7 +65,7 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_O Name(_HID, "ARMH9118") Name(_UID, Zero) Name(_CRS, ResourceTemplate() { - Memory32Fixed(ReadWrite, 0x1A000000, 0x1000) + Memory32Fixed(ReadWrite, 0x18000000, 0x1000) Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 192 } }) Name(_DSD, Package() { -- 2.7.4

7 years, 12 months

[RFC][PATCH] OpenPlatformPkg: HiKeyMem: Initialize the base system memory HOB before trying to create reservations

by John Stultz

In the current edk2 code, as of 40a3f38f67cee ("ArmPlatformPkg/MemoryInitPei: Check if the main System Memory resource has been declared"), ArmPlatformGetVirtualMemoryMap() is now called before the base system memory HOB is created in MemoryPeim(). This causes the logic in HiKey's ArmPlatformGetVirtualMemoryMap() which tries to chop up that base HOB to fail, as there's nothing to chop up at that time. The calling code is smart enough to check if a base system memory HOB is already present before creating one, so we can just set it up ourselves here before we try to make our reservations. This avoids problems seen in the kernel with the current logic, where none of the reservations were actually being made. Note: I'm a total newbie with this codebase (I just recently figured out what HOB stood for). So feedback would be greatly appreciated! CC: Olivier Martin <Olivier.Martin(a)arm.com> Cc: Haojian Zhuang <haojian.zhuang(a)linaro.org> Cc: Vishal Bhoj <vishal.bhoj(a)linaro.org> Signed-off-by: John Stultz <john.stultz(a)linaro.org> --- Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c b/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c index a5ce05b..2d118e0 100644 --- a/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c +++ b/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c @@ -89,6 +89,24 @@ ArmPlatformGetVirtualMemoryMap ( MemorySize = HiKeyInitMemorySize (); + ResourceAttributes = ( + EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_TESTED + ); + + // Create initial Base Hob for system memory. + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + PcdGet64 (PcdSystemMemoryBase), + PcdGet64 (PcdSystemMemorySize) + ); + NextHob.Raw = GetHobList (); Count = sizeof (HiKeyReservedMemoryBuffer) / sizeof (struct HiKeyReservedMemory); while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) -- 1.9.1

7 years, 12 months

[PATCH] Platforms/AMD/Styx: switch Cello and Overdrive to generic BDS

by Ard Biesheuvel

The 'Intel' BDS is deprecated and superseded by a new generic BDS implementation that lives under MdeModulePkg. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Note that this depends on the EDK2 patch that I just sent out. Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 42 ++++++++++---------- Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 3 +- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 39 +++++++++--------- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf | 3 +- 4 files changed, 42 insertions(+), 45 deletions(-) diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 8e448c7e3d39..3519bbec733c 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -132,8 +132,8 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) RealTimeClockLib|OpenPlatformPkg/Platforms/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.inf CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf - GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf - PlatformBdsLib|ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf + PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf # @@ -149,6 +149,10 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf + [LibraryClasses.common.SEC] HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf @@ -207,12 +211,10 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf [LibraryClasses.common.DXE_DRIVER] ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf @@ -228,13 +230,13 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf [LibraryClasses.common.UEFI_DRIVER] ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf [LibraryClasses.ARM] @@ -384,6 +386,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000000000000 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 } gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"AMD Seattle" @@ -440,7 +443,8 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0 # serial port is clocked at 100MHz gArmPlatformTokenSpaceGuid.PL011UartClkInHz|100000000 - + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 + gAmdStyxTokenSpaceGuid.PcdSerialDbgRegisterBase|0x0E1010000 gAmdStyxTokenSpaceGuid.PcdUartDbgBaudRate|115200 @@ -450,20 +454,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gArmTokenSpaceGuid.PcdGicDistributorBase|0xE1110000 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xE112F000 - - # - # ARM OS Loader - # -# gArmPlatformTokenSpaceGuid.PcdDefaultBootType|2 -# gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut|1 - gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Linux" - gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"PciRoot(0x0)/Pci(0x0,0x0)/Sata(0x1,0x0,0x0)/HD(1,MBR,0xDA835D19,0x80,0xBF780)/Image" - gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|"console=ttySBSA0,115200 earlyprintk=pl011,0xe1010000,115200 show_styx_info nosmp root=/dev/sda2 rootwait" - - # Use the serial console (ConIn & ConOut) - gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()" - gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()" - # # ARM Architectual Timer Frequency # @@ -525,6 +515,9 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0 +[PcdsDynamicExHii.common.DEFAULT] + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 + ################################################################################ # # Components Section - list of all EDK II Modules needed by this Platform @@ -678,7 +671,13 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf - IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Application/UiApp/UiApp.inf { + <LibraryClasses> + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf + } # # Crypto Accelerator support (RNG only) @@ -704,7 +703,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf - SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf <PcdsFixedAtBuild> diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf b/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf index b47a13c2601f..90a97875d8ad 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf @@ -207,7 +207,8 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf - INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf # # Crypto Accelerator support (RNG only) diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index aa64be59a204..1bef9c01aad0 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -135,8 +135,8 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) RealTimeClockLib|OpenPlatformPkg/Platforms/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.inf CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf - GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf - PlatformBdsLib|ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf + PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf # @@ -156,6 +156,10 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf + [LibraryClasses.common.SEC] HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf @@ -214,12 +218,10 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf [LibraryClasses.common.DXE_DRIVER] ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf @@ -235,13 +237,13 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf [LibraryClasses.common.UEFI_DRIVER] ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf [LibraryClasses.ARM] @@ -391,6 +393,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000000000000 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 } gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"AMD Seattle" @@ -447,6 +450,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0 # serial port is clocked at 100MHz gArmPlatformTokenSpaceGuid.PL011UartClkInHz|100000000 + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 gAmdStyxTokenSpaceGuid.PcdSerialDbgRegisterBase|0x0E1010000 gAmdStyxTokenSpaceGuid.PcdUartDbgBaudRate|115200 @@ -457,20 +461,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gArmTokenSpaceGuid.PcdGicDistributorBase|0xE1110000 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xE112F000 - - # - # ARM OS Loader - # -# gArmPlatformTokenSpaceGuid.PcdDefaultBootType|2 -# gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut|1 - gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Linux" - gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"PciRoot(0x0)/Pci(0x0,0x0)/Sata(0x1,0x0,0x0)/HD(1,MBR,0xDA835D19,0x80,0xBF780)/Image" - gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|"console=ttySBSA0,115200 earlyprintk=pl011,0xe1010000,115200 show_styx_info nosmp root=/dev/sda2 rootwait" - - # Use the serial console (ConIn & ConOut) - gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()" - gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()" - # # ARM Architectual Timer Frequency # @@ -553,6 +543,8 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0 +[PcdsDynamicExHii.common.DEFAULT] + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 ################################################################################ # @@ -721,7 +713,13 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf - IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Application/UiApp/UiApp.inf { + <LibraryClasses> + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf + } # # Crypto Accelerator support (RNG only) @@ -747,7 +745,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf - SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf <PcdsFixedAtBuild> diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf index f06bebc094e5..44a7cbe55c14 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf @@ -225,7 +225,8 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf - INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf # # Crypto Accelerator support (RNG only) -- 2.7.4

7 years, 12 months

[PATCH 0/2] LAN9118 Auto-Negotiation Feature Mask

by Ryan Harkin

These two patches are destined for both EDK2 and OpenPlatformPkg. The EDK2 patch should be merged first. LAN9118 investigations by Mark Rutland has shown that the Juno ARM Development Platform does not work well when LAN9118 auto-negotiates in full duplex mode. It was suggested that a PCD could be added to control the advertised features. One way of implementing the PCDi, as implemented here, is to provide a mask, where the platform developer can enable/disable features. [PATCH 1/2] EmbeddedPkg/Lan9118Dxe: PcdLan9118NegotiationFeatureMask [PATCH 2/2] Platforms/ARM: Add PcdLan9118NegotiationFeatureMask ~ ~

7 years, 12 months

[PATCH] Platforms/AMD/Styx/AmdStyxPciHostBridgeLib: set unused regions base to MAX_UINT64

by Ard Biesheuvel

An upcoming fix to the generic PciHostBridgeDxe driver code requires that the limit of an unused region does not exceed the base, since they describe a 1 byte region if base equals limit. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.c b/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.c index 432e4230a59b..8d8c76a0f7f6 100644 --- a/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.c +++ b/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.c @@ -106,9 +106,9 @@ PciHostBridgeGetRootBridges ( // // No separate ranges for prefetchable and non-prefetchable BARs // - RootBridge->PMem.Base = 0; + RootBridge->PMem.Base = MAX_UINT64; RootBridge->PMem.Limit = 0; - RootBridge->PMemAbove4G.Base = 0; + RootBridge->PMemAbove4G.Base = MAX_UINT64; RootBridge->PMemAbove4G.Limit = 0; ASSERT (FixedPcdGet64 (PcdPciMmio32Translation) == 0); -- 2.7.4

7 years, 12 months

[PATCH 00/14] Cello/Overdrive changes

by Ard Biesheuvel

Rather than sending out separate patches or subseries per topic, this is just a dump of the remaining patches I have in my queue. With this, I have a fully functioning Overdrive B1, bootable in ACPI+PSCI, DT+PSCI or DT+spintable mode. The ACPI parking protocol does not work for me at all, even without these patches. Platforms/AMD/Styx/FdtDxe: retrieve spin-table addresses for private HOB This is an alternative patch for the one Leo sent out to fix spin-table booting under DT. Rather than using the configuration table, this uses the HOB in FdtDxe, so we can get rid of the config table. Platforms/AMD/Styx/CelloBoard.dsc: remove bogus 'if $(DO_PSCI)' Platforms/AMD/Styx/CelloBoard.dsc: remove references to XGBE Just cleanups Platforms/AMD/Styx: disable legacy SMBIOS entry point generation Gets rid of the bogus 'failed to allocate below 4 GB' warnings in the DEBUG log Platforms/AMD/Styx: separate trusted FW region from primary memory HOB This fixes the issue where the first 14.5 MB are not covered by a memory reservation in the UEFI memory map. Platforms/AMD/Styx: reduce fragmentation of runtime UEFI regions Optimization Platforms/AMD/Styx: build UEFI shell from source Haven't been able to reproduce the issue that this causes for Ricardo, but it is unlikely to be caused by the change itself, but by the reshuffling of the modules in the firmware image Platforms/AMD/AmdStyxHelperLib: remove AmdStyxGetArmProcessorTable () function No longer used after the first patch above. Platforms/AMD/Styx: move parking protocol handling to ACPI platform driver Needed so we can disable/remove FdtDxe and still use the ACPI parking protocol Platforms/AMD/Styx/AcpiPlatformDxe: use dynamically allocated pen Needed to get rid of the fixed allocation, which could fail if some other driver happened to get an allocation there. Any future driver that does a bottom up allocation rather than topdown will get the region in question Platforms/AMD/Styx: implement SPI flash runtime driver to back the varstore Platforms/AMD/Styx: reshuffle flash layout and add variable store region Platforms/AMD/Styx: reallocate the in-memory copy of the varstore FV Platforms/AMD/Styx: switch to the real variable runtime driver Same patches as before. The only difference is that I kept the size of the firmware volume, and only stole the top 128 KB for the variable store. Platforms/AMD/Styx/AcpiTables/AcpiTables.inf | 1 - Platforms/AMD/Styx/AcpiTables/Madt.c | 16 +- Platforms/AMD/Styx/AmdStyx.dec | 12 +- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 76 +-- Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 20 +- Platforms/AMD/Styx/Common/AmdStyxAcpiLib.h | 2 +- Platforms/AMD/Styx/Common/AmdStyxHelperLib.h | 5 - Platforms/AMD/Styx/Common/Varstore.fdf.inc | 70 +++ Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c | 19 +- Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf | 14 +- Platforms/AMD/Styx/{OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c => Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.c} | 23 +- Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.h | 19 + Platforms/AMD/Styx/{OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoaderHelper.S => Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocolHelper.S} | 0 Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c | 503 ++++++++++++++++++++ Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.inf | 63 +++ Platforms/AMD/Styx/Library/AmdStyxHelperLib/AmdStyxHelperLib.c | 18 - Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c | 97 +++- Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf | 9 + Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c | 10 +- Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c | 5 - Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf | 8 +- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 48 +- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf | 8 +- 23 files changed, 901 insertions(+), 145 deletions(-) create mode 100644 Platforms/AMD/Styx/Common/Varstore.fdf.inc rename Platforms/AMD/Styx/{OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c => Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.c} (83%) create mode 100644 Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.h rename Platforms/AMD/Styx/{OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoaderHelper.S => Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocolHelper.S} (100%) create mode 100644 Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c create mode 100644 Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.inf -- 2.7.4

7 years, 12 months

[PATCH] Platforms/AMD/Styx: reduce fragmentation of runtime UEFI regions

by Ard Biesheuvel

This increases the preallocation sizes for UEFI runtime services code and data regions. This does not actually affect the footprint, but it reserves memory zones early on so that all allocations of each type can be served from adjacent regions. With this patch applied, we end up with fewer entries in the memory map, resulting in more efficient page tables due to the lower fragmentation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Just look at the memory map the kernel prints out when efi=debug is passed on the kernel command line. Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 4 ++-- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index e75c37338563..620518108e98 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -374,8 +374,8 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0 - gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|50 - gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|20 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|1000 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|1000 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|12000 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20 diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 8865706df8a4..aa64be59a204 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -378,8 +378,8 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0 - gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|50 - gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|20 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|1000 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|1000 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|12000 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20 -- 2.7.4

7 years, 12 months

[PATCH] Platforms/AMD/AmdStyxLib: remove lowest gigabyte from 1:1 mapping

by Ard Biesheuvel

The physical region [0x0, 0x4000_0000) is not used on Seattle for non-secure devices or memory, and inadvertent accesses in this region (e.g., NULL pointer dereferences) seem to be causing SErrors. So leave the region unmapped: this does not fix the issues causing the SErrors, but the aborts will at least be synchronous. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Platforms/AMD/Styx/Library/AmdStyxLib/StyxMem.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Platforms/AMD/Styx/Library/AmdStyxLib/StyxMem.c b/Platforms/AMD/Styx/Library/AmdStyxLib/StyxMem.c index 9202e38864d4..dc45b68c3ce8 100644 --- a/Platforms/AMD/Styx/Library/AmdStyxLib/StyxMem.c +++ b/Platforms/AMD/Styx/Library/AmdStyxLib/StyxMem.c @@ -93,10 +93,10 @@ ArmPlatformGetVirtualMemoryMap ( DEBUG ((EFI_D_ERROR, " Memory Map\n------------------------------------------------------------------------\n")); DEBUG ((EFI_D_ERROR, "Description : START - END [ SIZE ] { ATTR }\n")); - // 0x00_0000_0000 - 0x7F_FFFF_FFFF: Mapped I/O space - VirtualMemoryTable[Index].PhysicalBase = 0x0000000000ULL; - VirtualMemoryTable[Index].VirtualBase = 0x0000000000ULL; - VirtualMemoryTable[Index].Length = 0x8000000000ULL; + // 0x00_4000_0000 - 0x7F_FFFF_FFFF: Mapped I/O space + VirtualMemoryTable[Index].PhysicalBase = 0x0040000000ULL; + VirtualMemoryTable[Index].VirtualBase = 0x0040000000ULL; + VirtualMemoryTable[Index].Length = 0x7FC0000000ULL; VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; LOG_MEM ("I/O Space : 0x%016lx - 0x%016lx [ 0x%016lx ] { %a }\n"); -- 2.7.4

7 years, 12 months

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Linaro-uefi May 2016