System initialization on D05 has some differences from that on D02 and D03, so we extract more platform system control interfaces to support D05 within the same architectural modules.
The actual function definitions are in PlatformSysCtrlLib which is a binary, and will be updated later.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo heyi.guo@linaro.org --- Chips/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/Chips/Hisilicon/Include/Library/PlatformSysCtrlLib.h b/Chips/Hisilicon/Include/Library/PlatformSysCtrlLib.h index f374112..ec2b9a3 100644 --- a/Chips/Hisilicon/Include/Library/PlatformSysCtrlLib.h +++ b/Chips/Hisilicon/Include/Library/PlatformSysCtrlLib.h @@ -90,8 +90,17 @@ VOID DResetUsb (); UINT32 PlatformGetEhciBase (); UINT32 PlatformGetOhciBase (); VOID PlatformPllInit(); +// PLL initialization for super IO clusters. +VOID SiclPllInit(UINT32 SclId); VOID PlatformDeviceDReset(); VOID PlatformGicdInit(); VOID PlatformLpcInit(); +// Synchronize architecture timer counter between different super computing +// clusters. +VOID PlatformArchTimerSynchronize(VOID); +VOID PlatformEventBroadcastConfig(VOID); +UINTN GetDjtagRegBase(UINT32 NodeId); +VOID LlcCleanInvalidateAsm(VOID); +VOID PlatformMdioInit(VOID);
#endif