From: Heyi Guo heyi.guo@linaro.org
the interrupt 74 was omited and 160 was added by mistake. correct this error.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Xiaofei Tan tanxiaofei@huawei.com Revied-by: John Garry john.garry@huawei.com --- .../Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl | 72 +++++++++++----------- .../Hi1610/Hi1610AcpiTables/Dsdt/D03Sas.asl | 72 +++++++++++----------- 2 files changed, 72 insertions(+), 72 deletions(-)
diff --git a/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl b/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl index 7265ac8..46b8db0 100644 --- a/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl +++ b/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl @@ -48,24 +48,24 @@ Scope(_SB) { 64,65,66,67,68, 69,70,71,72,73, - 75,76,77,78,79, - 80,81,82,83,84, - 85,86,87,88,89, - 90,91,92,93,94, - 95,96,97,98,99, - 100,101,102,103,104, - 105,106,107,108,109, - 110,111,112,113,114, - 115,116,117,118,119, - 120,121,122,123,124, - 125,126,127,128,129, - 130,131,132,133,134, - 135,136,137,138,139, - 140,141,142,143,144, - 145,146,147,148,149, - 150,151,152,153,154, - 155,156,157,158,159, - 160, + 74,75,76,77,78, + 79,80,81,82,83, + 84,85,86,87,88, + 89,90,91,92,93, + 94,95,96,97,98, + 99,100,101,102,103, + 104,105,106,107,108, + 109,110,111,112,113, + 114,115,116,117,118, + 119,120,121,122,123, + 124,125,126,127,128, + 129,130,131,132,133, + 134,135,136,137,138, + 139,140,141,142,143, + 144,145,146,147,148, + 149,150,151,152,153, + 154,155,156,157,158, + 159, }
Interrupt (ResourceProducer, Edge, ActiveHigh, Exclusive, ,, ) @@ -238,24 +238,24 @@ Name(_PRS, ResourceTemplate() { { 64,65,66,67,68, 69,70,71,72,73, - 75,76,77,78,79, - 80,81,82,83,84, - 85,86,87,88,89, - 90,91,92,93,94, - 95,96,97,98,99, - 100,101,102,103,104, - 105,106,107,108,109, - 110,111,112,113,114, - 115,116,117,118,119, - 120,121,122,123,124, - 125,126,127,128,129, - 130,131,132,133,134, - 135,136,137,138,139, - 140,141,142,143,144, - 145,146,147,148,149, - 150,151,152,153,154, - 155,156,157,158,159, - 160, + 74,75,76,77,78, + 79,80,81,82,83, + 84,85,86,87,88, + 89,90,91,92,93, + 94,95,96,97,98, + 99,100,101,102,103, + 104,105,106,107,108, + 109,110,111,112,113, + 114,115,116,117,118, + 119,120,121,122,123, + 124,125,126,127,128, + 129,130,131,132,133, + 134,135,136,137,138, + 139,140,141,142,143, + 144,145,146,147,148, + 149,150,151,152,153, + 154,155,156,157,158, + 159, }
Interrupt (Resourceproducer, Edge, ActiveHigh, Exclusive, ,, ) diff --git a/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Sas.asl b/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Sas.asl index 9944a50..7b5d4de 100644 --- a/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Sas.asl +++ b/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Sas.asl @@ -25,24 +25,24 @@ Scope(_SB) { 64,65,66,67,68, 69,70,71,72,73, - 75,76,77,78,79, - 80,81,82,83,84, - 85,86,87,88,89, - 90,91,92,93,94, - 95,96,97,98,99, - 100,101,102,103,104, - 105,106,107,108,109, - 110,111,112,113,114, - 115,116,117,118,119, - 120,121,122,123,124, - 125,126,127,128,129, - 130,131,132,133,134, - 135,136,137,138,139, - 140,141,142,143,144, - 145,146,147,148,149, - 150,151,152,153,154, - 155,156,157,158,159, - 160, + 74,75,76,77,78, + 79,80,81,82,83, + 84,85,86,87,88, + 89,90,91,92,93, + 94,95,96,97,98, + 99,100,101,102,103, + 104,105,106,107,108, + 109,110,111,112,113, + 114,115,116,117,118, + 119,120,121,122,123, + 124,125,126,127,128, + 129,130,131,132,133, + 134,135,136,137,138, + 139,140,141,142,143, + 144,145,146,147,148, + 149,150,151,152,153, + 154,155,156,157,158, + 159, }
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, 0, "\_SB.MBI6" ) @@ -140,24 +140,24 @@ Scope(_SB) { 64,65,66,67,68, 69,70,71,72,73, - 75,76,77,78,79, - 80,81,82,83,84, - 85,86,87,88,89, - 90,91,92,93,94, - 95,96,97,98,99, - 100,101,102,103,104, - 105,106,107,108,109, - 110,111,112,113,114, - 115,116,117,118,119, - 120,121,122,123,124, - 125,126,127,128,129, - 130,131,132,133,134, - 135,136,137,138,139, - 140,141,142,143,144, - 145,146,147,148,149, - 150,151,152,153,154, - 155,156,157,158,159, - 160, + 74,75,76,77,78, + 79,80,81,82,83, + 84,85,86,87,88, + 89,90,91,92,93, + 94,95,96,97,98, + 99,100,101,102,103, + 104,105,106,107,108, + 109,110,111,112,113, + 114,115,116,117,118, + 119,120,121,122,123, + 124,125,126,127,128, + 129,130,131,132,133, + 134,135,136,137,138, + 139,140,141,142,143, + 144,145,146,147,148, + 149,150,151,152,153, + 154,155,156,157,158, + 159, }
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, 0, "\_SB.MBI1")