- Linux-kselftest-mirror - lists.linaro.org

[PATCH] selftests/timers: Improve POSIX timer test messages

by I Viswanath

- Break up the ksft_print_msg statements to follow the 80 char rule. - Capitalize "POSIX" and rephrase messages for better readability. - Clarify that false negatives may occur in tests relying on timers if other threads run on the CPU. Signed-off-by: I Viswanath <viswanathiyyappan(a)gmail.com> --- tools/testing/selftests/timers/posix_timers.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/timers/posix_timers.c b/tools/testing/selftests/timers/posix_timers.c index f0eceb0faf34..017a9e19ad0f 100644 --- a/tools/testing/selftests/timers/posix_timers.c +++ b/tools/testing/selftests/timers/posix_timers.c @@ -673,8 +673,9 @@ int main(int argc, char **argv) ksft_print_header(); ksft_set_plan(19); - ksft_print_msg("Testing posix timers. False negative may happen on CPU execution \n"); - ksft_print_msg("based timers if other threads run on the CPU...\n"); + ksft_print_msg("Testing POSIX timers.\n"); + ksft_print_msg("False negatives may occur in tests\n"); + ksft_print_msg("relying on timers if other threads run on the CPU\n"); check_timer_create_exact(); -- 2.50.1

2 months, 3 weeks

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Re: [PATCH v2 13/20] x86/mm: enable page table sharing

by Yongting Lin

Thank you! Anthony. Yep, I checked the comments in arch/mm/x86/fault.c file which says as your advices in previous email. I changed my code in kernel 5.5 as below: if (unlikely(is_shared_vma) && ((fault & VM_FAULT_RETRY) && (flags & FAULT_FLAG_ALLOW_RETRY) || fault_signal_pending(fault, regs))) mmap_read_unlock(mm); BTW: I wrote some selftests in my github repostory, which perform the basic function of mshare, and I will write some complicated cases to support the new functions or defect found in mshare. For example, once you support mshare as a VMA in KVM (just as the defeat viewed by Jann Horn), I will add extra test cases to verify its correctiness for this scenario. From Jann Horn's review: https://lore.kernel.org/all/CAG48ez3cUZf+xOtP6UkkS2-CmOeo+3K5pvny0AFL_XBkHh… Currently, I put my selftest in my github repostory, and you could retrieve it as below: git remote add yongting-mshare-selftests https://github.com/ivanalgo/linux-kernel-develop/ git fetch yongting-mshare-selftests dev-mshare-v2-selftest-v1 git cherry-pick a64f2ff6497d13c09badc0fc68c44d9995bc2fef At this stage, I am not sure what is the best way to proceed: - Should I send them as part of your next version (v3)? - Or should I post them separately as [RFC PATCH] for early review? Please let me know your preference and any sugestion is welcome. I am happy to rebase and resend in the format that works best for the community. Thanks Yongting > Anthony > >> >> As a result, needs to release vma->vm_mm.mmap_lock as well. >> >> So it is supposed to be like below: >> >> - fault = handle_mm_fault(vma, address, flags, regs); >> + fault = handle_mm_fault(vma, addr, flags, regs); >> + >> + if (unlikely(is_shared_vma) && ((fault & VM_FAULT_COMPLETED) || >> + (fault & VM_FAULT_RETRY) || fault_signal_pending(fault, regs))) { >> + mmap_read_unlock(vma->vm_mm); >> + mmap_read_unlock(mm); >> + } >> >>> if (fault_signal_pending(fault, regs)) { >>> /* >>> @@ -1413,6 +1446,8 @@ void do_user_addr_fault(struct pt_regs *regs, >>> goto retry; >>> } >>> + if (unlikely(is_shared_vma)) >>> + mmap_read_unlock(vma->vm_mm); >>> mmap_read_unlock(mm); >>> done: >>> if (likely(!(fault & VM_FAULT_ERROR))) >>> diff --git a/mm/Kconfig b/mm/Kconfig >>> index e6c90db83d01..8a5a159457f2 100644 >>> --- a/mm/Kconfig >>> +++ b/mm/Kconfig >>> @@ -1344,7 +1344,7 @@ config PT_RECLAIM >>> config MSHARE >>> bool "Mshare" >>> - depends on MMU >>> + depends on MMU && ARCH_SUPPORTS_MSHARE >>> help >>> Enable msharefs: A ram-based filesystem that allows multiple >>> processes to share page table entries for shared pages. A file >> >> Yongting Lin. > >

2 months, 3 weeks

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[PATCH net-next] selftests: drv-net: tso: increase the retransmit threshold

by Jakub Kicinski

We see quite a few flakes during the TSO test against virtualized devices in NIPA. There's often 10-30 retransmissions during the test. Sometimes as many as 100. Set the retransmission threshold at 1/4th of the wire frame target. Signed-off-by: Jakub Kicinski <kuba(a)kernel.org> --- CC: shuah(a)kernel.org CC: willemb(a)google.com CC: daniel.zahka(a)gmail.com CC: linux-kselftest(a)vger.kernel.org --- tools/testing/selftests/drivers/net/hw/tso.py | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/tools/testing/selftests/drivers/net/hw/tso.py b/tools/testing/selftests/drivers/net/hw/tso.py index c13dd5efa27a..0998e68ebaf0 100755 --- a/tools/testing/selftests/drivers/net/hw/tso.py +++ b/tools/testing/selftests/drivers/net/hw/tso.py @@ -60,16 +60,17 @@ from lib.py import bkg, cmd, defer, ethtool, ip, rand_port, wait_port_listen sock_wait_drain(sock) qstat_new = cfg.netnl.qstats_get({"ifindex": cfg.ifindex}, dump=True)[0] - # No math behind the 10 here, but try to catch cases where - # TCP falls back to non-LSO. - ksft_lt(tcp_sock_get_retrans(sock), 10) - sock.close() - # Check that at least 90% of the data was sent as LSO packets. # System noise may cause false negatives. Also header overheads # will add up to 5% of extra packes... The check is best effort. total_lso_wire = len(buf) * 0.90 // cfg.dev["mtu"] total_lso_super = len(buf) * 0.90 // cfg.dev["tso_max_size"] + + # Make sure we have order of magnitude more LSO packets than + # retransmits, in case TCP retransmitted all the LSO packets. + ksft_lt(tcp_sock_get_retrans(sock), total_lso_wire / 4) + sock.close() + if should_lso: if cfg.have_stat_super_count: ksft_ge(qstat_new['tx-hw-gso-packets'] - -- 2.50.1

2 months, 3 weeks

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[PATCH net-next] selftests: drv-net: ncdevmem: make configure_channels() support combined channels

by Jakub Kicinski

ncdevmem tests that the kernel correctly rejects attempts to deactivate queues with MPs bound. Make the configure_channels() test support combined channels. Currently it tries to set the queue counts to rx N tx N-1, which only makes sense for devices which have IRQs per ring type. Most modern devices used combined IRQs/channels with both Rx and Tx queues. Since the math is total Rx == combined+Rx setting Rx when combined is non-zero will be increasing the total queue count, not decreasing as the test intends. Note that the test would previously also try to set the Tx ring count to Rx - 1, for some reason. Which would be 0 if the device has only 2 queues configured. With this change (device with 2 queues): setting channel count rx:1 tx:1 YNL set channels: Kernel error: 'requested channel counts are too low for existing memory provider setting (2)' Signed-off-by: Jakub Kicinski <kuba(a)kernel.org> --- CC: shuah(a)kernel.org CC: almasrymina(a)google.com CC: sdf(a)fomichev.me CC: joe(a)dama.to CC: linux-kselftest(a)vger.kernel.org --- .../selftests/drivers/net/hw/ncdevmem.c | 78 ++++++++++++++++++- 1 file changed, 76 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/drivers/net/hw/ncdevmem.c b/tools/testing/selftests/drivers/net/hw/ncdevmem.c index be937542b4c0..71961a7688e6 100644 --- a/tools/testing/selftests/drivers/net/hw/ncdevmem.c +++ b/tools/testing/selftests/drivers/net/hw/ncdevmem.c @@ -356,7 +356,81 @@ static int configure_rss(void) static int configure_channels(unsigned int rx, unsigned int tx) { - return run_command("ethtool -L %s rx %u tx %u", ifname, rx, tx); + struct ethtool_channels_get_req *gchan; + struct ethtool_channels_set_req *schan; + struct ethtool_channels_get_rsp *chan; + struct ynl_error yerr; + struct ynl_sock *ys; + int ret; + + fprintf(stderr, "setting channel count rx:%u tx:%u\n", rx, tx); + + ys = ynl_sock_create(&ynl_ethtool_family, &yerr); + if (!ys) { + fprintf(stderr, "YNL: %s\n", yerr.msg); + return -1; + } + + gchan = ethtool_channels_get_req_alloc(); + if (!gchan) { + ret = -1; + goto exit_close_sock; + } + + ethtool_channels_get_req_set_header_dev_index(gchan, ifindex); + chan = ethtool_channels_get(ys, gchan); + ethtool_channels_get_req_free(gchan); + if (!chan) { + fprintf(stderr, "YNL get channels: %s\n", ys->err.msg); + ret = -1; + goto exit_close_sock; + } + + schan = ethtool_channels_set_req_alloc(); + if (!schan) { + ret = -1; + goto exit_free_chan; + } + + ethtool_channels_set_req_set_header_dev_index(schan, ifindex); + + if (chan->_present.combined_count) { + if (chan->_present.rx_count || chan->_present.tx_count) { + ethtool_channels_set_req_set_rx_count(schan, 0); + ethtool_channels_set_req_set_tx_count(schan, 0); + } + + if (rx == tx) { + ethtool_channels_set_req_set_combined_count(schan, rx); + } else if (rx > tx) { + ethtool_channels_set_req_set_combined_count(schan, tx); + ethtool_channels_set_req_set_rx_count(schan, rx - tx); + } else { + ethtool_channels_set_req_set_combined_count(schan, rx); + ethtool_channels_set_req_set_tx_count(schan, tx - rx); + } + + ret = ethtool_channels_set(ys, schan); + if (ret) + fprintf(stderr, "YNL set channels: %s\n", ys->err.msg); + } else if (chan->_present.rx_count) { + ethtool_channels_set_req_set_rx_count(schan, rx); + ethtool_channels_set_req_set_tx_count(schan, tx); + + ret = ethtool_channels_set(ys, schan); + if (ret) + fprintf(stderr, "YNL set channels: %s\n", ys->err.msg); + } else { + fprintf(stderr, "Error: device has neither combined nor rx channels\n"); + ret = -1; + } + ethtool_channels_set_req_free(schan); +exit_free_chan: + ethtool_channels_get_rsp_free(chan); +exit_close_sock: + ynl_sock_destroy(ys); + + return ret; } static int configure_flow_steering(struct sockaddr_in6 *server_sin) @@ -752,7 +826,7 @@ void run_devmem_tests(void) error(1, 0, "Failed to bind\n"); /* Deactivating a bound queue should not be legal */ - if (!configure_channels(num_queues, num_queues - 1)) + if (!configure_channels(num_queues, num_queues)) error(1, 0, "Deactivating a bound queue should be illegal.\n"); /* Closing the netlink socket does an implicit unbind */ -- 2.50.1

2 months, 3 weeks

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[RFC PATCH v3 0/2] cgroup: Track time in cgroup v2 freezer

by Tiffany Yang

Hello, The cgroup v2 freezer controller is useful for freezing background applications so they don't contend with foreground tasks. However, this may disrupt any internal monitoring that the application is performing, as it may not be aware that it was frozen. To illustrate, an application might implement a watchdog thread to monitor a high-priority task by periodically checking its state to ensure progress. The challenge is that the task only advances when the application is running, but watchdog timers are set relative to system time, not app time. If the app is frozen and misses the expected deadline, the watchdog, unaware of this pause, may kill a healthy process. This series tracks the time that each cgroup spends "freezing" and exposes it via cgroup.freeze.stat.local. If others prefer, I can instead create cgroup.stat.local and allow the freeze time accounting to be accessed there instead. This version includes several basic selftests. I would find feedback especially useful here! Along with testing basic functionality, I wanted to demonstrate the following relationships: 1. Freeze time will increase while a cgroup is freezing, regardless of whether it is frozen or not. 2. Each cgroup's freeze time is independent from the other cgroups in its hierarchy. I was hoping to show (1.) with a test that freezes a cgroup and then checks its freeze time while cgroup.events still shows "frozen 0", but I am having trouble writing a case that can reliably cause this (even when letting a forkbomb grow for a while before attempting to freeze!). Ideally, I could populate a test cgroup with an unfreezable task. Is there an elegant way to create a process from a selftest that will become TASK_INTERRUPTIBLE? The main challenge in establishing (2.) is that in order to make a meaningful comparison between two cgroups' freeze times, they need to be obtained at around the same time. The test process may check one cgroup's freeze time, but then it may be preempted and delayed from checking another cgroup's for a relatively "long" time. I have tried to use sleeps to increase what a "long" time would be, but this possibility makes tests like test_cgfreezer_time_parent non-deterministic, so I am a bit squeamish about adding it here. Any suggestions for better tests or anything else would be welcome. Thank you! Tiffany Signed-off-by: Tiffany Yang <ynaffit(a)google.com> --- v3: * Use seqcount along with css_set_lock to guard freeze time accesses as suggested by Michal Koutný * Add selftests v2: https://lore.kernel.org/lkml/20250714050008.2167786-2-ynaffit@google.com/ * Track per-cgroup freezing time instead of per-task frozen time as suggested by Tejun Heo v1: https://lore.kernel.org/lkml/20250603224304.3198729-3-ynaffit@google.com/ Cc: John Stultz <jstultz(a)google.com> Cc: Thomas Gleixner <tglx(a)linutronix.de> Cc: Stephen Boyd <sboyd(a)kernel.org> Cc: Anna-Maria Behnsen <anna-maria(a)linutronix.de> Cc: Frederic Weisbecker <frederic(a)kernel.org> Cc: Tejun Heo <tj(a)kernel.org> Cc: Johannes Weiner <hannes(a)cmpxchg.org> Cc: Michal Koutný <mkoutny(a)suse.com> Cc: "Rafael J. Wysocki" <rafael(a)kernel.org> Cc: Pavel Machek <pavel(a)kernel.org> Cc: Roman Gushchin <roman.gushchin(a)linux.dev> Cc: Chen Ridong <chenridong(a)huawei.com> Tiffany Yang (2): cgroup: cgroup.freeze.stat.local time accounting cgroup: selftests: Add tests for freezer time Documentation/admin-guide/cgroup-v2.rst | 20 + include/linux/cgroup-defs.h | 17 + kernel/cgroup/cgroup.c | 28 + kernel/cgroup/freezer.c | 10 +- tools/testing/selftests/cgroup/test_freezer.c | 686 ++++++++++++++++++ 5 files changed, 759 insertions(+), 2 deletions(-) -- 2.50.1.565.gc32cd1483b-goog

2 months, 3 weeks

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[PATCH] selftests/x86: fix coding style errors in test_syscall_vdso.c

by Raphael Pinsonneault-Thibeault

fix 68 checkpatch errors in tools/testing/selftests/x86/test_syscall_vdso.c: add void to function definitions without parameters fix whitespace in charp array definitions fix whitespace in printf statements Signed-off-by: Raphael Pinsonneault-Thibeault <rpthibeault(a)gmail.com> --- for the whitespace errors, attempted to maintain the ��prettiness�� of the charp definition and the printf statements .../testing/selftests/x86/test_syscall_vdso.c | 59 ++++++++++--------- 1 file changed, 30 insertions(+), 29 deletions(-) diff --git a/tools/testing/selftests/x86/test_syscall_vdso.c b/tools/testing/selftests/x86/test_syscall_vdso.c index 8965c311bd65..ee98c3cf4f56 100644 --- a/tools/testing/selftests/x86/test_syscall_vdso.c +++ b/tools/testing/selftests/x86/test_syscall_vdso.c @@ -116,10 +116,10 @@ void print_regs64(void) { if (!kernel_is_64bit) return; - printf("ax:%016llx bx:%016llx cx:%016llx dx:%016llx\n", regs64.rax, regs64.rbx, regs64.rcx, regs64.rdx); - printf("si:%016llx di:%016llx bp:%016llx sp:%016llx\n", regs64.rsi, regs64.rdi, regs64.rbp, regs64.rsp); - printf(" 8:%016llx 9:%016llx 10:%016llx 11:%016llx\n", regs64.r8 , regs64.r9 , regs64.r10, regs64.r11); - printf("12:%016llx 13:%016llx 14:%016llx 15:%016llx\n", regs64.r12, regs64.r13, regs64.r14, regs64.r15); + printf("ax:%016llx bx:%016llx cx:%016llx dx:%016llx\n", regs64.rax, regs64.rbx, regs64.rcx, regs64.rdx); + printf("si:%016llx di:%016llx bp:%016llx sp:%016llx\n", regs64.rsi, regs64.rdi, regs64.rbp, regs64.rsp); + printf(" 8:%016llx 9:%016llx 10:%016llx 11:%016llx\n", regs64.r8, regs64.r9, regs64.r10, regs64.r11); + printf("12:%016llx 13:%016llx 14:%016llx 15:%016llx\n", regs64.r12, regs64.r13, regs64.r14, regs64.r15); } int check_regs64(void) @@ -179,7 +179,7 @@ struct { int sz; } sigmask_desc; -void prep_args() +void prep_args(void) { nfds = 42; FD_ZERO(&rfds); @@ -201,28 +201,28 @@ void prep_args() static void print_flags(const char *name, unsigned long r) { static const char *bitarray[] = { - "\n" ,"c\n" ,/* Carry Flag */ - "0 " ,"1 " ,/* Bit 1 - always on */ - "" ,"p " ,/* Parity Flag */ - "0 " ,"3? " , - "" ,"a " ,/* Auxiliary carry Flag */ - "0 " ,"5? " , - "" ,"z " ,/* Zero Flag */ - "" ,"s " ,/* Sign Flag */ - "" ,"t " ,/* Trap Flag */ - "" ,"i " ,/* Interrupt Flag */ - "" ,"d " ,/* Direction Flag */ - "" ,"o " ,/* Overflow Flag */ - "0 " ,"1 " ,/* I/O Privilege Level (2 bits) */ - "0" ,"1" ,/* I/O Privilege Level (2 bits) */ - "" ,"n " ,/* Nested Task */ - "0 " ,"15? ", - "" ,"r " ,/* Resume Flag */ - "" ,"v " ,/* Virtual Mode */ - "" ,"ac " ,/* Alignment Check/Access Control */ - "" ,"vif ",/* Virtual Interrupt Flag */ - "" ,"vip ",/* Virtual Interrupt Pending */ - "" ,"id " ,/* CPUID detection */ + "\n", "c\n", /* Carry Flag */ + "0 ", "1 ", /* Bit 1 - always on */ + "", "p ", /* Parity Flag */ + "0 ", "3? ", + "", "a ", /* Auxiliary carry Flag */ + "0 ", "5? ", + "", "z ", /* Zero Flag */ + "", "s ", /* Sign Flag */ + "", "t ", /* Trap Flag */ + "", "i ", /* Interrupt Flag */ + "", "d ", /* Direction Flag */ + "", "o ", /* Overflow Flag */ + "0 ", "1 ", /* I/O Privilege Level (2 bits) */ + "0", "1", /* I/O Privilege Level (2 bits) */ + "", "n ", /* Nested Task */ + "0 ", "15? ", + "", "r ", /* Resume Flag */ + "", "v ", /* Virtual Mode */ + "", "ac ", /* Alignment Check/Access Control */ + "", "vif ", /* Virtual Interrupt Flag */ + "", "vip ", /* Virtual Interrupt Pending */ + "", "id ", /* CPUID detection */ NULL }; const char **bitstr; @@ -320,7 +320,7 @@ int run_syscall(void) return check_regs64(); } -int run_syscall_twice() +int run_syscall_twice(void) { int exitcode = 0; long sv; @@ -337,7 +337,7 @@ int run_syscall_twice() return exitcode; } -void ptrace_me() +void ptrace_me(void) { pid_t pid; @@ -356,6 +356,7 @@ void ptrace_me() printf("[RUN]\tRunning tests under ptrace\n"); while (1) { int status; + pid = waitpid(-1, &status, __WALL); if (WIFEXITED(status)) exit(WEXITSTATUS(status)); -- 2.43.0

2 months, 3 weeks

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[PATCH] selftests/futex: Fix some futex_numa_mpol subtests

by Waiman Long

The "Memory out of range" subtest of futex_numa_mpol assumes that memory access outside of the mmap'ed area is invalid. That may not be the case depending on the actual memory layout of the test application. When that subtest was run on an x86-64 system with latest upstream kernel, the test passed as an error was returned from futex_wake(). On another powerpc system, the same subtest failed because futex_wake() returned 0. Bail out! futex2_wake(64, 0x86) should fail, but didn't Looking further into the passed subtest on x86-64, it was found that an -EINVAL was returned instead of -EFAULT. The -EINVAL error was returned because the node value test with FLAGS_NUMA set failed with a node value of 0x7f7f. IOW, the futex memory was accessible and futex_wake() failed because the supposed node number wasn't valid. If that memory location happens to have a very small value (e.g. 0), the test will pass and no error will be returned. Since this subtest is non-deterministic, it is dropped unless we explicitly set a guard page beyond the mmap region. The other problematic test is the "Memory too small" test. The futex_wake() function returns the -EINVAL error code because the given futex address isn't 8-byte aligned, not because only 4 of the 8 bytes are valid and the other 4 bytes are not. So proper name of this subtest is changed to "Mis-aligned futex" to reflect the reality. Fixes: 3163369407ba ("selftests/futex: Add futex_numa_mpol") Signed-off-by: Waiman Long <longman(a)redhat.com> --- tools/testing/selftests/futex/functional/futex_numa_mpol.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/tools/testing/selftests/futex/functional/futex_numa_mpol.c b/tools/testing/selftests/futex/functional/futex_numa_mpol.c index a9ecfb2d3932..802c15c82190 100644 --- a/tools/testing/selftests/futex/functional/futex_numa_mpol.c +++ b/tools/testing/selftests/futex/functional/futex_numa_mpol.c @@ -182,12 +182,10 @@ int main(int argc, char *argv[]) if (futex_numa->numa == FUTEX_NO_NODE) ksft_exit_fail_msg("NUMA node is left uninitialized\n"); - ksft_print_msg("Memory too small\n"); + /* FUTEX2_NUMA futex must be 8-byte aligned */ + ksft_print_msg("Mis-aligned futex\n"); test_futex(futex_ptr + mem_size - 4, 1); - ksft_print_msg("Memory out of range\n"); - test_futex(futex_ptr + mem_size, 1); - futex_numa->numa = FUTEX_NO_NODE; mprotect(futex_ptr, mem_size, PROT_READ); ksft_print_msg("Memory, RO\n"); -- 2.50.1

2 months, 3 weeks

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[PATCH] selftests/powerpc: fix spelling errors across test sources

by Nikil Paul S

Fix a number of minor spelling mistakes in selftests/powerpc sources, including ptrace, tm, pmu, math, alignment, and gzip tests. These changes improve readability of test messages and comments without affecting functionality as only comments were edited. Signed-off-by: Nikil Paul S <snikilpaul(a)gmail.com> --- .../selftests/powerpc/alignment/alignment_handler.c | 4 ++-- tools/testing/selftests/powerpc/math/vmx_preempt.c | 2 +- tools/testing/selftests/powerpc/math/vsx_asm.S | 2 +- tools/testing/selftests/powerpc/math/vsx_preempt.c | 2 +- tools/testing/selftests/powerpc/nx-gzip/gunz_test.c | 2 +- .../pmu/event_code_tests/group_constraint_cache_test.c | 4 ++-- .../pmu/event_code_tests/group_constraint_l2l3_sel_test.c | 6 +++--- .../group_constraint_radix_scope_qual_test.c | 4 ++-- .../event_code_tests/group_constraint_thresh_cmp_test.c | 8 ++++---- .../event_code_tests/group_constraint_thresh_ctl_test.c | 4 ++-- .../event_code_tests/group_constraint_thresh_sel_test.c | 4 ++-- .../pmu/event_code_tests/group_constraint_unit_test.c | 8 ++++---- tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c | 4 ++-- .../powerpc/pmu/sampling_tests/mmcra_bhrb_cond_test.c | 2 +- .../sampling_tests/mmcra_bhrb_disable_no_branch_test.c | 2 +- .../powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c | 2 +- .../powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c | 2 +- tools/testing/selftests/powerpc/ptrace/ptrace-pkey.c | 2 +- tools/testing/selftests/powerpc/tm/tm-signal-msr-resv.c | 2 +- tools/testing/selftests/powerpc/tm/tm-signal-stack.c | 4 ++-- tools/testing/selftests/powerpc/tm/tm-sigreturn.c | 2 +- tools/testing/selftests/powerpc/tm/tm-tar.c | 2 +- tools/testing/selftests/powerpc/tm/tm-tmspr.c | 2 +- tools/testing/selftests/powerpc/tm/tm-trap.c | 4 ++-- 24 files changed, 40 insertions(+), 40 deletions(-) diff --git a/tools/testing/selftests/powerpc/alignment/alignment_handler.c b/tools/testing/selftests/powerpc/alignment/alignment_handler.c index 33ee34fc0828..abd9267bc68c 100644 --- a/tools/testing/selftests/powerpc/alignment/alignment_handler.c +++ b/tools/testing/selftests/powerpc/alignment/alignment_handler.c @@ -10,7 +10,7 @@ * * We create two sets of source and destination buffers, one in regular memory, * the other cache-inhibited (by default we use /dev/fb0 for this, but an - * alterative path for cache-inhibited memory may be provided, e.g. memtrace). + * alternative path for cache-inhibited memory may be provided, e.g. memtrace). * * We initialise the source buffers, then use whichever set of load/store * instructions is under test to copy bytes from the source buffers to the @@ -215,7 +215,7 @@ int test_memcmp(void *s1, void *s2, int n, int offset, char *test_name) } /* - * Do two memcpy tests using the same instructions. One cachable + * Do two memcpy tests using the same instructions. One cacheable * memory and the other doesn't. */ int do_test(char *test_name, void (*test_func)(char *, char *)) diff --git a/tools/testing/selftests/powerpc/math/vmx_preempt.c b/tools/testing/selftests/powerpc/math/vmx_preempt.c index 6f7cf400c687..475060728d5e 100644 --- a/tools/testing/selftests/powerpc/math/vmx_preempt.c +++ b/tools/testing/selftests/powerpc/math/vmx_preempt.c @@ -74,7 +74,7 @@ int test_preempt_vmx(void) } setbuf(stdout, NULL); - /* Not really nessesary but nice to wait for every thread to start */ + /* Not really necessary but nice to wait for every thread to start */ printf("\tWaiting for all workers to start..."); while(threads_starting) asm volatile("": : :"memory"); diff --git a/tools/testing/selftests/powerpc/math/vsx_asm.S b/tools/testing/selftests/powerpc/math/vsx_asm.S index ffc165d984cc..7b10c26d6336 100644 --- a/tools/testing/selftests/powerpc/math/vsx_asm.S +++ b/tools/testing/selftests/powerpc/math/vsx_asm.S @@ -7,7 +7,7 @@ #include "vsx_asm.h" #long check_vsx(vector int *r3); -#This function wraps storeing VSX regs to the end of an array and a +#This function wraps storing VSX regs to the end of an array and a #call to a comparison function in C which boils down to a memcmp() FUNC_START(check_vsx) PUSH_BASIC_STACK(32) diff --git a/tools/testing/selftests/powerpc/math/vsx_preempt.c b/tools/testing/selftests/powerpc/math/vsx_preempt.c index d1601bb889d4..d432ae095572 100644 --- a/tools/testing/selftests/powerpc/math/vsx_preempt.c +++ b/tools/testing/selftests/powerpc/math/vsx_preempt.c @@ -106,7 +106,7 @@ int test_preempt_vsx(void) } setbuf(stdout, NULL); - /* Not really nessesary but nice to wait for every thread to start */ + /* Not really necessary but nice to wait for every thread to start */ printf("\tWaiting for %d workers to start...", threads_starting); while(threads_starting) asm volatile("": : :"memory"); diff --git a/tools/testing/selftests/powerpc/nx-gzip/gunz_test.c b/tools/testing/selftests/powerpc/nx-gzip/gunz_test.c index 7c23d3dd7d6d..5fbb240c5cda 100644 --- a/tools/testing/selftests/powerpc/nx-gzip/gunz_test.c +++ b/tools/testing/selftests/powerpc/nx-gzip/gunz_test.c @@ -102,7 +102,7 @@ const int window_max = 1<<15; * the indirect (base) dde that points to a list of direct ddes. * See Section 6.4 of the NX-gzip user manual for DDE description. * Addr=NULL, len=0 clears the ddl[0]. Returns the total number of - * bytes in ddl. Caller is responsible for allocting the array of + * bytes in ddl. Caller is responsible for allocating the array of * nx_dde_t *ddl. If N addresses are required in the scatter-gather * list, the ddl array must have N+1 entries minimum. */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c index f4be05aa3a3d..855dca7334da 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c @@ -31,7 +31,7 @@ static int group_constraint_cache(void) /* Check for platform support for the test */ SKIP_IF(platform_check_for_tests()); - /* Init the events for the group contraint check for l1 cache select bits */ + /* Init the events for the group constraint check for l1 cache select bits */ event_init(&leader, EventCode_1); FAIL_IF(event_open(&leader)); @@ -42,7 +42,7 @@ static int group_constraint_cache(void) event_close(&event); - /* Init the event for the group contraint l1 cache select test */ + /* Init the event for the group constraint l1 cache select test */ event_init(&event, EventCode_3); /* Expected to succeed as sibling event request same l1 cache select bits as leader */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c index e3c7a0c071e2..9de991d7a767 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c @@ -30,12 +30,12 @@ static int group_constraint_l2l3_sel(void) /* * Check for platform support for the test. - * This test is only aplicable on ISA v3.1 + * This test is only applicable on ISA v3.1 */ SKIP_IF(platform_check_for_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1)); - /* Init the events for the group contraint check for l2l3_sel bits */ + /* Init the events for the group constraint check for l2l3_sel bits */ event_init(&leader, EventCode_1); FAIL_IF(event_open(&leader)); @@ -46,7 +46,7 @@ static int group_constraint_l2l3_sel(void) event_close(&event); - /* Init the event for the group contraint l2l3_sel test */ + /* Init the event for the group constraint l2l3_sel test */ event_init(&event, EventCode_3); /* Expected to succeed as sibling event request same l2l3_sel bits as leader */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c index 9233175787cc..e354129cd7fb 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c @@ -26,12 +26,12 @@ static int group_constraint_radix_scope_qual(void) /* * Check for platform support for the test. - * This test is aplicable on ISA v3.1 only. + * This test is applicable on ISA v3.1 only. */ SKIP_IF(platform_check_for_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1)); - /* Init the events for the group contraint check for radix_scope_qual bits */ + /* Init the events for the group constraint check for radix_scope_qual bits */ event_init(&leader, EventCode_1); FAIL_IF(event_open(&leader)); diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c index 4b69e7214c0b..433fa9982c8c 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c @@ -37,7 +37,7 @@ static int group_constraint_thresh_cmp(void) SKIP_IF(platform_check_for_tests()); if (have_hwcap2(PPC_FEATURE2_ARCH_3_1)) { - /* Init the events for the group contraint check for thresh_cmp bits */ + /* Init the events for the group constraint check for thresh_cmp bits */ event_init(&leader, p10_EventCode_1); /* Add the thresh_cmp value for leader in config1 */ @@ -54,7 +54,7 @@ static int group_constraint_thresh_cmp(void) event_close(&event); - /* Init the event for the group contraint thresh compare test */ + /* Init the event for the group constraint thresh compare test */ event_init(&event, p10_EventCode_2); /* Add the same thresh_cmp value for leader and sibling event in config1 */ @@ -66,7 +66,7 @@ static int group_constraint_thresh_cmp(void) event_close(&leader); event_close(&event); } else { - /* Init the events for the group contraint check for thresh_cmp bits */ + /* Init the events for the group constraint check for thresh_cmp bits */ event_init(&leader, p9_EventCode_1); FAIL_IF(event_open(&leader)); @@ -77,7 +77,7 @@ static int group_constraint_thresh_cmp(void) event_close(&event); - /* Init the event for the group contraint thresh compare test */ + /* Init the event for the group constraint thresh compare test */ event_init(&event, p9_EventCode_3); /* Expected to succeed as sibling and leader event request same thresh_cmp bits */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c index e0852ebc1671..7e7206eefcfd 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c @@ -35,7 +35,7 @@ static int group_constraint_thresh_ctl(void) /* Check for platform support for the test */ SKIP_IF(platform_check_for_tests()); - /* Init the events for the group contraint thresh control test */ + /* Init the events for the group constraint thresh control test */ event_init(&leader, EventCode_1); FAIL_IF(event_open(&leader)); @@ -46,7 +46,7 @@ static int group_constraint_thresh_ctl(void) event_close(&event); - /* Init the event for the group contraint thresh control test */ + /* Init the event for the group constraint thresh control test */ event_init(&event, EventCode_3); /* Expected to succeed as sibling and leader event request same thresh_ctl bits */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c index 50a8cd843ce7..1b1336c1ddb1 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c @@ -34,7 +34,7 @@ static int group_constraint_thresh_sel(void) /* Check for platform support for the test */ SKIP_IF(platform_check_for_tests()); - /* Init the events for the group contraint thresh select test */ + /* Init the events for the group constraint thresh select test */ event_init(&leader, EventCode_1); FAIL_IF(event_open(&leader)); @@ -45,7 +45,7 @@ static int group_constraint_thresh_sel(void) event_close(&event); - /* Init the event for the group contraint thresh select test */ + /* Init the event for the group constraint thresh select test */ event_init(&event, EventCode_3); /* Expected to succeed as sibling and leader event request same thresh_sel bits */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c index a2c18923dcec..86684331f2bc 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c @@ -21,7 +21,7 @@ * Testcase for group constraint check of unit and pmc bits which is * used to program corresponding unit and pmc field in Monitor Mode * Control Register 1 (MMCR1) - * One of the event in the group should use PMC 4 incase units field + * One of the event in the group should use PMC 4 in case units field * value is within 6 to 9 otherwise event_open for the group will fail. */ static int group_constraint_unit(void) @@ -37,21 +37,21 @@ static int group_constraint_unit(void) SKIP_IF(platform_check_for_tests()); SKIP_IF(have_hwcap2(PPC_FEATURE2_ARCH_3_1)); - /* Init the events for the group contraint check for unit bits */ + /* Init the events for the group constraint check for unit bits */ e = &events[0]; event_init(e, EventCode_1); /* Expected to fail as PMC 4 is not used with unit field value 6 to 9 */ FAIL_IF(!event_open(&events[0])); - /* Init the events for the group contraint check for unit bits */ + /* Init the events for the group constraint check for unit bits */ e = &events[1]; event_init(e, EventCode_2); /* Expected to pass as PMC 4 is used with unit field value 6 to 9 */ FAIL_IF(event_open(&events[1])); - /* Init the event for the group contraint unit test */ + /* Init the event for the group constraint unit test */ e = &events[2]; event_init(e, EventCode_3); diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c index 8a538b6182a1..7ec35566790a 100644 --- a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c +++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c @@ -466,7 +466,7 @@ int get_thresh_cmp_val(struct event event) return value; /* - * Incase of P10, thresh_cmp value is not part of raw event code + * In case of P10, thresh_cmp value is not part of raw event code * and provided via attr.config1 parameter. To program threshold in MMCRA, * take a 18 bit number N and shift right 2 places and increment * the exponent E by 1 until the upper 10 bits of N are zero. @@ -498,7 +498,7 @@ int get_thresh_cmp_val(struct event event) * by comparing base_platform value from auxv and real * PVR value. * auxv_base_platform() func gives information of "base platform" - * corresponding to PVR value. Incase, if the distro doesn't + * corresponding to PVR value. In case, if the distro doesn't * support platform PVR (missing cputable support), base platform * in auxv will have a default value other than the real PVR's. * In this case, ISAv3 PMU (generic compat PMU) will be registered diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_cond_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_cond_test.c index 809de8d58b3b..696f4285af3e 100644 --- a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_cond_test.c +++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_cond_test.c @@ -29,7 +29,7 @@ static int mmcra_bhrb_cond_test(void) /* * Check for platform support for the test. - * This test is only aplicable on ISA v3.1 + * This test is only applicable on ISA v3.1 */ SKIP_IF(check_pvr_for_sampling_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1)); diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_no_branch_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_no_branch_test.c index fa0dc15f9123..6ed293d18a34 100644 --- a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_no_branch_test.c +++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_no_branch_test.c @@ -26,7 +26,7 @@ static int mmcra_bhrb_disable_no_branch_test(void) /* * Check for platform support for the test. - * This test is only aplicable on ISA v3.1 + * This test is only applicable on ISA v3.1 */ SKIP_IF(check_pvr_for_sampling_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1)); diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c index bc3161ab003d..858e37705275 100644 --- a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c +++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c @@ -26,7 +26,7 @@ static int mmcra_bhrb_disable_test(void) /* * Check for platform support for the test. - * This test is only aplicable on ISA v3.1 + * This test is only applicable on ISA v3.1 */ SKIP_IF(check_pvr_for_sampling_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1)); diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c index fd6c9f12212c..6ae3edfedd51 100644 --- a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c +++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c @@ -29,7 +29,7 @@ static int mmcra_bhrb_ind_call_test(void) /* * Check for platform support for the test. - * This test is only aplicable on ISA v3.1 + * This test is only applicable on ISA v3.1 */ SKIP_IF(check_pvr_for_sampling_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1)); diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-pkey.c b/tools/testing/selftests/powerpc/ptrace/ptrace-pkey.c index 10f63042cf91..102d3f8b215f 100644 --- a/tools/testing/selftests/powerpc/ptrace/ptrace-pkey.c +++ b/tools/testing/selftests/powerpc/ptrace/ptrace-pkey.c @@ -73,7 +73,7 @@ static int child(struct shared_info *info) info->amr2 |= 3ul << pkeyshift(pkey2); /* * invalid amr value where we try to force write - * things which are deined by a uamor setting. + * things which are denied by a uamor setting. */ info->invalid_amr = info->amr2 | (~0x0UL & ~info->expected_uamor); diff --git a/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv.c b/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv.c index 4a61e9bd12b4..8aee18819603 100644 --- a/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv.c +++ b/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv.c @@ -42,7 +42,7 @@ void signal_usr1(int signum, siginfo_t *info, void *uc) #else ucp->uc_mcontext.uc_regs->gregs[PT_MSR] |= (7ULL); #endif - /* Should segv on return becuase of invalid context */ + /* Should segv on return because of invalid context */ segv_expected = 1; } diff --git a/tools/testing/selftests/powerpc/tm/tm-signal-stack.c b/tools/testing/selftests/powerpc/tm/tm-signal-stack.c index 68807aac8dd3..e793b5d97c48 100644 --- a/tools/testing/selftests/powerpc/tm/tm-signal-stack.c +++ b/tools/testing/selftests/powerpc/tm/tm-signal-stack.c @@ -2,7 +2,7 @@ /* * Copyright 2015, Michael Neuling, IBM Corp. * - * Test the kernel's signal delievery code to ensure that we don't + * Test the kernel's signal delivery code to ensure that we don't * trelaim twice in the kernel signal delivery code. This can happen * if we trigger a signal when in a transaction and the stack pointer * is bogus. @@ -52,7 +52,7 @@ int tm_signal_stack() /* * The flow here is: - * 1) register a signal handler (so signal delievery occurs) + * 1) register a signal handler (so signal delivery occurs) * 2) make stack pointer (r1) = NULL * 3) start transaction * 4) cause segv diff --git a/tools/testing/selftests/powerpc/tm/tm-sigreturn.c b/tools/testing/selftests/powerpc/tm/tm-sigreturn.c index ffe4e5515f33..4dfb25409393 100644 --- a/tools/testing/selftests/powerpc/tm/tm-sigreturn.c +++ b/tools/testing/selftests/powerpc/tm/tm-sigreturn.c @@ -5,7 +5,7 @@ * * Test the kernel's signal returning code to check reclaim is done if the * sigreturn() is called while in a transaction (suspended since active is - * already dropped trough the system call path). + * already dropped through the system call path). * * The kernel must discard the transaction when entering sigreturn, since * restoring the potential TM SPRS from the signal frame is requiring to not be diff --git a/tools/testing/selftests/powerpc/tm/tm-tar.c b/tools/testing/selftests/powerpc/tm/tm-tar.c index f2a9137f3c1e..ea420caa3961 100644 --- a/tools/testing/selftests/powerpc/tm/tm-tar.c +++ b/tools/testing/selftests/powerpc/tm/tm-tar.c @@ -50,7 +50,7 @@ int test_tar(void) "bne 2b;" "tend.;" - /* Transaction sucess! TAR should be 3 */ + /* Transaction success! TAR should be 3 */ "mfspr 7, %[tar];" "ori %[res], 7, 4;" // res = 3|4 = 7 "b 4f;" diff --git a/tools/testing/selftests/powerpc/tm/tm-tmspr.c b/tools/testing/selftests/powerpc/tm/tm-tmspr.c index dd5ddffa28b7..e2c3ae7c9035 100644 --- a/tools/testing/selftests/powerpc/tm/tm-tmspr.c +++ b/tools/testing/selftests/powerpc/tm/tm-tmspr.c @@ -9,7 +9,7 @@ * - TFIAR - stores address of location of transaction failure * - TFHAR - stores address of software failure handler (if transaction * fails) - * - TEXASR - lots of info about the transacion(s) + * - TEXASR - lots of info about the transaction(s) * * (1) create more threads than cpus * (2) in each thread: diff --git a/tools/testing/selftests/powerpc/tm/tm-trap.c b/tools/testing/selftests/powerpc/tm/tm-trap.c index 97cb74768e30..f9bf45446320 100644 --- a/tools/testing/selftests/powerpc/tm/tm-trap.c +++ b/tools/testing/selftests/powerpc/tm/tm-trap.c @@ -91,9 +91,9 @@ void trap_signal_handler(int signo, siginfo_t *si, void *uc) * LE endianness does in effect nothing, instruction (2) * is then executed again as 'trap', generating a second * trap event (note that in that case 'trap' is caught - * not in transacional mode). On te other hand, if after + * not in transactional mode). On te other hand, if after * the return from the signal handler the endianness in- - * advertently flipped, instruction (1) is tread as a + * advertently flipped, instruction (1) is thread as a * branch instruction, i.e. b .+8, hence instruction (3) * and (4) are executed (tbegin.; trap;) and we get sim- * ilaly on the trap signal handler, but now in TM mode. -- 2.43.0

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[PATCH] selftests/futex: fix typos and grammar in futex_priv_hash

by Gopi Krishna Menon

Fix multiple typos and small grammar issues in help text, comments and test messages in futex_priv_hash test. Signed-off-by: Gopi Krishna Menon <krishnagopi487(a)gmail.com> --- .../selftests/futex/functional/futex_priv_hash.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/tools/testing/selftests/futex/functional/futex_priv_hash.c b/tools/testing/selftests/futex/functional/futex_priv_hash.c index 2dca18fefedc..4a7dea008314 100644 --- a/tools/testing/selftests/futex/functional/futex_priv_hash.c +++ b/tools/testing/selftests/futex/functional/futex_priv_hash.c @@ -115,7 +115,7 @@ static void usage(char *prog) { printf("Usage: %s\n", prog); printf(" -c Use color\n"); - printf(" -g Test global hash instead intead local immutable \n"); + printf(" -g Test global hash instead of local immutable hash\n"); printf(" -h Display this help message\n"); printf(" -v L Verbosity level: %d=QUIET %d=CRITICAL %d=INFO\n", VQUIET, VCRITICAL, VINFO); @@ -180,7 +180,7 @@ int main(int argc, char *argv[]) if (ret != 0) ksft_exit_fail_msg("pthread_join() failed: %d, %m\n", ret); - /* First thread, has to initialiaze private hash */ + /* First thread, has to initialize private hash */ futex_slots1 = futex_hash_slots_get(); if (futex_slots1 <= 0) { ksft_print_msg("Current hash buckets: %d\n", futex_slots1); @@ -232,17 +232,17 @@ int main(int argc, char *argv[]) futex_hash_slots_set_verify(2); join_max_threads(); - ksft_test_result(counter == MAX_THREADS, "Created of waited for %d of %d threads\n", + ksft_test_result(counter == MAX_THREADS, "Created and waited for %d of %d threads\n", counter, MAX_THREADS); counter = 0; - /* Once the user set something, auto reisze must be disabled */ + /* Once the user set something, auto resize must be disabled */ ret = pthread_barrier_init(&barrier_main, NULL, MAX_THREADS); create_max_threads(thread_lock_fn); join_max_threads(); ret = futex_hash_slots_get(); - ksft_test_result(ret == 2, "No more auto-resize after manaul setting, got %d\n", + ksft_test_result(ret == 2, "No more auto-resize after manual setting, got %d\n", ret); futex_hash_slots_set_must_fail(1 << 29, 0); -- 2.43.0

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next-20250818: rust: `ARCH_KMALLOC_MINALIGN` is defined multiple times

by Naresh Kamboju

Build regressions were detected on multiple architectures (arm, arm64, riscv) with the Linux next-20250818 tag when building with Rust-enabled configurations (rust-gcc and rust-clang) from selftests/rust/config. Duplicate definition of ARCH_KMALLOC_MINALIGN in Rust bindings is causing build failures across affected toolchains. First seen on next-20250818 Good: next-20250815 Bad: next-20250818 and next-20250819 Regression Analysis: - New regression? yes - Reproducibility? yes * arm, build - rustclang-lkftconfig-kselftest - rustgcc-lkftconfig-kselftest * arm64, build - rustclang-lkftconfig-kselftest - rustgcc-lkftconfig-kselftest * riscv, build - rustclang-nightly-lkftconfig-kselftest Boot regression: next-20250818 arm arm64 riscv rust `ARCH_KMALLOC_MINALIGN` is defined multiple times Reported-by: Linux Kernel Functional Testing <lkft(a)linaro.org> ## Build log error[E0428]: the name `ARCH_KMALLOC_MINALIGN` is defined multiple times --> /home/tuxbuild/.cache/tuxmake/builds/1/build/rust/bindings/bindings_generated.rs:125708:1 | 5305 | pub const ARCH_KMALLOC_MINALIGN: u32 = 8; | ----------------------------------------- previous definition of the value `ARCH_KMALLOC_MINALIGN` here ... 125708 | pub const ARCH_KMALLOC_MINALIGN: usize = 8; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ `ARCH_KMALLOC_MINALIGN` redefined here | = note: `ARCH_KMALLOC_MINALIGN` must be defined only once in the value namespace of this module error: aborting due to 1 previous error Please refer the full build log information in the below links. ## Source * Kernel version: 6.17.0-rc2 * Git tree: https://kernel.googlesource.com/pub/scm/linux/kernel/git/next/linux-next.git * Git describe: next-20250818 * Git commit: 3ac864c2d9bb8608ee236e89bf561811613abfce * Architectures: arm arm64 riscv * Toolchains: rust-gcc-13, rust-clang-20 * Kconfigs: defconfig+rust ## Build * Build log: https://qa-reports.linaro.org/api/testruns/29578517/log_file/ * Build details 1: https://regressions.linaro.org/lkft/linux-next-master/next-20250818/build/r… * Build details 2: https://regressions.linaro.org/lkft/linux-next-master/next-20250818/build/r… * Build details 3: https://regressions.linaro.org/lkft/linux-next-master/next-20250818/build/r… * Build plan: https://tuxapi.tuxsuite.com/v1/groups/linaro/projects/lkft/builds/31RcUoS2A… * Build link: https://storage.tuxsuite.com/public/linaro/lkft/builds/31RcUoS2AqZLljDCs480… * Kernel config: https://storage.tuxsuite.com/public/linaro/lkft/builds/31RcUoS2AqZLljDCs480… -- Linaro LKFT https://lkft.linaro.org

2 months, 3 weeks

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