On Mon, May 29, 2023 at 3:08 PM Andrew Jones ajones@ventanamicro.com wrote:
On Sat, May 27, 2023 at 12:39:57PM +0800, Haibo Xu wrote:
On Fri, May 26, 2023 at 1:18 AM Andrew Jones ajones@ventanamicro.com wrote:
On Thu, May 25, 2023 at 03:38:35PM +0800, Haibo Xu wrote:
...
KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.a6),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.a7),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s2),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s3),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s4),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s5),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s6),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s7),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s8),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s9),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s10),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s11),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.t3),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.t4),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.t5),KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.t6),...all the above would just be indices rather than named registers. I guess that's better for these registers.
You mean to show it as KVM_REG_RISCV_CORE_REG(regs.regs[0]) ... KVM_REG_RISCV_CORE_REG(regs.regs[31])?
I'm OK with these registers using their names in this list, it does look better. However the original idea for these lists was that they would be generated from print_reg(). In this case, print_reg() is generating them with their number instead of name. Either print_reg() could learn how to generate their names by handling the offset ranges of each register type, e.g.
switch (reg_off) { case 10 ... 17: strdup_printf("... KVM_REG_RISCV_CORE_REG(regs.a%d),", reg_off - 10);
or we can use the numbers here in this list, or we can leave it as you have it (i.e. done manually).
I agree that the print_reg() should print the register name instead of the register offset. It may be better to manually encode/decode the register offset to name case by case in the print_reg() since we just need to handle it once. Will update it in v3.
Thanks, Haibo
Thanks, drew