Hello:
This patch was applied to riscv/linux.git (for-next) by Alexandre Ghiti alexghiti@rivosinc.com:
On Fri, 11 Jul 2025 13:19:24 +0000 you wrote:
This selftest tests all the currently emulated instructions (except for the RV32 compressed ones which are left as a future exercise for a RV32 user). For the FPU instructions, all the FPU registers are tested.
Signed-off-by: Clément Léger cleger@rivosinc.com
[...]
Here is the summary with links: - [v5] selftests: riscv: add misaligned access testing https://git.kernel.org/riscv/c/bf6594367a92
You are awesome, thank you!