On Mon, Jan 13, 2025 at 03:59:24PM -0700, Shuah Khan wrote:
On 1/10/25 09:22, Mathieu Desnoyers wrote:
On 2025-01-02 23:03, Stafford Horne wrote:
When working on OpenRISC support for restartable sequences I noticed and fixed these two issues with the riscv support bits.
1 The 'inc' argument to RSEQ_ASM_OP_R_DEREF_ADDV was being implicitly passed to the macro. Fix this by adding 'inc' to the list of macro arguments. 2 The inline asm input constraints for 'inc' and 'off' use "er", The riscv gcc port does not have an "e" constraint, this looks to be copied from the x86 port. Fix this by just using an "r" constraint.
I have compile tested this only for riscv. However, the same fixes I use in the OpenRISC rseq selftests and everything passes with no issues.
Signed-off-by: Stafford Horne shorne@gmail.com
Reviewed-by: Mathieu Desnoyers mathieu.desnoyers@efficios.com
If these are going through risc repo
Acked-by: Shuah Khan skhan@linuxfoundation.org
If you would like me to take this, let me know.
Thanks, I have not heard from Palmer yet regarding what he wants to do. I will send a v2 aggregating the Reviewed-by/Acked-by hopefully that will help.
-Stafford