When nested NPT is enabled in VMCB12, copy the (cached and validated) VMCB12 g_pat field to the IA32_PAT MSR and to the VMCB02 g_pat field. (The latter can be skipped if the VMCB02 g_pat field already has the correct value.)
When NPT is enabled, but nested NPT is disabled, copy L1's IA32_PAT MSR to the VMCB02 g_pat field (L1 and L2 share the same IA32_PAT MSR in this scenario).
When NPT is disabled, the VMCB02 g_pat field is ignored by hardware.
Fixes: 15038e147247 ("KVM: SVM: obey guest PAT") Signed-off-by: Jim Mattson jmattson@google.com --- arch/x86/kvm/svm/nested.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c index 501102625f69..90edea73ec58 100644 --- a/arch/x86/kvm/svm/nested.c +++ b/arch/x86/kvm/svm/nested.c @@ -656,9 +656,6 @@ static void nested_vmcb02_prepare_save(struct vcpu_svm *svm, struct vmcb *vmcb12 struct vmcb *vmcb02 = svm->nested.vmcb02.ptr; struct kvm_vcpu *vcpu = &svm->vcpu;
- nested_vmcb02_compute_g_pat(svm); - vmcb_mark_dirty(vmcb02, VMCB_NPT); - /* Load the nested guest state */ if (svm->nested.vmcb12_gpa != svm->nested.last_vmcb12_gpa) { new_vmcb12 = true; @@ -666,6 +663,26 @@ static void nested_vmcb02_prepare_save(struct vcpu_svm *svm, struct vmcb *vmcb12 svm->nested.force_msr_bitmap_recalc = true; }
+ if (npt_enabled) { + if (nested_npt_enabled(svm)) { + /* + * KVM doesn't implement a separate guest PAT + * register. Instead, the guest PAT lives in + * vcpu->arch.pat while in guest mode with + * nested NPT enabled. + */ + vcpu->arch.pat = svm->nested.save.g_pat; + if (unlikely(new_vmcb12 || + vmcb_is_dirty(vmcb12, VMCB_NPT))) { + vmcb02->save.g_pat = svm->nested.save.g_pat; + vmcb_mark_dirty(vmcb02, VMCB_NPT); + } + } else { + vmcb02->save.g_pat = vcpu->arch.pat; + vmcb_mark_dirty(vmcb02, VMCB_NPT); + } + } + if (unlikely(new_vmcb12 || vmcb_is_dirty(vmcb12, VMCB_SEG))) { vmcb02->save.es = vmcb12->save.es; vmcb02->save.cs = vmcb12->save.cs;