On Fri, Aug 08, 2025 at 12:48:31PM +0100, Mark Brown wrote:
On Fri, Aug 08, 2025 at 01:23:15AM -0700, Deepak Gupta wrote:
On Thu, Aug 07, 2025 at 01:28:36PM +0100, Mark Brown wrote:
Do you have an update for my clone3() shadow
No I don't.
stack series that I could roll in for when I repost that after the merge window, and/or instructions for how to run this stuff for RISC-V on some emulated platform?
I would want to write-up instructions. But I don't want you to go through a lot of hassle of building toolchain and bunch of other stuff. Let me see how I can make it easy for you. Will report back.
Thanks. FWIW I should already be sorted for the kernel build, unless there's a super new or specialist toolchain required for this feature
Unlike x86 shadow stack and arm's GCS, push on RISC-V shadow stack is done using dedicated `sspush` instruction and pop is done using instruction `sspopchk`. RISC-V vDSO has certain `C` files and they would need shadow stack push and pop (along with landing pad on them). So that's why kernel compile would require the toolchain. I'll point you to it.
(I'd guess I should be fine for the shadow stacks bit?) - it's userspace and emulation for the extension I'm missing.
Qemu changes are upstream. I'll provide the command line option. On userspace, I'll point you to something pre-compiled rootfs.