[PATCH] selftests: powerpc: Fix spelling and grammar in PMU test files

Corrected multiple spelling and grammar issues in the under powerpc PMU selftests:

- Corrected 'aplicable' -> 'applicable'. - Corrected 'contraint' -> 'constraint'. - Corrected 'Incase' -> 'In Case'.

These changes improve documentation quality and maintain code readability.

Signed-off-by: Akshaykumar Gunari akshaygunari@gmail.com --- .../pmu/event_code_tests/group_constraint_cache_test.c | 4 ++-- .../pmu/event_code_tests/group_constraint_l2l3_sel_test.c | 6 +++--- .../group_constraint_radix_scope_qual_test.c | 4 ++-- .../event_code_tests/group_constraint_thresh_cmp_test.c | 8 ++++---- .../event_code_tests/group_constraint_thresh_ctl_test.c | 4 ++-- .../event_code_tests/group_constraint_thresh_sel_test.c | 4 ++-- .../pmu/event_code_tests/group_constraint_unit_test.c | 8 ++++---- tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c | 4 ++-- .../powerpc/pmu/sampling_tests/mmcra_bhrb_cond_test.c | 2 +- .../sampling_tests/mmcra_bhrb_disable_no_branch_test.c | 2 +- .../powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c | 2 +- .../powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c | 2 +- 12 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c index f4be05aa3a3d..855dca7334da 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c @@ -31,7 +31,7 @@ static int group_constraint_cache(void) /* Check for platform support for the test */ SKIP_IF(platform_check_for_tests());

- /* Init the events for the group contraint check for l1 cache select bits */ + /* Init the events for the group constraint check for l1 cache select bits */ event_init(&leader, EventCode_1); FAIL_IF(event_open(&leader));

@@ -42,7 +42,7 @@ static int group_constraint_cache(void)

event_close(&event);

- /* Init the event for the group contraint l1 cache select test */ + /* Init the event for the group constraint l1 cache select test */ event_init(&event, EventCode_3);

/* Expected to succeed as sibling event request same l1 cache select bits as leader */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c index e3c7a0c071e2..9de991d7a767 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c @@ -30,12 +30,12 @@ static int group_constraint_l2l3_sel(void)

/* * Check for platform support for the test. - * This test is only aplicable on ISA v3.1 + * This test is only applicable on ISA v3.1 */ SKIP_IF(platform_check_for_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1));

- /* Init the events for the group contraint check for l2l3_sel bits */ + /* Init the events for the group constraint check for l2l3_sel bits */ event_init(&leader, EventCode_1); FAIL_IF(event_open(&leader));

@@ -46,7 +46,7 @@ static int group_constraint_l2l3_sel(void)

event_close(&event);

- /* Init the event for the group contraint l2l3_sel test */ + /* Init the event for the group constraint l2l3_sel test */ event_init(&event, EventCode_3);

/* Expected to succeed as sibling event request same l2l3_sel bits as leader */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c index 9233175787cc..e354129cd7fb 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c @@ -26,12 +26,12 @@ static int group_constraint_radix_scope_qual(void)

/* * Check for platform support for the test. - * This test is aplicable on ISA v3.1 only. + * This test is applicable on ISA v3.1 only. */ SKIP_IF(platform_check_for_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1));

- /* Init the events for the group contraint check for radix_scope_qual bits */ + /* Init the events for the group constraint check for radix_scope_qual bits */ event_init(&leader, EventCode_1); FAIL_IF(event_open(&leader));

diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c index 4b69e7214c0b..433fa9982c8c 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c @@ -37,7 +37,7 @@ static int group_constraint_thresh_cmp(void) SKIP_IF(platform_check_for_tests());

if (have_hwcap2(PPC_FEATURE2_ARCH_3_1)) { - /* Init the events for the group contraint check for thresh_cmp bits */ + /* Init the events for the group constraint check for thresh_cmp bits */ event_init(&leader, p10_EventCode_1);

/* Add the thresh_cmp value for leader in config1 */ @@ -54,7 +54,7 @@ static int group_constraint_thresh_cmp(void)

event_close(&event);

- /* Init the event for the group contraint thresh compare test */ + /* Init the event for the group constraint thresh compare test */ event_init(&event, p10_EventCode_2);

/* Add the same thresh_cmp value for leader and sibling event in config1 */ @@ -66,7 +66,7 @@ static int group_constraint_thresh_cmp(void) event_close(&leader); event_close(&event); } else { - /* Init the events for the group contraint check for thresh_cmp bits */ + /* Init the events for the group constraint check for thresh_cmp bits */ event_init(&leader, p9_EventCode_1); FAIL_IF(event_open(&leader));

@@ -77,7 +77,7 @@ static int group_constraint_thresh_cmp(void)

event_close(&event);

- /* Init the event for the group contraint thresh compare test */ + /* Init the event for the group constraint thresh compare test */ event_init(&event, p9_EventCode_3);

/* Expected to succeed as sibling and leader event request same thresh_cmp bits */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c index e0852ebc1671..7e7206eefcfd 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c @@ -35,7 +35,7 @@ static int group_constraint_thresh_ctl(void) /* Check for platform support for the test */ SKIP_IF(platform_check_for_tests());

- /* Init the events for the group contraint thresh control test */ + /* Init the events for the group constraint thresh control test */ event_init(&leader, EventCode_1); FAIL_IF(event_open(&leader));

@@ -46,7 +46,7 @@ static int group_constraint_thresh_ctl(void)

event_close(&event);

- /* Init the event for the group contraint thresh control test */ + /* Init the event for the group constraint thresh control test */ event_init(&event, EventCode_3);

/* Expected to succeed as sibling and leader event request same thresh_ctl bits */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c index 50a8cd843ce7..1b1336c1ddb1 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c @@ -34,7 +34,7 @@ static int group_constraint_thresh_sel(void) /* Check for platform support for the test */ SKIP_IF(platform_check_for_tests());

- /* Init the events for the group contraint thresh select test */ + /* Init the events for the group constraint thresh select test */ event_init(&leader, EventCode_1); FAIL_IF(event_open(&leader));

@@ -45,7 +45,7 @@ static int group_constraint_thresh_sel(void)

event_close(&event);

- /* Init the event for the group contraint thresh select test */ + /* Init the event for the group constraint thresh select test */ event_init(&event, EventCode_3);

/* Expected to succeed as sibling and leader event request same thresh_sel bits */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c index a2c18923dcec..86684331f2bc 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c @@ -21,7 +21,7 @@ * Testcase for group constraint check of unit and pmc bits which is * used to program corresponding unit and pmc field in Monitor Mode * Control Register 1 (MMCR1) - * One of the event in the group should use PMC 4 incase units field + * One of the event in the group should use PMC 4 in case units field * value is within 6 to 9 otherwise event_open for the group will fail. */ static int group_constraint_unit(void) @@ -37,21 +37,21 @@ static int group_constraint_unit(void) SKIP_IF(platform_check_for_tests()); SKIP_IF(have_hwcap2(PPC_FEATURE2_ARCH_3_1));

- /* Init the events for the group contraint check for unit bits */ + /* Init the events for the group constraint check for unit bits */ e = &events[0]; event_init(e, EventCode_1);

/* Expected to fail as PMC 4 is not used with unit field value 6 to 9 */ FAIL_IF(!event_open(&events[0]));

- /* Init the events for the group contraint check for unit bits */ + /* Init the events for the group constraint check for unit bits */ e = &events[1]; event_init(e, EventCode_2);

/* Expected to pass as PMC 4 is used with unit field value 6 to 9 */ FAIL_IF(event_open(&events[1]));

- /* Init the event for the group contraint unit test */ + /* Init the event for the group constraint unit test */ e = &events[2]; event_init(e, EventCode_3);

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c index 8a538b6182a1..7ec35566790a 100644 --- a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c +++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c @@ -466,7 +466,7 @@ int get_thresh_cmp_val(struct event event) return value;

/* - * Incase of P10, thresh_cmp value is not part of raw event code + * In case of P10, thresh_cmp value is not part of raw event code * and provided via attr.config1 parameter. To program threshold in MMCRA, * take a 18 bit number N and shift right 2 places and increment * the exponent E by 1 until the upper 10 bits of N are zero. @@ -498,7 +498,7 @@ int get_thresh_cmp_val(struct event event) * by comparing base_platform value from auxv and real * PVR value. * auxv_base_platform() func gives information of "base platform" - * corresponding to PVR value. Incase, if the distro doesn't + * corresponding to PVR value. In case, if the distro doesn't * support platform PVR (missing cputable support), base platform * in auxv will have a default value other than the real PVR's. * In this case, ISAv3 PMU (generic compat PMU) will be registered diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_cond_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_cond_test.c index 809de8d58b3b..696f4285af3e 100644 --- a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_cond_test.c +++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_cond_test.c @@ -29,7 +29,7 @@ static int mmcra_bhrb_cond_test(void)

/* * Check for platform support for the test. - * This test is only aplicable on ISA v3.1 + * This test is only applicable on ISA v3.1 */ SKIP_IF(check_pvr_for_sampling_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1)); diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_no_branch_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_no_branch_test.c index fa0dc15f9123..6ed293d18a34 100644 --- a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_no_branch_test.c +++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_no_branch_test.c @@ -26,7 +26,7 @@ static int mmcra_bhrb_disable_no_branch_test(void)

/* * Check for platform support for the test. - * This test is only aplicable on ISA v3.1 + * This test is only applicable on ISA v3.1 */ SKIP_IF(check_pvr_for_sampling_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1)); diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c index bc3161ab003d..858e37705275 100644 --- a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c +++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c @@ -26,7 +26,7 @@ static int mmcra_bhrb_disable_test(void)

/* * Check for platform support for the test. - * This test is only aplicable on ISA v3.1 + * This test is only applicable on ISA v3.1 */ SKIP_IF(check_pvr_for_sampling_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1)); diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c index fd6c9f12212c..6ae3edfedd51 100644 --- a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c +++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c @@ -29,7 +29,7 @@ static int mmcra_bhrb_ind_call_test(void)

/* * Check for platform support for the test. - * This test is only aplicable on ISA v3.1 + * This test is only applicable on ISA v3.1 */ SKIP_IF(check_pvr_for_sampling_tests()); SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1));