Add an overlay file to configure PCIe1 to function as an endpoint. Enable PCIe1 to work as endpoint mode on the imx95-19x19-evk platform.
Signed-off-by: Frank Li Frank.Li@nxp.com --- change from v13 to v14 - new patch --- arch/arm64/boot/dts/freescale/Makefile | 3 +++ .../dts/freescale/imx95-19x19-evk-pcie1-ep.dtso | 21 +++++++++++++++++++++ 2 files changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 839432153cc7a..d892303fa7eab 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -287,6 +287,9 @@ imx8mm-kontron-dl-dtbs := imx8mm-kontron-bl.dtb imx8mm-kontron-dl.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-dl.dtb
+imx95-19x19-evk-pcie1-ep-dtbs += imx95-19x19-evk.dtb imx95-19x19-evk-pcie1-ep.dtbo +dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-pcie1-ep.dtb + imx8mm-venice-gw72xx-0x-imx219-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-imx219.dtbo imx8mm-venice-gw72xx-0x-rpidsi-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rpidsi.dtbo imx8mm-venice-gw72xx-0x-rs232-rts-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rs232-rts.dtbo diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk-pcie1-ep.dtso b/arch/arm64/boot/dts/freescale/imx95-19x19-evk-pcie1-ep.dtso new file mode 100644 index 0000000000000..696588e768e61 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk-pcie1-ep.dtso @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2024 NXP + */ + +#include <dt-bindings/gpio/gpio.h> + +/dts-v1/; +/plugin/; + +&pcie1 { + status = "disabled"; +}; + +&pcie1_ep { + pinctrl-0 = <&pinctrl_pcie0>; + pinctrl-names = "default"; + reset-gpio = <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>; + vpcie-supply = <®_slot_pwr>; + status = "okay"; +};