On Fri, Nov 24, 2023 at 12:54:30PM +0100, Peter Zijlstra wrote:
On Fri, Nov 24, 2023 at 12:04:09PM +0100, Jonas Oberhauser wrote:
I think ARM64 approached this problem by adding the load-acquire/store-release instructions and for TSO based code, translate into those (eg. x86 -> arm64 transpilers).
Although those instructions have a bit more ordering constraints.
I have heard rumors that the apple chips also have a register that can be set at runtime.
Oh, I thought they made do with the load-acquire/store-release thingies. But to be fair, I haven't been paying *that* much attention to the apple stuff.
I did read about how they fudged some of the x86 flags thing.
I don't know what others may have built specifically, but architecturally on arm64 we expect people to express ordering requirements through instructions. ARMv8.0 has load-acquire and store-release, ARMv8.3 added RCpc forms of load-acquire as part of FEAT_LRCPC, and ARMv8.4 added a number of instructions as part of FEAT_LRCPC2.
For a number of reasons we avoid IMPLEMENTATION DEFINED controls for things like this.
Thanks Mark.