From: Vincent Cheng vincent.cheng.xh@renesas.com
This series adds adjust phase to the PTP Hardware Clock device interface.
Some PTP hardware clocks have a write phase mode that has a built-in hardware filtering capability. The write phase mode utilizes a phase offset control word instead of a frequency offset control word. Add adjust phase function to take advantage of this capability.
Vincent Cheng (3): ptp: Add adjphase function to support phase offset control. ptp: Add adjust_phase to ptp_clock_caps capability. ptp: ptp_clockmatrix: Add adjphase() to support PHC write phase mode.
drivers/ptp/ptp_chardev.c | 1 + drivers/ptp/ptp_clock.c | 2 + drivers/ptp/ptp_clockmatrix.c | 123 ++++++++++++++++++++++++++++++++++ drivers/ptp/ptp_clockmatrix.h | 11 ++- include/linux/ptp_clock_kernel.h | 6 +- include/uapi/linux/ptp_clock.h | 4 +- tools/testing/selftests/ptp/testptp.c | 6 +- 7 files changed, 147 insertions(+), 6 deletions(-)