14 Jul
2020
14 Jul
'20
8:27 a.m.
On Tue, Jul 14, 2020 at 12:02:09AM -0700, ira.weiny@intel.com wrote:
From: Ira Weiny ira.weiny@intel.com
The PKRS MSR is defined as a per-core register. This isolates memory access by CPU. Unfortunately, the MSR is not preserved by XSAVE. Therefore, We must preserve the protections for individual tasks even if they are context switched out and placed on another cpu later.
This is a contradiction and utter trainwreck. We're not going to do more per-core MSRs and pretend they make sense per-task.