Re: [PATCH v6 3/4] RISC-V: mm: Update pgtable comment documentation

On Fri, Jul 14, 2023 at 6:56 PM Charlie Jenkins charlie@rivosinc.com wrote:

sv57 is supported in the kernel so pgtable.h should reflect that.

Signed-off-by: Charlie Jenkins charlie@rivosinc.com

arch/riscv/include/asm/pgtable.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index e13f5872bfe9..28660bab754c 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -840,14 +840,16 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)

• Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32.
• Note that PGDIR_SIZE must evenly divide TASK_SIZE.
• Task size is:

• • • 0x9fc00000 (~2.5GB) for RV32.
      

• • • 0x4000000000 ( 256GB) for RV64 using SV39 mmu
• • • 0x800000000000 ( 128TB) for RV64 using SV48 mmu

• • •    0x9fc00000 (~2.5GB) for RV32.
      

• • •  0x4000000000 ( 256GB) for RV64 using SV39 mmu
      

• • • 0x800000000000 ( 128TB) for RV64 using SV48 mmu
• • • 0x100000000000000 ( 64PB) for RV64 using SV57 mmu
  • Note that PGDIR_SIZE must evenly divide TASK_SIZE since "RISC-V
  • Instruction Set Manual Volume II: Privileged Architecture" states that
  • "load and store effective addresses, which are 64bits, must have bits
  • 63–48 all equal to bit 47, or else a page-fault exception will occur."
• • Similarly for SV57, bits 63–57 must be equal to bit 56.
  */

#ifdef CONFIG_64BIT

#define TASK_SIZE_64 (PGDIR_SIZE * PTRS_PER_PGD / 2)

2.41.0

You can add:

Reviewed-by: Alexandre Ghiti alexghiti@rivosinc.com

Thanks,

Alex