On Thu, Apr 11, 2024 at 09:11:18PM -0700, Charlie Jenkins wrote:
These definitions didn't fit anywhere nicely, so create a new file to house various xtheadvector instruction encodings.
Signed-off-by: Charlie Jenkins charlie@rivosinc.com
arch/riscv/include/asm/xtheadvector.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+)
diff --git a/arch/riscv/include/asm/xtheadvector.h b/arch/riscv/include/asm/xtheadvector.h new file mode 100644 index 000000000000..348263ea164c --- /dev/null +++ b/arch/riscv/include/asm/xtheadvector.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only */
+/*
- Vector 0.7.1 as used for example on T-Head Xuantie cores, uses an older
- encoding for vsetvli (ta, ma vs. d1), so provide an instruction for
- vsetvli t4, x0, e8, m8, d1
- */
+#define THEAD_VSETVLI_T4X0E8M8D1 ".long 0x00307ed7\n\t" +#define THEAD_VSETVLI_X0X0E8M8D1 ".long 0x00307057\n\t"
+/*
- While in theory, the vector-0.7.1 vsb.v and vlb.v result in the same
- encoding as the standard vse8.v and vle8.v, compilers seem to optimize
- the call resulting in a different encoding and then using a value for
- the "mop" field that is not part of vector-0.7.1
- So encode specific variants for vstate_save and _restore.
This wording seems oddly familiar to me, did Heiko not write this?
- */
+#define THEAD_VSB_V_V0T0 ".long 0x02028027\n\t" +#define THEAD_VSB_V_V8T0 ".long 0x02028427\n\t" +#define THEAD_VSB_V_V16T0 ".long 0x02028827\n\t" +#define THEAD_VSB_V_V24T0 ".long 0x02028c27\n\t" +#define THEAD_VLB_V_V0T0 ".long 0x012028007\n\t" +#define THEAD_VLB_V_V8T0 ".long 0x012028407\n\t" +#define THEAD_VLB_V_V16T0 ".long 0x012028807\n\t" +#define THEAD_VLB_V_V24T0 ".long 0x012028c07\n\t"
-- 2.44.0