Colton Lewis coltonlewis@google.com writes:
With FGT in place, the remaining trapped registers need to be written through to the underlying physical registers as well as the virtual ones. Failing to do this means delaying when guest writes take effect.
Signed-off-by: Colton Lewis coltonlewis@google.com
arch/arm64/kvm/sys_regs.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index b3f97980b11f..704e5d45ce52 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1036,6 +1036,30 @@ static bool access_pmu_evcntr(struct kvm_vcpu *vcpu, return true; }
+static bool writethrough_pmevtyper(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
u64 reg, u64 idx)+{
- u64 eventsel;
- if (idx == ARMV8_PMU_CYCLE_IDX)
eventsel = ARMV8_PMUV3_PERFCTR_CPU_CYCLES;- else
eventsel = p->regval & kvm_pmu_evtyper_mask(vcpu->kvm);- if (vcpu->kvm->arch.pmu_filter &&
!test_bit(eventsel, vcpu->kvm->arch.pmu_filter))return false;
I made a mistake here. The thing tested in the pmu_filter should be & kvm_pmu_event_mask(), not & kvm_pmu_evtyper_mask()
Then, the value written to the register should be & kvm_pmu_evtyper_mask()
There might be a similar mistake in Patch 17 where I enforce the filter at vcpu load time.
- __vcpu_assign_sys_reg(vcpu, reg, eventsel);
- if (idx == ARMV8_PMU_CYCLE_IDX)
write_pmccfiltr(eventsel);- else
write_pmevtypern(idx, eventsel);- return true;
+}
- static bool access_pmu_evtyper(struct kvm_vcpu *vcpu, struct
sys_reg_params *p, const struct sys_reg_desc *r) { @@ -1062,7 +1086,9 @@ static bool access_pmu_evtyper(struct kvm_vcpu *vcpu, struct sys_reg_params *p, if (!pmu_counter_idx_valid(vcpu, idx)) return false;
- if (p->is_write) {
- if (kvm_vcpu_pmu_is_partitioned(vcpu) && p->is_write) {
writethrough_pmevtyper(vcpu, p, reg, idx);- } else if (p->is_write) { kvm_pmu_set_counter_event_type(vcpu, p->regval, idx); kvm_vcpu_pmu_restore_guest(vcpu); } else {
-- 2.50.0.727.gbf7dc18ff4-goog