Tcwg-commits March 2020

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11017 discussions

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (c78b41b23b3 -> d01cb80e0fb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/gcc. from c78b41b23b3 Daily bump. adds 883465f79e7 Daily bump. adds d01cb80e0fb rs6000: Check -+0 and NaN for smax/smin generation No new revisions were added by this update. Summary of changes: a | 81 ++++++++++++++++++++++++++ gcc/ChangeLog | 6 ++ gcc/DATESTAMP | 2 +- gcc/config/rs6000/rs6000.c | 6 +- gcc/testsuite/ChangeLog | 5 ++ gcc/testsuite/gcc.target/powerpc/p9-minmax-3.c | 17 ++++++ 6 files changed, 115 insertions(+), 2 deletions(-) create mode 100644 a create mode 100644 gcc/testsuite/gcc.target/powerpc/p9-minmax-3.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (bc16f49cb -> a03eee0ab)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards bc16f49cb 0: update: binutils-gcc-linux: boot new a03eee0ab 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (bc16f49cb) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 240 +- 03-build_abe-binutils/console.log | 11715 ++++++++-------- 04-build_abe-stage1/console.log | 13767 +++++++++--------- 05-build_linux/console.log | 832 +- 06-boot_linux/console.log | 404 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 27090 ++++++++++++++++++------------------ jenkins/manifest.sh | 10 +- regressions.txt | 2 +- 11 files changed, 27102 insertions(+), 27090 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (8d019cda851 -> 4a7f2032a35)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/llvm-project. from 8d019cda851 Fix ac1d23ed7de01fb3 interaction with gold plugin adds 28c5d97beec [ARM,MVE] Add intrinsics and isel for MVE integer VMLA. adds 928776de923 [ARM,MVE] Add intrinsics for the VQDMLAH family. adds c5b81466c2b Reland D75470 [SVE] Auto-generate builtins and header for svld1. adds f4e495a18e8 [InstCombine][X86] simplifyX86varShift - convert variable i [...] adds 0db7244295b [SCCP] Precommit some additional tests for integer ranges. adds a0a3a9c5a83 [DebugInfo] Fix multi-byte entry values in call site values adds 940ba1465b2 Fix possible assertion when using PBQP with debug info adds 4788ca450fe [AArch64][SVE] Change pointer type of nontemporal load/stor [...] adds 9bdcd9bf443 [llvm][SVE] Addressing mode for FF/NF loads. adds b09cce07c7e [OPENMP50]Codegen for detach clause. adds db31e2e1e6c [lldb/Target] Support more than 2 symbols in StackFrameRecognizer adds a8901a03544 [mlir] NFC: Fix trivial typos in documents adds 6739805e24c [ARM] Track epilogue instructions with FrameDestroy flag (NFC) adds 4cf01ed75e3 [hip] Revise `GlobalDecl` constructors. NFC. adds 2aaafaf5005 [NFC] Add missing REQUIRES clause to a test adds 96b70809d95 [NFC][PowerPC] Add a new MIR file to test if-converter pass adds d000655a8cd [Alignment][NFC] Deprecate getMaxAlignment adds 73cea83a6f5 [IPRA][ARM] Spill extra registers at -Oz adds 85334b030a6 [NFCI][SCEV] Avoid recursion in SCEVExpander::isHighCostExp [...] adds f3e297d90fc Fix build with gcc 7.5 by adding a "redundant move" adds 4d506da91c4 Fix `warning: extra ‘;’` (NFC) adds 24c2e61362a [InstCombine][X86] Add additional demandedelts style test f [...] adds 3481062bc68 [lldb] [testsuite] Enable forgotten -gsplit-dwarf for 2 testfiles adds c21866476e1 [PowerPC][AIX] Implement by-val caller arguments in a singl [...] adds ef64ba83119 [InstCombine] GEPOperator::accumulateConstantOffset does no [...] adds dd12826808f [Syntax] Build template declaration nodes adds 9f981e9adf9 Reland "[gn build] (manually) port 8b409eaba" adds 06150e8356c [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds f57290ec57d [gn build] add rebase changes that should have been in 9f98 [...] adds d1a7bfca743 [AMDGPU] Fix AMDGPUUnifyDivergentExitNodes adds ea4597eef10 Reapply "AMDGPU/GlobalISel: Fully handle 0 dmask case durin [...] adds 4ea1baf6a0e AMDGPU: Initial, crude support for indirect calls adds fc2a5ef9c87 [NFC][PowerPC] Update test adds 642a424bc49 [gn build] remove a workaround that is no longer needed adds 04a309dd0be [libc] Adding memcpy implementation for x86_64 adds 881f5b5a7b2 Revert "[Syntax] Build template declaration nodes" adds e13d153c1b5 [ARM,MVE] Add intrinsics for the VQDMLAD family. adds e6a74803d4e [VPlan] Use underlying value for printing, if available. adds 0d896278c81 Support repeated machine outlining adds 1cc09dcefcc Add missing module map entry. adds 1e4ee0bfc52 [Dominators] Fixup comments in GenericDominatorTreeConstruc [...] adds dc5f9826396 [GlobalISel] Port some basic undef combines from DAGCombiner.cpp adds 9c6458ecf8c [InstSimplify] Add bitreverse/bswap vector tests adds 746bd860c9c Replace get*Alignment() methods with get*Align() equivalents. adds e009fad342c [PowerPC] Remove UB from PPCInstrInfo when handling rotates [...] adds f8e8f0a6038 [TSan] Support pointer authentication in setjmp/longjmp int [...] adds 6f79f80e6e4 [HIP] Fix duplicate clang -cc1 options on MSVC toolchain adds 1010c44b4c0 [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds 2f8894a5b8b [OPENMP50]Add support for extended device clause in target [...] adds ebec984e14a [AliasAnalysis] Misc fixes for checking aliasing with scala [...] adds 4e8830830ee [libc] Add a missing deps to the linux syscalls target. adds e225e770f7e [TableGen][GlobalISel] Rework RegisterBankEmitter for easie [...] adds e9f22fd4293 [TableGen][GlobalISel] Account for HwMode in RegisterBank r [...] adds 4be504a97f9 [mlir] Add support for detecting single use callables in th [...] adds b40ee7ff1b1 [lldb/MemoryHistoryAsan] Fix address resolution for recorde [...] adds 1e431322099 [mlir][LLVM] Add masked reads and writes. adds 6bdb0efa42b [InstSimplify] Regenerate OR tests adds 47ce1406c8e [InstSimplify] Add missing vector OR test to show lack of D [...] adds 9d40292a642 [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds 64a5e57a61b [mlir] Disable notifyMatchFailure in NDEBUG adds 498b53890d8 [SelectionDAGBuilder][FPEnv] Take into account SelectionDAG [...] adds 22c66c1a28c [JumpThreading] add a miscompile test based on discussion i [...] adds c682a605eb4 [Fuchsia] Include llvm-gsymutil tool in the Fuchsia toolchain adds e24e95fe900 Remove CompositeType class. adds 49bdfd888d3 [InstSimplify] Add missing vector masked add tests to show [...] adds 30ccc2e8d24 [libc++] Add missing visibility annotation for __base adds faba1d034a0 [LangRef] add explanatory text for select poison semantics [...] adds acaf1442226 [LangRef] fix formatting tick; NFC adds 00c1cd19349 [VPlan] Record underlying value for VPValues created by add [...] adds 9bb5685b216 [clang-tidy] misc-unconventional-assign-operator suggest to [...] adds ae7bda5dac7 [mlir][Linalg] Remove initial value for conditions. adds fd2c15e6024 [VPlan] Do not print mapping for Value2VPValue. adds 85bd4369610 [Host] Remove some code that's not needed anymore. adds 7b5d4669daa [MLIR] Allow global with an external linkage to include ini [...] adds 99336bf95ab [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds f3c857fae29 [OPENMP50]Add basic codegen support for ancestor device modifier. adds f951b0f82df [lit] Add builtin support for flaky tests in lit adds 14970669dde [lldb/Test] Add unittest for FileSpec::operator bool() adds 5ffb30fd6c7 [lldb/PlatformDarwin] Expose current toolchain and CL tools [...] adds 1365ab4b63b [clang-tidy] RenamerClangTidy now correctly renames `using [...] adds 47622efc6f0 [clang/test] Add test for DIFlagAllCallsDescribed under -gg [...] adds f18233dad46 Fix -fsanitize=array-bound to treat T[0] union members as f [...] adds d8061456bcc [LangRef] fix typo in select poison explanation; NFC adds c69a4d6bef0 [SelectionDAG] When splitting gathers/scatters in type lega [...] adds 3b35f9d8b51 [mlir][spirv] Use memref memory space for storage class adds 67e8690e53c [mlir][spirv] Let SPIRVConversionTarget consider type availability adds 58df5e6d9ad [mlir][spirv] Plumbing target environment into type converter adds f741b8eabed [mlir][spirv] Move type checks from dialect class to type h [...] adds 9efb4b40232 [mlir][spirv] Make SPIRVTypeConverter target environment aware adds ffd4583c6ae [mlir][spirv] Change standard op patterns to consider type [...] adds 73431a492ba [mlir][spirv] Consolidate std.constant to spv.constant conversions adds 62201763c54 Fix crash in check-mlir due to 08ab8c9af4dd27cb306b449edc9a [...] adds f0ca0a25388 [AppleObjCRuntimeV2] Rewrite GetClassDescriptor, reducing i [...] adds b72e13c242d [MLIR] Deduplicate dialect registration by ClassID adds cd1212deffb [mlir] Introduced CallOp Dialect Conversion adds aacf022cd57 [PowerPC] add IR level isFMAFasterThanFMulAndFAdd - NFC And [...] adds 52b2bae777f [lldb/testsuite] Skip TestEmptyStdModule.py if using a remo [...] adds c182be211a4 [lldb/testsuite] Tweak TestBreakpointLocations.py to pass f [...] adds 127b9d9d774 [lldb/testsuite] Apply @skipIfDarwinEmbedded to part of Tes [...] adds 71db787c458 [lldb/testsuite] Rewrite TestThreadLocal.py adds acd641c19d6 [lldb/testsuite] Slightly rework TestHiddenIvars.py adds 59918d3793a [lldb/testsuite] Make TestObjCIvarStripped.py working with [...] adds 79a7ed92a9b CFGDiff: Simplify/common the begin/end implementations to u [...] adds 2ea5495759f [InstCombine][SVE] Fix InstCombiner::visitAllocaInst for sc [...] adds b58f6bb1207 Add a test for UsedDeclVisitor adds f528df8e269 Revert "Add a test for UsedDeclVisitor" adds 3f85134d710 [PowerPC] implement target hook isProfitableToHoist adds 2c1ba63edee [mlir] Change missed usage PatternMatchResult to LogicalResult adds e778db6d721 recommit b58f6bb1207521cdf6a856004525d7bffa5f2153 adds 5d881dd8a8b Update so debugserver can be built on macos again with xcodebuild. adds 4b0f1e12c24 [AST] Add a flag indicating if any subexpression had errors adds bc18624b403 [mlir] vector.type_cast: disallow memrefs with layout in verifier adds d8fcdcdf68c [Reassociate] add testcases for more than 1 pairs - NFC adds 8a36594a7ec [SCCP] Use constant ranges for binary operators. adds 981f0802b37 [SVE] Generate overloaded functions for ACLE intrinsics. adds bb7d2b17802 [LLD][ELF] - Disambiguate "=fillexp" with a primary express [...] adds 733b3199487 [VP,Integer,#1] Vector-predicated integer intrinsics adds 1d5560c3632 [gn build] Port 733b3199487 adds 6e0aaafbc78 [MLIR][NFC] fix RankedTensorType doc comment new 5c296df0c0a [ValueTypes] Add EVT::isFixedLengthVector new 4a7f2032a35 Revert "CFGDiff: Simplify/common the begin/end implementati [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../misc/UnconventionalAssignOperatorCheck.cpp | 5 +- .../clang-tidy/utils/RenamerClangTidyCheck.cpp | 5 + ...isc-unconventional-assign-operator-precxx11.cpp | 6 + .../checkers/readability-identifier-naming.cpp | 5 + clang/cmake/caches/Fuchsia-stage2.cmake | 1 + clang/include/clang/AST/ASTDumperUtils.h | 2 + clang/include/clang/AST/ComputeDependence.h | 4 + clang/include/clang/AST/DependenceFlags.h | 30 +- clang/include/clang/AST/Expr.h | 9 +- clang/include/clang/AST/ExprCXX.h | 4 +- clang/include/clang/AST/GlobalDecl.h | 22 +- clang/include/clang/AST/OpenMPClause.h | 28 +- clang/include/clang/AST/Type.h | 2 +- clang/include/clang/Basic/Attr.td | 4 +- clang/include/clang/Basic/BuiltinsAArch64.def | 13 - clang/include/clang/Basic/BuiltinsSVE.def | 20 + clang/include/clang/Basic/CMakeLists.txt | 10 +- clang/include/clang/Basic/OpenMPKinds.def | 8 + clang/include/clang/Basic/OpenMPKinds.h | 7 + clang/include/clang/Basic/TargetBuiltins.h | 49 ++ clang/include/clang/Basic/arm_mve.td | 61 ++ clang/include/clang/Basic/arm_sve.td | 125 ++++ clang/include/clang/Parse/Parser.h | 4 +- clang/include/clang/Sema/Sema.h | 4 +- clang/include/clang/module.modulemap | 1 + clang/lib/AST/ComputeDependence.cpp | 37 +- clang/lib/AST/Expr.cpp | 3 +- clang/lib/AST/ItaniumMangle.cpp | 10 +- clang/lib/AST/Mangle.cpp | 2 +- clang/lib/AST/OpenMPClause.cpp | 5 + clang/lib/AST/TextNodeDumper.cpp | 5 + clang/lib/Basic/OpenMPKinds.cpp | 17 +- clang/lib/Basic/Targets/AArch64.cpp | 4 + clang/lib/CodeGen/CGBuiltin.cpp | 105 +-- clang/lib/CodeGen/CGDebugInfo.cpp | 3 +- clang/lib/CodeGen/CGDecl.cpp | 2 +- clang/lib/CodeGen/CGExpr.cpp | 12 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 61 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 33 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 5 +- clang/lib/CodeGen/CodeGenFunction.h | 1 + clang/lib/CodeGen/CodeGenModule.cpp | 9 +- clang/lib/CodeGen/CodeGenModule.h | 3 - clang/lib/Driver/ToolChains/MSVC.cpp | 6 +- clang/lib/Parse/ParseOpenMP.cpp | 31 +- clang/lib/Sema/SemaDeclAttr.cpp | 17 +- clang/lib/Sema/SemaExpr.cpp | 5 +- clang/lib/Sema/SemaOpenMP.cpp | 38 +- clang/lib/Sema/TreeTransform.h | 13 +- clang/lib/Serialization/ASTReader.cpp | 2 + clang/lib/Serialization/ASTReaderStmt.cpp | 6 +- clang/lib/Serialization/ASTWriter.cpp | 2 + clang/lib/Serialization/ASTWriterDecl.cpp | 4 + clang/lib/Serialization/ASTWriterStmt.cpp | 1 + .../acle_sve_ld1_shortform.c | 83 +++ clang/test/CodeGen/arm-mve-intrinsics/ternary.c | 645 ++++++++++++++++++ clang/test/CodeGen/arm-mve-intrinsics/vqdmlad.c | 677 +++++++++++++++++++ clang/test/CodeGen/bounds-checking.c | 22 +- .../CodeGenCXX/dbg-info-all-calls-described.cpp | 12 + clang/test/CodeGenCXX/used-decl-visitor.cpp | 18 + clang/test/Driver/hip-options.hip | 5 + clang/test/OpenMP/target_ast_print.cpp | 18 +- clang/test/OpenMP/target_data_device_messages.cpp | 5 +- clang/test/OpenMP/target_device_codegen.cpp | 50 ++ clang/test/OpenMP/target_device_messages.cpp | 14 +- .../OpenMP/target_enter_data_device_messages.cpp | 5 +- .../OpenMP/target_exit_data_device_messages.cpp | 5 +- .../test/OpenMP/target_update_device_messages.cpp | 5 +- clang/test/OpenMP/task_codegen.c | 12 +- clang/unittests/CodeGen/CodeGenExternalTest.cpp | 2 +- clang/utils/TableGen/SveEmitter.cpp | 727 ++++++++++++++++++++- clang/utils/TableGen/TableGen.cpp | 18 + clang/utils/TableGen/TableGenBackends.h | 3 + compiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp | 8 + libc/CMakeLists.txt | 1 + libc/cmake/modules/LLVMLibCCheckCpuFeatures.cmake | 180 ++--- libc/cmake/modules/LLVMLibCRules.cmake | 9 +- libc/cmake/modules/cpu_features/check_avx.cpp | 8 - libc/cmake/modules/cpu_features/check_avx512f.cpp | 8 - .../modules/cpu_features/check_cpu_features.cpp.in | 29 + libc/cmake/modules/cpu_features/check_sse.cpp | 8 - libc/cmake/modules/cpu_features/check_sse2.cpp | 8 - libc/config/linux/CMakeLists.txt | 2 + libc/lib/CMakeLists.txt | 1 + libc/src/string/CMakeLists.txt | 63 +- libc/src/string/memcpy.cpp | 22 + libc/src/string/memcpy.h | 21 + libc/src/string/memcpy_arch_specific.h.def | 65 ++ libc/src/string/memory_utils/CMakeLists.txt | 7 +- libc/src/string/memory_utils/memcpy_utils.h | 100 +++ libc/src/string/memory_utils/utils.h | 7 +- libc/src/string/x86/CMakeLists.txt | 4 + libc/src/string/x86/memcpy_arch_specific.h.inc | 35 + libc/test/src/string/CMakeLists.txt | 21 + libc/test/src/string/memcpy_test.cpp | 53 ++ libc/test/src/string/memory_utils/CMakeLists.txt | 7 + .../src/string/memory_utils/memcpy_utils_test.cpp | 208 ++++++ libc/test/src/string/memory_utils/utils_test.cpp | 8 + libcxx/include/functional | 2 +- lld/ELF/ScriptParser.cpp | 9 +- lld/test/ELF/linkerscript/sections-padding.s | 7 +- lldb/include/lldb/Target/StackFrameRecognizer.h | 14 +- lldb/packages/Python/lldbsuite/test/lldbutil.py | 2 +- lldb/source/Commands/CommandObjectFrame.cpp | 41 +- lldb/source/Commands/Options.td | 3 +- lldb/source/Host/macosx/objcxx/Host.mm | 37 -- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 53 +- .../MemoryHistory/asan/MemoryHistoryASan.cpp | 7 +- .../Plugins/Platform/MacOSX/PlatformDarwin.cpp | 27 + .../Plugins/Platform/MacOSX/PlatformDarwin.h | 9 + .../Plugins/Process/Utility/HistoryThread.cpp | 5 +- .../source/Plugins/Process/Utility/HistoryThread.h | 3 +- .../Plugins/Process/Utility/HistoryUnwind.cpp | 11 +- .../source/Plugins/Process/Utility/HistoryUnwind.h | 6 +- lldb/source/Target/AssertFrameRecognizer.cpp | 24 +- lldb/source/Target/StackFrameRecognizer.cpp | 51 +- .../empty-module/TestEmptyStdModule.py | 1 + .../frame/recognizer/TestFrameRecognizer.py | 62 +- lldb/test/API/commands/frame/recognizer/main.m | 5 +- .../breakpoint/breakpoint_locations/main.c | 4 +- .../TestHWBreakMultiThread.py | 10 +- .../API/lang/cpp/thread_local/TestThreadLocal.py | 51 +- lldb/test/API/lang/cpp/thread_local/main.cpp | 8 +- lldb/test/API/lang/objc/hidden-ivars/Makefile | 20 + .../API/lang/objc/hidden-ivars/TestHiddenIvars.py | 18 +- .../test/API/lang/objc/objc-ivar-stripped/Makefile | 7 +- .../Shell/SymbolFile/DWARF/debug-types-basic.test | 2 +- .../SymbolFile/DWARF/debug-types-expressions.test | 8 +- .../debugserver.xcodeproj/project.pbxproj | 322 +++++---- lldb/unittests/Platform/PlatformDarwinTest.cpp | 18 + lldb/unittests/Target/StackFrameRecognizerTest.cpp | 3 +- lldb/unittests/Utility/FileSpecTest.cpp | 6 + llvm/CMakeLists.txt | 2 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 4 +- llvm/docs/LangRef.rst | 702 +++++++++++++++++++- .../LLJITWithLazyReexports.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.cpp | 2 +- llvm/include/llvm/Analysis/MemoryLocation.h | 10 + .../llvm/Analysis/ScalarEvolutionExpander.h | 16 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 14 + .../llvm/Analysis/TargetTransformInfoImpl.h | 4 + llvm/include/llvm/CodeGen/DIE.h | 19 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 13 + .../include/llvm/CodeGen/GlobalISel/RegisterBank.h | 13 +- .../llvm/CodeGen/GlobalISel/RegisterBankInfo.h | 3 +- llvm/include/llvm/CodeGen/MachineFrameInfo.h | 5 +- llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 13 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 2 +- llvm/include/llvm/CodeGen/ValueTypes.h | 16 + llvm/include/llvm/IR/Constants.h | 2 +- llvm/include/llvm/IR/DerivedTypes.h | 35 +- llvm/include/llvm/IR/Instructions.h | 15 +- llvm/include/llvm/IR/IntrinsicInst.h | 42 ++ llvm/include/llvm/IR/Intrinsics.td | 77 +++ llvm/include/llvm/IR/IntrinsicsAArch64.td | 13 +- llvm/include/llvm/IR/IntrinsicsARM.td | 26 + llvm/include/llvm/IR/VPIntrinsics.def | 84 +++ .../llvm/Support/GenericDomTreeConstruction.h | 40 +- llvm/include/llvm/Support/TypeSize.h | 2 +- llvm/include/llvm/Target/GlobalISel/Combine.td | 31 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 4 + llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 48 +- llvm/lib/Analysis/ValueTracking.cpp | 37 +- llvm/lib/CodeGen/Analysis.cpp | 37 +- llvm/lib/CodeGen/CalcSpillWeights.cpp | 9 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 31 + llvm/lib/CodeGen/GlobalISel/RegisterBank.cpp | 8 +- llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | 5 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineOutliner.cpp | 47 +- llvm/lib/CodeGen/MachineRegisterInfo.cpp | 50 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 4 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 31 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 3 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 47 +- llvm/lib/CodeGen/TargetRegisterInfo.cpp | 4 +- llvm/lib/CodeGen/ValueTypes.cpp | 4 + llvm/lib/FuzzMutate/Operations.cpp | 18 +- llvm/lib/IR/ConstantFold.cpp | 3 +- llvm/lib/IR/Constants.cpp | 11 +- llvm/lib/IR/Instructions.cpp | 65 +- llvm/lib/IR/IntrinsicInst.cpp | 136 ++++ llvm/lib/IR/Operator.cpp | 5 + llvm/lib/IR/Type.cpp | 58 +- llvm/lib/IR/Value.cpp | 7 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 3 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 10 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 4 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 55 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 5 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 56 +- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 17 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 7 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 42 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 9 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 11 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 341 ++++++++-- llvm/lib/Target/ARM/ARMFrameLowering.h | 9 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 65 +- llvm/lib/Target/ARM/ARMISelLowering.h | 1 + llvm/lib/Target/ARM/ARMInstrMVE.td | 130 ++-- llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 25 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 8 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 10 +- llvm/lib/Target/Lanai/LanaiFrameLowering.cpp | 4 +- llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 6 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 4 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 35 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 138 +++- llvm/lib/Target/PowerPC/PPCISelLowering.h | 8 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 14 +- llvm/lib/Target/RISCV/RISCVRegisterBankInfo.cpp | 4 +- llvm/lib/Target/RISCV/RISCVRegisterBankInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVSubtarget.cpp | 2 +- llvm/lib/Target/Sparc/SparcFrameLowering.cpp | 11 +- .../WebAssembly/WebAssemblyFrameLowering.cpp | 6 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 8 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 4 +- llvm/lib/Transforms/IPO/GlobalOpt.cpp | 2 +- llvm/lib/Transforms/IPO/StripSymbols.cpp | 8 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 22 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 6 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 5 +- .../InstCombine/InstructionCombining.cpp | 5 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 66 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 2 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 39 +- llvm/lib/Transforms/Vectorize/VPlan.h | 22 +- llvm/lib/Transforms/Vectorize/VPlanValue.h | 2 + llvm/test/Analysis/MemorySSA/scalable-vec.ll | 25 + .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 10 - .../GlobalISel/prelegalizercombiner-undef.mir | 168 +++++ .../CodeGen/AArch64/machine-outliner-iterative.mir | 149 +++++ .../CodeGen/AArch64/sve-intrinsics-loads-ff.ll | 192 ++++++ .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 273 ++++++++ llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll | 42 +- llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll | 42 +- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 76 ++- ...ed-non-temporal-ldst-addressing-mode-reg-reg.ll | 77 +-- .../legalize-llvm.amdgcn.image.dim.a16.ll | 30 +- .../legalize-llvm.amdgcn.image.load.2d.d16.ll | 116 +--- .../legalize-llvm.amdgcn.image.load.2d.ll | 50 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 201 ++++++ .../CodeGen/AMDGPU/multi-divergent-exit-region.ll | 40 ++ llvm/test/CodeGen/AMDGPU/update-phi.ll | 2 - .../CodeGen/ARM/ipra-extra-spills-exceptions.ll | 149 +++++ llvm/test/CodeGen/ARM/ipra-extra-spills.ll | 406 ++++++++++++ llvm/test/CodeGen/Generic/csw-debug-assert.ll | 64 ++ llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir | 4 +- llvm/test/CodeGen/PowerPC/aix-byval-param.ll | 16 - .../CodeGen/PowerPC/aix-cc-byval-limitation1.ll | 16 + .../CodeGen/PowerPC/aix-cc-byval-limitation2.ll | 16 + .../CodeGen/PowerPC/aix-cc-byval-limitation3.ll | 16 + llvm/test/CodeGen/PowerPC/aix-cc-byval.ll | 206 ++++++ llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll | 146 +++++ .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 54 ++ llvm/test/CodeGen/PowerPC/ifcvt.mir | 53 ++ llvm/test/CodeGen/Thumb2/ifcvt-minsize.ll | 13 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/ternary.ll | 591 +++++++++++++++++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmlad.ll | 589 +++++++++++++++++ llvm/test/CodeGen/X86/fp-intrinsics-flags.ll | 4 +- .../AArch64/dbgcall-site-float-entry-value.ll | 49 ++ .../InstCombine/X86/x86-vector-shifts.ll | 31 +- llvm/test/Transforms/InstCombine/gep-vector.ll | 21 + llvm/test/Transforms/InstCombine/vscale_alloca.ll | 37 ++ llvm/test/Transforms/InstSimplify/add-mask.ll | 79 ++- llvm/test/Transforms/InstSimplify/bitreverse.ll | 51 +- llvm/test/Transforms/InstSimplify/bswap.ll | 57 +- llvm/test/Transforms/InstSimplify/or.ll | 108 +-- llvm/test/Transforms/JumpThreading/select.ll | 28 + .../PowerPC/p8-unrolling-legalize-vectors.ll | 198 +++++- llvm/test/Transforms/Reassociate/cse-pairs.ll | 83 +++ .../SCCP/binaryops-range-special-cases.ll | 100 +++ llvm/test/Transforms/SCCP/ip-ranges-binaryops.ll | 134 ++++ llvm/test/Transforms/SCCP/ipsccp-range-crashes.ll | 195 ++++++ llvm/test/Transforms/SCCP/range-and.ll | 36 +- llvm/test/Transforms/SCCP/vector-bitcast.ll | 3 +- .../Transforms/SimplifyCFG/PowerPC/prefer-fma.ll | 5 +- llvm/test/Verifier/vp-intrinsics.ll | 34 + llvm/unittests/IR/CMakeLists.txt | 1 + llvm/unittests/IR/VPIntrinsicTest.cpp | 151 +++++ .../Transforms/Vectorize/VPlanHCFGTest.cpp | 40 ++ llvm/unittests/Transforms/Vectorize/VPlanTest.cpp | 32 +- llvm/utils/TableGen/CodeGenIntrinsics.h | 3 + llvm/utils/TableGen/CodeGenRegisters.cpp | 4 +- llvm/utils/TableGen/CodeGenRegisters.h | 2 +- llvm/utils/TableGen/CodeGenTarget.cpp | 6 +- llvm/utils/TableGen/IntrinsicEmitter.cpp | 13 +- llvm/utils/TableGen/RegisterBankEmitter.cpp | 95 ++- .../secondary/clang/include/clang/Basic/BUILD.gn | 15 + llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn | 2 + llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn | 1 + llvm/utils/lit/lit/Test.py | 4 + llvm/utils/lit/lit/TestRunner.py | 39 +- .../allow-retries/does-not-succeed-within-limit.py | 3 + llvm/utils/lit/tests/Inputs/allow-retries/lit.cfg | 9 + .../more-than-one-allow-retries-lines.py | 4 + .../Inputs/allow-retries/not-a-valid-integer.py | 3 + .../Inputs/allow-retries/succeeds-within-limit.py | 24 + .../lit/tests/Inputs/test_retry_attempts/lit.cfg | 10 + .../lit/tests/Inputs/test_retry_attempts/test.py | 22 + .../Inputs/testrunner-custom-parsers/test.txt | 3 + llvm/utils/lit/tests/allow-retries.py | 41 ++ llvm/utils/lit/tests/unit/TestRunner.py | 12 + llvm/utils/vim/syntax/llvm.vim | 1 + llvm/utils/vscode/llvm/syntaxes/ll.tmLanguage.yaml | 2 + mlir/docs/CreatingADialect.md | 2 +- mlir/docs/Dialects/SPIR-V.md | 2 +- mlir/docs/LangRef.md | 2 +- mlir/docs/OpDefinitions.md | 2 +- mlir/docs/RationaleLinalgDialect.md | 4 +- mlir/examples/toy/Ch4/toyc.cpp | 1 - mlir/examples/toy/Ch5/toyc.cpp | 1 - mlir/examples/toy/Ch6/toyc.cpp | 1 - mlir/examples/toy/Ch7/toyc.cpp | 1 - mlir/include/mlir/Analysis/CallGraph.h | 3 + .../StandardToStandard/StandardToStandard.h | 31 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 31 + mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td | 10 - mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVLowering.h | 37 +- mlir/include/mlir/Dialect/SPIRV/SPIRVTypes.h | 10 + mlir/include/mlir/Dialect/SPIRV/TargetAndABI.h | 35 +- mlir/include/mlir/Dialect/SPIRV/TargetAndABI.td | 2 +- mlir/include/mlir/IR/Dialect.h | 31 +- mlir/include/mlir/IR/DialectHooks.h | 57 +- mlir/include/mlir/IR/PatternMatch.h | 22 +- mlir/include/mlir/IR/StandardTypes.h | 4 +- mlir/include/mlir/IR/Types.h | 5 +- mlir/lib/Analysis/CallGraph.cpp | 17 + mlir/lib/Conversion/CMakeLists.txt | 1 + .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 11 +- .../GPUToSPIRV/ConvertGPUToSPIRVPass.cpp | 9 +- .../Conversion/LinalgToSPIRV/LinalgToSPIRVPass.cpp | 10 +- mlir/lib/Conversion/StandardToSPIRV/CMakeLists.txt | 7 - .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 472 +++++++++---- .../StandardToSPIRV/ConvertStandardToSPIRVPass.cpp | 9 +- .../Conversion/StandardToSPIRV/StandardToSPIRV.td | 53 -- .../Conversion/StandardToStandard/CMakeLists.txt | 13 + .../StandardToStandard/StandardToStandard.cpp | 49 ++ .../Dialect/Linalg/Transforms/LinalgToLoops.cpp | 18 +- mlir/lib/Dialect/SPIRV/LayoutUtils.cpp | 2 +- mlir/lib/Dialect/SPIRV/SPIRVCanonicalization.cpp | 23 +- mlir/lib/Dialect/SPIRV/SPIRVDialect.cpp | 91 +-- mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 479 ++++++++++---- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 4 +- mlir/lib/Dialect/SPIRV/SPIRVTypes.cpp | 49 +- mlir/lib/Dialect/SPIRV/TargetAndABI.cpp | 72 +- .../SPIRV/Transforms/LowerABIAttributesPass.cpp | 54 +- .../lib/Dialect/SPIRV/Transforms/UpdateVCEPass.cpp | 62 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 4 + mlir/lib/IR/Dialect.cpp | 34 +- mlir/lib/IR/StandardTypes.cpp | 2 + mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 3 +- mlir/lib/Transforms/Inliner.cpp | 385 ++++++++++- mlir/test/Conversion/GPUToSPIRV/if.mlir | 8 +- mlir/test/Conversion/GPUToSPIRV/load-store.mlir | 14 +- mlir/test/Conversion/GPUToSPIRV/loop.mlir | 8 +- mlir/test/Conversion/GPUToSPIRV/simple.mlir | 2 +- .../Conversion/StandardToSPIRV/std-to-spirv.mlir | 462 +++++++++---- .../StandardToSPIRV/std-types-to-spirv.mlir | 597 +++++++++++++++++ .../StandardToSPIRV/subview-to-spirv.mlir | 9 + .../{abi-simple.mlir => abi-interface.mlir} | 27 +- .../Dialect/SPIRV/Transforms/abi-load-store.mlir | 20 +- mlir/test/Dialect/SPIRV/target-and-abi.mlir | 37 +- mlir/test/Dialect/Vector/invalid.mlir | 7 + mlir/test/Target/llvmir-intrinsics.mlir | 16 + mlir/test/Transforms/inlining-dce.mlir | 53 ++ mlir/test/Transforms/test-legalizer.mlir | 7 + mlir/test/lib/Dialect/SPIRV/TestAvailability.cpp | 7 +- mlir/test/lib/TestDialect/TestPatterns.cpp | 3 + mlir/test/lib/Transforms/CMakeLists.txt | 1 + 377 files changed, 14638 insertions(+), 2573 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/misc-unconventional- [...] create mode 100644 clang/include/clang/Basic/BuiltinsSVE.def create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1_shortform.c create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vqdmlad.c create mode 100644 clang/test/CodeGenCXX/used-decl-visitor.cpp create mode 100644 clang/test/OpenMP/target_device_codegen.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_avx.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_avx512f.cpp create mode 100644 libc/cmake/modules/cpu_features/check_cpu_features.cpp.in delete mode 100644 libc/cmake/modules/cpu_features/check_sse.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_sse2.cpp create mode 100644 libc/src/string/memcpy.cpp create mode 100644 libc/src/string/memcpy.h create mode 100644 libc/src/string/memcpy_arch_specific.h.def create mode 100644 libc/src/string/memory_utils/memcpy_utils.h create mode 100644 libc/src/string/x86/CMakeLists.txt create mode 100644 libc/src/string/x86/memcpy_arch_specific.h.inc create mode 100644 libc/test/src/string/memcpy_test.cpp create mode 100644 libc/test/src/string/memory_utils/memcpy_utils_test.cpp create mode 100644 llvm/include/llvm/IR/VPIntrinsics.def create mode 100644 llvm/test/Analysis/MemorySSA/scalable-vec.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir create mode 100644 llvm/test/CodeGen/AArch64/machine-outliner-iterative.mir create mode 100644 llvm/test/CodeGen/AMDGPU/indirect-call.ll create mode 100644 llvm/test/CodeGen/ARM/ipra-extra-spills-exceptions.ll create mode 100644 llvm/test/CodeGen/ARM/ipra-extra-spills.ll create mode 100644 llvm/test/CodeGen/Generic/csw-debug-assert.ll delete mode 100644 llvm/test/CodeGen/PowerPC/aix-byval-param.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation1.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation2.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation3.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll create mode 100644 llvm/test/CodeGen/PowerPC/ifcvt.mir create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmlad.ll create mode 100644 llvm/test/DebugInfo/AArch64/dbgcall-site-float-entry-value.ll create mode 100644 llvm/test/Transforms/InstCombine/vscale_alloca.ll create mode 100644 llvm/test/Transforms/Reassociate/cse-pairs.ll create mode 100644 llvm/test/Transforms/SCCP/binaryops-range-special-cases.ll create mode 100644 llvm/test/Transforms/SCCP/ip-ranges-binaryops.ll create mode 100644 llvm/test/Transforms/SCCP/ipsccp-range-crashes.ll create mode 100644 llvm/test/Verifier/vp-intrinsics.ll create mode 100644 llvm/unittests/IR/VPIntrinsicTest.cpp create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/does-not-succeed-with [...] create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/lit.cfg create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/more-than-one-allow-r [...] create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/not-a-valid-integer.py create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/succeeds-within-limit.py create mode 100644 llvm/utils/lit/tests/Inputs/test_retry_attempts/lit.cfg create mode 100644 llvm/utils/lit/tests/Inputs/test_retry_attempts/test.py create mode 100644 llvm/utils/lit/tests/allow-retries.py create mode 100644 mlir/include/mlir/Conversion/StandardToStandard/StandardToStandard.h delete mode 100644 mlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.td create mode 100644 mlir/lib/Conversion/StandardToStandard/CMakeLists.txt create mode 100644 mlir/lib/Conversion/StandardToStandard/StandardToStandard.cpp create mode 100644 mlir/test/Conversion/StandardToSPIRV/std-types-to-spirv.mlir rename mlir/test/Dialect/SPIRV/Transforms/{abi-simple.mlir => abi-interface.mlir} (57%) create mode 100644 mlir/test/Transforms/inlining-dce.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (b23fe7f1d -> 732efdffe)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards b23fe7f1d 0: update: llvm-linux: boot new 732efdffe 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b23fe7f1d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 190 +- 02-build_llvm/console.log | 12770 +++++++++++++++++------------------ 03-build_linux/console.log | 894 ++- 04-boot_linux/console.log | 4 +- 05-check_regression/console.log | 12 +- 06-update_baseline/console.log | 12 +- console.log | 13882 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 8 files changed, 13893 insertions(+), 13881 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig updated (ac309e7744be -> 5076190daded)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig in repository toolchain/ci/linux. from ac309e7744be Merge branch 'for-linus' of git://git.kernel.org/pub/scm/l [...] adds fd4d9c7d0c71 mm: slub: add missing TID bump in kmem_cache_alloc_bulk() adds 5076190daded mm: slub: be more careful about the double cmpxchg of freelist No new revisions were added by this update. Summary of changes: mm/slub.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig updated (4e3d3e40726 -> c7e90196818)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig in repository toolchain/ci/gcc. from 4e3d3e40726 middle-end/94188 fix fold of addr expression generation adds 4da9288745d libgomp testsuite - disable long double for AMDGCN adds cb26919c857 aarch64: Treat p12-p15 as call-preserved in SVE PCS functions adds d91480dee93 aarch64: Fix SYMBOL_TINY_GOT handling for ILP32 [PR94201] adds d5029d45940 Fix up duplicated duplicated words in comments adds 1ba9acb11e3 middle-end/94206 fix memset folding to avoid types with padding adds 11cf25c40e3 PR c++/94147 - mangling of lambdas assigned to globals adds 5a80a6c3e5f amdgcn: Add cond_add/sub/and/ior/xor for all vector modes adds dbde9e2d595 amdgcn: Fix vector compare modes adds 07522ae90b5 libstdc++: Fix compilation with released versions of Clang adds e5de406f996 libstdc++ Fix compilation of <stop_token> with Clang adds 0db2cd17702 analyzer: tweaks to exploded_node ctor adds 7d9c107ab1e analyzer: introduce noop_region_model_context adds f665beeba62 analyzer: add test coverage for fixed ICE [PR94047] adds 884d9141112 analyzer: make summarized dumps more comprehensive adds 26cbcfe5fce Fix libgomp.oacc-fortran/atomic_capture-1.f90 adds 8165795c155 [ARM][GCC][2/3x]: MVE intrinsics with ternary operands. adds e3678b4464a [ARM][GCC][3/3x]: MVE intrinsics with ternary operands. adds db5db9d2548 [ARM][GCC][1/4x]: MVE intrinsics with quaternary operands. adds 8eb3b6b9cf2 [ARM][GCC][2/4x]: MVE intrinsics with quaternary operands. adds f2170a379b0 [ARM][GCC][3/4x]: MVE intrinsics with quaternary operands. adds 532e9e2402a [ARM][GCC][4/4x]: MVE intrinsics with quaternary operands. adds 4ff68575991 [ARM][GCC][1/5x]: MVE store intrinsics. adds 535a8645bb8 [ARM][GCC][2/5x]: MVE load intrinsics. adds 405e918c314 [ARM][GCC][3/5x]: MVE store intrinsics with predicated suffix. adds 429d607bc46 [ARM][GCC][4/5x]: MVE load intrinsics with zero(_z) suffix. adds bf1e3d5afa1 [ARM][GCC][5/5x]: MVE ACLE load intrinsics which load a byt [...] adds 4cc23303bad [ARM][GCC][6/5x]: Remaining MVE load intrinsics which loads [...] adds 5cad47e0f85 [ARM][GCC][7/5x]: MVE store intrinsics which stores byte,ha [...] adds 7a5fffa5ed0 [ARM][GCC][8/5x]: Remaining MVE store intrinsics which stor [...] adds 3512dc0108a PR ipa/92799 - ICE on a weakref function definition followe [...] adds 529ea7d9596 Complete change to resolve pr90275. adds 07fe4af4d51 rs6000: Add back some w* constraints (PR91886) adds b3341826531 libstdc++: Fix is_trivially_constructible (PR 94033) adds b5562f1187d Daily bump. adds 73bc09fa8c6 middle-end/94216 fix another build_fold_addr_expr use adds f3280e4c0c9 ipa/94217 simplify offsetted address build adds c7e90196818 phiopt: Avoid -fcompare-debug bug in phiopt [PR94211] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 3395 ++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 55 + gcc/analyzer/diagnostic-manager.cc | 2 +- gcc/analyzer/engine.cc | 13 +- gcc/analyzer/exploded-graph.h | 7 +- gcc/analyzer/region-model.cc | 265 +- gcc/analyzer/region-model.h | 90 +- gcc/analyzer/sm-malloc.cc | 2 +- gcc/asan.c | 2 +- gcc/cgraphunit.c | 13 +- gcc/config/aarch64/aarch64.c | 48 +- gcc/config/aarch64/aarch64.md | 22 +- gcc/config/arc/arc.c | 2 +- gcc/config/arm/arm-builtins.c | 188 + gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm.c | 25 + gcc/config/arm/arm_mve.h | 16961 ++++++++++++++++--- gcc/config/arm/arm_mve_builtins.def | 506 + gcc/config/arm/constraints.md | 16 +- gcc/config/arm/mve.md | 6415 ++++++- gcc/config/arm/predicates.md | 16 + gcc/config/gcn/gcn-valu.md | 31 +- gcc/config/gcn/gcn.h | 4 + gcc/config/rs6000/constraints.md | 11 + gcc/cp/ChangeLog | 15 + gcc/cp/constraint.cc | 6 +- gcc/cp/coroutines.cc | 4 +- gcc/cp/logic.cc | 8 +- gcc/cp/parser.c | 20 +- gcc/cp/pt.c | 2 +- gcc/cp/tree.c | 20 +- gcc/cse.c | 1 - gcc/d/ChangeLog | 6 + gcc/d/d-target.cc | 2 +- gcc/d/expr.cc | 2 +- gcc/fold-const.c | 2 +- gcc/fortran/ChangeLog | 6 + gcc/fortran/class.c | 2 +- gcc/fortran/trans-types.c | 2 +- gcc/gimple-fold.c | 6 + gcc/gimple-loop-versioning.cc | 2 +- gcc/ipa-cp.c | 12 +- gcc/ipa-predicate.c | 2 +- gcc/optinfo-emit-json.cc | 2 +- gcc/testsuite/ChangeLog | 1379 +- .../c-c++-common/goacc/firstprivate-mappings-1.c | 12 +- gcc/testsuite/g++.dg/abi/lambda-vis.C | 23 + gcc/testsuite/g++.dg/abi/mangle74.C | 30 + .../g++.dg/goacc/firstprivate-mappings-1.C | 12 +- gcc/testsuite/g++.dg/torture/pr94216.C | 45 + gcc/testsuite/gcc.dg/analyzer/pr94047.c | 23 + gcc/testsuite/gcc.dg/attr-weakref-5.c | 31 + gcc/testsuite/gcc.dg/pr94211.c | 12 + gcc/testsuite/gcc.dg/torture/pr94206.c | 17 + gcc/testsuite/gcc.target/aarch64/pr94201.c | 13 + .../gcc.target/aarch64/sve/acle/general/cpy_1.c | 4 + gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c | 6 + 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create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c create mode 100644 libstdc++-v3/testsuite/20_util/is_nothrow_constructible/94003.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig updated (53215f214c -> d8c8b84859)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig in repository toolchain/ci/binutils-gdb. from 53215f214c Non-contiguous memory regions support: Avoid calls to abort adds ac4bf06ca2 Fix seg-fault in strip when copying a file containing corrup [...] adds aef397a154 Non-contiguous memory regions support: Fix testcases after p [...] adds a9933ccf46 [gdb/testsuite] Add test-case gdb.dwarf2/break-inline-psymtab.exp adds cdf236890c Automatic date update in version.in adds 645ba68105 setup_archive parameter mismatch adds b966f55ffa Invalid read in process_netbsd_elf_note adds 1cb7d8b1af readelf leak in process_archive adds 81a65eb338 Don't use bfd.h in binutils/elfcomm.c adds effc14f54c Additional c99 elfxx-riscv.c fix adds d8c8b84859 [gdb/testsuite] Fix gdb.opt/inline-locals.exp KFAILs No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 10 ++ bfd/elf.c | 131 ++++++++++----- bfd/elfxx-riscv.c | 3 +- bfd/version.h | 2 +- binutils/ChangeLog | 24 +++ binutils/elfcomm.c | 56 ++++--- binutils/elfcomm.h | 6 +- binutils/readelf.c | 183 +++++++++++---------- gdb/testsuite/ChangeLog | 11 ++ .../break-inline-psymtab-2.c} | 17 +- .../break-inline-psymtab.c} | 6 +- .../break-inline-psymtab.exp} | 25 +-- gdb/testsuite/gdb.opt/inline-locals.exp | 26 ++- ld/ChangeLog | 5 + ld/testsuite/ld-arm/non-contiguous-arm4.d | 2 +- ld/testsuite/ld-powerpc/non-contiguous-powerpc.d | 2 +- 16 files changed, 330 insertions(+), 179 deletions(-) copy gdb/testsuite/{gdb.base/info-locals-unused-static-var.c => gdb.dwarf2/break-i [...] copy gdb/testsuite/{gdb.base/info-locals-unused-static-var.c => gdb.dwarf2/break-i [...] copy gdb/testsuite/{gdb.arch/amd64-break-on-asm-line.exp => gdb.dwarf2/break-inlin [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig updated (5c992ae96 -> 291d05c11)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 5c992ae96 2: update: gcc-4e3d3e40726e1b68bf52fa205c68495124ea60b8: 5856 discards c2b9cd238 1: reset: gcc-4e3d3e40726e1b68bf52fa205c68495124ea60b8: 5856 discards a89d40967 0: update: binutils-53215f214c61b850085196a8d69774eed026ecd9: boot new 291d05c11 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5c992ae96) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ma [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 16 +- 02-prepare_abe/console.log | 426 +- 03-build_abe-binutils/console.log | 11288 +++++------ 04-build_abe-stage1/console.log | 20099 ++++++++++---------- 05-build_linux/console.log | 3977 ++-- 06-boot_linux/console.log | 141 + 07-check_regression/console.log | 11 +- 08-update_baseline/console.log | 106 +- console.log | 36064 +++++++++++++++++++----------------- jenkins/manifest.sh | 16 +- regressions.txt | 12 +- results | 6 +- 12 files changed, 37402 insertions(+), 34760 deletions(-) create mode 100644 06-boot_linux/console.log -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[binutils-gdb] branch master updated (d8c8b84859d -> 19a2740f7f2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from d8c8b84859d [gdb/testsuite] Fix gdb.opt/inline-locals.exp KFAILs new 724fd9ba432 gdb: Restructure the completion_tracker class new 19a2740f7f2 gdb: Remove C++ symbol aliases from completion list The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gdb/ChangeLog | 43 +++++ gdb/completer.c | 209 ++++++++++++++++++--- gdb/completer.h | 45 +++-- gdb/symtab.c | 21 +++ gdb/testsuite/ChangeLog | 5 + .../cp-completion-aliases.cc} | 54 +++++- .../gdb.linespec/cp-completion-aliases.exp | 54 ++++++ 7 files changed, 374 insertions(+), 57 deletions(-) copy gdb/testsuite/{gdb.cp/constexpr-field.cc => gdb.linespec/cp-completion-aliase [...] create mode 100644 gdb/testsuite/gdb.linespec/cp-completion-aliases.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig updated (5672ae8d868 -> 981f0802b37)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/llvm-project. from 5672ae8d868 [SCCP] Use constant ranges for select, if cond is overdefined. adds cda2b0769f5 [InstCombine][X86] Tests for variable but in-range per-elem [...] adds 8d019cda851 Fix ac1d23ed7de01fb3 interaction with gold plugin adds 28c5d97beec [ARM,MVE] Add intrinsics and isel for MVE integer VMLA. adds 928776de923 [ARM,MVE] Add intrinsics for the VQDMLAH family. adds c5b81466c2b Reland D75470 [SVE] Auto-generate builtins and header for svld1. adds f4e495a18e8 [InstCombine][X86] simplifyX86varShift - convert variable i [...] adds 0db7244295b [SCCP] Precommit some additional tests for integer ranges. adds a0a3a9c5a83 [DebugInfo] Fix multi-byte entry values in call site values adds 940ba1465b2 Fix possible assertion when using PBQP with debug info adds 4788ca450fe [AArch64][SVE] Change pointer type of nontemporal load/stor [...] adds 9bdcd9bf443 [llvm][SVE] Addressing mode for FF/NF loads. adds b09cce07c7e [OPENMP50]Codegen for detach clause. adds db31e2e1e6c [lldb/Target] Support more than 2 symbols in StackFrameRecognizer adds a8901a03544 [mlir] NFC: Fix trivial typos in documents adds 6739805e24c [ARM] Track epilogue instructions with FrameDestroy flag (NFC) adds 4cf01ed75e3 [hip] Revise `GlobalDecl` constructors. NFC. adds 2aaafaf5005 [NFC] Add missing REQUIRES clause to a test adds 96b70809d95 [NFC][PowerPC] Add a new MIR file to test if-converter pass adds d000655a8cd [Alignment][NFC] Deprecate getMaxAlignment adds 73cea83a6f5 [IPRA][ARM] Spill extra registers at -Oz adds 85334b030a6 [NFCI][SCEV] Avoid recursion in SCEVExpander::isHighCostExp [...] adds f3e297d90fc Fix build with gcc 7.5 by adding a "redundant move" adds 4d506da91c4 Fix `warning: extra ‘;’` (NFC) adds 24c2e61362a [InstCombine][X86] Add additional demandedelts style test f [...] adds 3481062bc68 [lldb] [testsuite] Enable forgotten -gsplit-dwarf for 2 testfiles adds c21866476e1 [PowerPC][AIX] Implement by-val caller arguments in a singl [...] adds ef64ba83119 [InstCombine] GEPOperator::accumulateConstantOffset does no [...] adds dd12826808f [Syntax] Build template declaration nodes adds 9f981e9adf9 Reland "[gn build] (manually) port 8b409eaba" adds 06150e8356c [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds f57290ec57d [gn build] add rebase changes that should have been in 9f98 [...] adds d1a7bfca743 [AMDGPU] Fix AMDGPUUnifyDivergentExitNodes adds ea4597eef10 Reapply "AMDGPU/GlobalISel: Fully handle 0 dmask case durin [...] adds 4ea1baf6a0e AMDGPU: Initial, crude support for indirect calls adds fc2a5ef9c87 [NFC][PowerPC] Update test adds 642a424bc49 [gn build] remove a workaround that is no longer needed adds 04a309dd0be [libc] Adding memcpy implementation for x86_64 adds 881f5b5a7b2 Revert "[Syntax] Build template declaration nodes" adds e13d153c1b5 [ARM,MVE] Add intrinsics for the VQDMLAD family. adds e6a74803d4e [VPlan] Use underlying value for printing, if available. adds 0d896278c81 Support repeated machine outlining adds 1cc09dcefcc Add missing module map entry. adds 1e4ee0bfc52 [Dominators] Fixup comments in GenericDominatorTreeConstruc [...] adds dc5f9826396 [GlobalISel] Port some basic undef combines from DAGCombiner.cpp adds 9c6458ecf8c [InstSimplify] Add bitreverse/bswap vector tests adds 746bd860c9c Replace get*Alignment() methods with get*Align() equivalents. adds e009fad342c [PowerPC] Remove UB from PPCInstrInfo when handling rotates [...] adds f8e8f0a6038 [TSan] Support pointer authentication in setjmp/longjmp int [...] adds 6f79f80e6e4 [HIP] Fix duplicate clang -cc1 options on MSVC toolchain adds 1010c44b4c0 [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds 2f8894a5b8b [OPENMP50]Add support for extended device clause in target [...] adds ebec984e14a [AliasAnalysis] Misc fixes for checking aliasing with scala [...] adds 4e8830830ee [libc] Add a missing deps to the linux syscalls target. adds e225e770f7e [TableGen][GlobalISel] Rework RegisterBankEmitter for easie [...] adds e9f22fd4293 [TableGen][GlobalISel] Account for HwMode in RegisterBank r [...] adds 4be504a97f9 [mlir] Add support for detecting single use callables in th [...] adds b40ee7ff1b1 [lldb/MemoryHistoryAsan] Fix address resolution for recorde [...] adds 1e431322099 [mlir][LLVM] Add masked reads and writes. adds 6bdb0efa42b [InstSimplify] Regenerate OR tests adds 47ce1406c8e [InstSimplify] Add missing vector OR test to show lack of D [...] adds 9d40292a642 [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds 64a5e57a61b [mlir] Disable notifyMatchFailure in NDEBUG adds 498b53890d8 [SelectionDAGBuilder][FPEnv] Take into account SelectionDAG [...] adds 22c66c1a28c [JumpThreading] add a miscompile test based on discussion i [...] adds c682a605eb4 [Fuchsia] Include llvm-gsymutil tool in the Fuchsia toolchain adds e24e95fe900 Remove CompositeType class. adds 49bdfd888d3 [InstSimplify] Add missing vector masked add tests to show [...] adds 30ccc2e8d24 [libc++] Add missing visibility annotation for __base adds faba1d034a0 [LangRef] add explanatory text for select poison semantics [...] adds acaf1442226 [LangRef] fix formatting tick; NFC adds 00c1cd19349 [VPlan] Record underlying value for VPValues created by add [...] adds 9bb5685b216 [clang-tidy] misc-unconventional-assign-operator suggest to [...] adds ae7bda5dac7 [mlir][Linalg] Remove initial value for conditions. adds fd2c15e6024 [VPlan] Do not print mapping for Value2VPValue. adds 85bd4369610 [Host] Remove some code that's not needed anymore. adds 7b5d4669daa [MLIR] Allow global with an external linkage to include ini [...] adds 99336bf95ab [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds f3c857fae29 [OPENMP50]Add basic codegen support for ancestor device modifier. adds f951b0f82df [lit] Add builtin support for flaky tests in lit adds 14970669dde [lldb/Test] Add unittest for FileSpec::operator bool() adds 5ffb30fd6c7 [lldb/PlatformDarwin] Expose current toolchain and CL tools [...] adds 1365ab4b63b [clang-tidy] RenamerClangTidy now correctly renames `using [...] adds 47622efc6f0 [clang/test] Add test for DIFlagAllCallsDescribed under -gg [...] adds f18233dad46 Fix -fsanitize=array-bound to treat T[0] union members as f [...] adds d8061456bcc [LangRef] fix typo in select poison explanation; NFC adds c69a4d6bef0 [SelectionDAG] When splitting gathers/scatters in type lega [...] adds 3b35f9d8b51 [mlir][spirv] Use memref memory space for storage class adds 67e8690e53c [mlir][spirv] Let SPIRVConversionTarget consider type availability adds 58df5e6d9ad [mlir][spirv] Plumbing target environment into type converter adds f741b8eabed [mlir][spirv] Move type checks from dialect class to type h [...] adds 9efb4b40232 [mlir][spirv] Make SPIRVTypeConverter target environment aware adds ffd4583c6ae [mlir][spirv] Change standard op patterns to consider type [...] adds 73431a492ba [mlir][spirv] Consolidate std.constant to spv.constant conversions adds 62201763c54 Fix crash in check-mlir due to 08ab8c9af4dd27cb306b449edc9a [...] adds f0ca0a25388 [AppleObjCRuntimeV2] Rewrite GetClassDescriptor, reducing i [...] adds b72e13c242d [MLIR] Deduplicate dialect registration by ClassID adds cd1212deffb [mlir] Introduced CallOp Dialect Conversion adds aacf022cd57 [PowerPC] add IR level isFMAFasterThanFMulAndFAdd - NFC And [...] adds 52b2bae777f [lldb/testsuite] Skip TestEmptyStdModule.py if using a remo [...] adds c182be211a4 [lldb/testsuite] Tweak TestBreakpointLocations.py to pass f [...] adds 127b9d9d774 [lldb/testsuite] Apply @skipIfDarwinEmbedded to part of Tes [...] adds 71db787c458 [lldb/testsuite] Rewrite TestThreadLocal.py adds acd641c19d6 [lldb/testsuite] Slightly rework TestHiddenIvars.py adds 59918d3793a [lldb/testsuite] Make TestObjCIvarStripped.py working with [...] adds 79a7ed92a9b CFGDiff: Simplify/common the begin/end implementations to u [...] adds 2ea5495759f [InstCombine][SVE] Fix InstCombiner::visitAllocaInst for sc [...] adds b58f6bb1207 Add a test for UsedDeclVisitor adds f528df8e269 Revert "Add a test for UsedDeclVisitor" adds 3f85134d710 [PowerPC] implement target hook isProfitableToHoist adds 2c1ba63edee [mlir] Change missed usage PatternMatchResult to LogicalResult adds e778db6d721 recommit b58f6bb1207521cdf6a856004525d7bffa5f2153 adds 5d881dd8a8b Update so debugserver can be built on macos again with xcodebuild. adds 4b0f1e12c24 [AST] Add a flag indicating if any subexpression had errors adds bc18624b403 [mlir] vector.type_cast: disallow memrefs with layout in verifier adds d8fcdcdf68c [Reassociate] add testcases for more than 1 pairs - NFC adds 8a36594a7ec [SCCP] Use constant ranges for binary operators. adds 981f0802b37 [SVE] Generate overloaded functions for ACLE intrinsics. No new revisions were added by this update. Summary of changes: .../misc/UnconventionalAssignOperatorCheck.cpp | 5 +- .../clang-tidy/utils/RenamerClangTidyCheck.cpp | 5 + ...isc-unconventional-assign-operator-precxx11.cpp | 6 + .../checkers/readability-identifier-naming.cpp | 5 + clang/cmake/caches/Fuchsia-stage2.cmake | 1 + clang/include/clang/AST/ASTDumperUtils.h | 2 + clang/include/clang/AST/ComputeDependence.h | 4 + clang/include/clang/AST/DependenceFlags.h | 30 +- clang/include/clang/AST/Expr.h | 9 +- clang/include/clang/AST/ExprCXX.h | 4 +- clang/include/clang/AST/GlobalDecl.h | 22 +- clang/include/clang/AST/OpenMPClause.h | 28 +- clang/include/clang/AST/Type.h | 2 +- clang/include/clang/Basic/Attr.td | 4 +- clang/include/clang/Basic/BuiltinsAArch64.def | 13 - clang/include/clang/Basic/BuiltinsSVE.def | 20 + clang/include/clang/Basic/CMakeLists.txt | 10 +- clang/include/clang/Basic/OpenMPKinds.def | 8 + clang/include/clang/Basic/OpenMPKinds.h | 7 + clang/include/clang/Basic/TargetBuiltins.h | 49 ++ clang/include/clang/Basic/arm_mve.td | 61 ++ clang/include/clang/Basic/arm_sve.td | 125 ++++ clang/include/clang/Parse/Parser.h | 4 +- clang/include/clang/Sema/Sema.h | 4 +- clang/include/clang/module.modulemap | 1 + clang/lib/AST/ComputeDependence.cpp | 37 +- clang/lib/AST/Expr.cpp | 3 +- clang/lib/AST/ItaniumMangle.cpp | 10 +- clang/lib/AST/Mangle.cpp | 2 +- clang/lib/AST/OpenMPClause.cpp | 5 + clang/lib/AST/TextNodeDumper.cpp | 5 + clang/lib/Basic/OpenMPKinds.cpp | 17 +- clang/lib/Basic/Targets/AArch64.cpp | 4 + clang/lib/CodeGen/CGBuiltin.cpp | 105 +-- clang/lib/CodeGen/CGDebugInfo.cpp | 3 +- clang/lib/CodeGen/CGDecl.cpp | 2 +- clang/lib/CodeGen/CGExpr.cpp | 12 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 61 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 33 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 5 +- clang/lib/CodeGen/CodeGenFunction.h | 1 + clang/lib/CodeGen/CodeGenModule.cpp | 9 +- clang/lib/CodeGen/CodeGenModule.h | 3 - clang/lib/Driver/ToolChains/MSVC.cpp | 6 +- clang/lib/Parse/ParseOpenMP.cpp | 31 +- clang/lib/Sema/SemaDeclAttr.cpp | 17 +- clang/lib/Sema/SemaExpr.cpp | 5 +- clang/lib/Sema/SemaOpenMP.cpp | 38 +- clang/lib/Sema/TreeTransform.h | 13 +- clang/lib/Serialization/ASTReader.cpp | 2 + clang/lib/Serialization/ASTReaderStmt.cpp | 6 +- clang/lib/Serialization/ASTWriter.cpp | 2 + clang/lib/Serialization/ASTWriterDecl.cpp | 4 + clang/lib/Serialization/ASTWriterStmt.cpp | 1 + .../acle_sve_ld1_shortform.c | 83 +++ clang/test/CodeGen/arm-mve-intrinsics/ternary.c | 645 ++++++++++++++++++ clang/test/CodeGen/arm-mve-intrinsics/vqdmlad.c | 677 +++++++++++++++++++ clang/test/CodeGen/bounds-checking.c | 22 +- .../CodeGenCXX/dbg-info-all-calls-described.cpp | 12 + clang/test/CodeGenCXX/used-decl-visitor.cpp | 18 + clang/test/Driver/hip-options.hip | 5 + clang/test/OpenMP/target_ast_print.cpp | 18 +- clang/test/OpenMP/target_data_device_messages.cpp | 5 +- clang/test/OpenMP/target_device_codegen.cpp | 50 ++ clang/test/OpenMP/target_device_messages.cpp | 14 +- .../OpenMP/target_enter_data_device_messages.cpp | 5 +- .../OpenMP/target_exit_data_device_messages.cpp | 5 +- .../test/OpenMP/target_update_device_messages.cpp | 5 +- clang/test/OpenMP/task_codegen.c | 12 +- clang/unittests/CodeGen/CodeGenExternalTest.cpp | 2 +- clang/utils/TableGen/SveEmitter.cpp | 727 ++++++++++++++++++++- clang/utils/TableGen/TableGen.cpp | 18 + clang/utils/TableGen/TableGenBackends.h | 3 + compiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp | 8 + libc/CMakeLists.txt | 1 + libc/cmake/modules/LLVMLibCCheckCpuFeatures.cmake | 180 ++--- libc/cmake/modules/LLVMLibCRules.cmake | 9 +- libc/cmake/modules/cpu_features/check_avx.cpp | 8 - libc/cmake/modules/cpu_features/check_avx512f.cpp | 8 - .../modules/cpu_features/check_cpu_features.cpp.in | 29 + libc/cmake/modules/cpu_features/check_sse.cpp | 8 - libc/cmake/modules/cpu_features/check_sse2.cpp | 8 - libc/config/linux/CMakeLists.txt | 2 + libc/lib/CMakeLists.txt | 1 + libc/src/string/CMakeLists.txt | 63 +- libc/src/string/memcpy.cpp | 22 + libc/src/string/memcpy.h | 21 + libc/src/string/memcpy_arch_specific.h.def | 65 ++ libc/src/string/memory_utils/CMakeLists.txt | 7 +- libc/src/string/memory_utils/memcpy_utils.h | 100 +++ libc/src/string/memory_utils/utils.h | 7 +- libc/src/string/x86/CMakeLists.txt | 4 + libc/src/string/x86/memcpy_arch_specific.h.inc | 35 + libc/test/src/string/CMakeLists.txt | 21 + libc/test/src/string/memcpy_test.cpp | 53 ++ libc/test/src/string/memory_utils/CMakeLists.txt | 7 + .../src/string/memory_utils/memcpy_utils_test.cpp | 208 ++++++ libc/test/src/string/memory_utils/utils_test.cpp | 8 + libcxx/include/functional | 2 +- lldb/include/lldb/Target/StackFrameRecognizer.h | 14 +- lldb/packages/Python/lldbsuite/test/lldbutil.py | 2 +- lldb/source/Commands/CommandObjectFrame.cpp | 41 +- lldb/source/Commands/Options.td | 3 +- lldb/source/Host/macosx/objcxx/Host.mm | 37 -- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 53 +- .../MemoryHistory/asan/MemoryHistoryASan.cpp | 7 +- .../Plugins/Platform/MacOSX/PlatformDarwin.cpp | 27 + .../Plugins/Platform/MacOSX/PlatformDarwin.h | 9 + .../Plugins/Process/Utility/HistoryThread.cpp | 5 +- .../source/Plugins/Process/Utility/HistoryThread.h | 3 +- .../Plugins/Process/Utility/HistoryUnwind.cpp | 11 +- .../source/Plugins/Process/Utility/HistoryUnwind.h | 6 +- lldb/source/Target/AssertFrameRecognizer.cpp | 24 +- lldb/source/Target/StackFrameRecognizer.cpp | 51 +- .../empty-module/TestEmptyStdModule.py | 1 + .../frame/recognizer/TestFrameRecognizer.py | 62 +- lldb/test/API/commands/frame/recognizer/main.m | 5 +- .../breakpoint/breakpoint_locations/main.c | 4 +- .../TestHWBreakMultiThread.py | 10 +- .../API/lang/cpp/thread_local/TestThreadLocal.py | 51 +- lldb/test/API/lang/cpp/thread_local/main.cpp | 8 +- lldb/test/API/lang/objc/hidden-ivars/Makefile | 20 + .../API/lang/objc/hidden-ivars/TestHiddenIvars.py | 18 +- .../test/API/lang/objc/objc-ivar-stripped/Makefile | 7 +- .../Shell/SymbolFile/DWARF/debug-types-basic.test | 2 +- .../SymbolFile/DWARF/debug-types-expressions.test | 8 +- .../debugserver.xcodeproj/project.pbxproj | 322 +++++---- lldb/unittests/Platform/PlatformDarwinTest.cpp | 18 + lldb/unittests/Target/StackFrameRecognizerTest.cpp | 3 +- lldb/unittests/Utility/FileSpecTest.cpp | 6 + llvm/docs/LangRef.rst | 5 +- .../LLJITWithLazyReexports.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.cpp | 2 +- llvm/include/llvm/Analysis/MemoryLocation.h | 10 + .../llvm/Analysis/ScalarEvolutionExpander.h | 16 +- llvm/include/llvm/CodeGen/DIE.h | 19 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 13 + .../include/llvm/CodeGen/GlobalISel/RegisterBank.h | 13 +- .../llvm/CodeGen/GlobalISel/RegisterBankInfo.h | 3 +- llvm/include/llvm/CodeGen/MachineFrameInfo.h | 5 +- llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 13 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 2 +- llvm/include/llvm/IR/CFGDiff.h | 74 +-- llvm/include/llvm/IR/Constants.h | 2 +- llvm/include/llvm/IR/DerivedTypes.h | 35 +- llvm/include/llvm/IR/Instructions.h | 15 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 13 +- llvm/include/llvm/IR/IntrinsicsARM.td | 26 + .../llvm/Support/GenericDomTreeConstruction.h | 40 +- llvm/include/llvm/Target/GlobalISel/Combine.td | 31 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 4 + llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 48 +- llvm/lib/Analysis/ValueTracking.cpp | 37 +- llvm/lib/CodeGen/Analysis.cpp | 37 +- llvm/lib/CodeGen/CalcSpillWeights.cpp | 9 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 31 + llvm/lib/CodeGen/GlobalISel/RegisterBank.cpp | 8 +- llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | 5 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineOutliner.cpp | 47 +- llvm/lib/CodeGen/MachineRegisterInfo.cpp | 50 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 4 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 31 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 3 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 47 +- llvm/lib/CodeGen/TargetRegisterInfo.cpp | 4 +- llvm/lib/FuzzMutate/Operations.cpp | 18 +- llvm/lib/IR/ConstantFold.cpp | 3 +- llvm/lib/IR/Constants.cpp | 11 +- llvm/lib/IR/Instructions.cpp | 65 +- llvm/lib/IR/Operator.cpp | 5 + llvm/lib/IR/Type.cpp | 58 +- llvm/lib/IR/Value.cpp | 7 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 3 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 10 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 4 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 55 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 5 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 56 +- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 17 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 7 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 42 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 9 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 11 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 341 ++++++++-- llvm/lib/Target/ARM/ARMFrameLowering.h | 9 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 65 +- llvm/lib/Target/ARM/ARMISelLowering.h | 1 + llvm/lib/Target/ARM/ARMInstrMVE.td | 130 ++-- llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 25 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 8 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 10 +- llvm/lib/Target/Lanai/LanaiFrameLowering.cpp | 4 +- llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 6 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 4 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 35 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 138 +++- llvm/lib/Target/PowerPC/PPCISelLowering.h | 8 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 14 +- llvm/lib/Target/RISCV/RISCVRegisterBankInfo.cpp | 4 +- llvm/lib/Target/RISCV/RISCVRegisterBankInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVSubtarget.cpp | 2 +- llvm/lib/Target/Sparc/SparcFrameLowering.cpp | 11 +- .../WebAssembly/WebAssemblyFrameLowering.cpp | 6 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 8 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 4 +- llvm/lib/Transforms/IPO/GlobalOpt.cpp | 2 +- llvm/lib/Transforms/IPO/StripSymbols.cpp | 8 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 22 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 6 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 5 +- .../InstCombine/InstructionCombining.cpp | 5 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 66 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 2 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 39 +- llvm/lib/Transforms/Vectorize/VPlan.h | 22 +- llvm/lib/Transforms/Vectorize/VPlanValue.h | 2 + llvm/test/Analysis/MemorySSA/scalable-vec.ll | 25 + .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 10 - .../GlobalISel/prelegalizercombiner-undef.mir | 168 +++++ .../CodeGen/AArch64/machine-outliner-iterative.mir | 149 +++++ .../CodeGen/AArch64/sve-intrinsics-loads-ff.ll | 192 ++++++ .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 273 ++++++++ llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll | 42 +- llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll | 42 +- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 76 ++- ...ed-non-temporal-ldst-addressing-mode-reg-reg.ll | 77 +-- .../legalize-llvm.amdgcn.image.dim.a16.ll | 30 +- .../legalize-llvm.amdgcn.image.load.2d.d16.ll | 116 +--- .../legalize-llvm.amdgcn.image.load.2d.ll | 50 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 201 ++++++ .../CodeGen/AMDGPU/multi-divergent-exit-region.ll | 40 ++ llvm/test/CodeGen/AMDGPU/update-phi.ll | 2 - .../CodeGen/ARM/ipra-extra-spills-exceptions.ll | 149 +++++ llvm/test/CodeGen/ARM/ipra-extra-spills.ll | 406 ++++++++++++ llvm/test/CodeGen/Generic/csw-debug-assert.ll | 64 ++ llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir | 4 +- llvm/test/CodeGen/PowerPC/aix-byval-param.ll | 16 - .../CodeGen/PowerPC/aix-cc-byval-limitation1.ll | 16 + .../CodeGen/PowerPC/aix-cc-byval-limitation2.ll | 16 + .../CodeGen/PowerPC/aix-cc-byval-limitation3.ll | 16 + llvm/test/CodeGen/PowerPC/aix-cc-byval.ll | 206 ++++++ llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll | 146 +++++ .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 54 ++ llvm/test/CodeGen/PowerPC/ifcvt.mir | 53 ++ llvm/test/CodeGen/Thumb2/ifcvt-minsize.ll | 13 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/ternary.ll | 591 +++++++++++++++++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmlad.ll | 589 +++++++++++++++++ llvm/test/CodeGen/X86/fp-intrinsics-flags.ll | 4 +- .../AArch64/dbgcall-site-float-entry-value.ll | 49 ++ .../InstCombine/X86/x86-vector-shifts.ll | 116 ++++ llvm/test/Transforms/InstCombine/gep-vector.ll | 21 + llvm/test/Transforms/InstCombine/vscale_alloca.ll | 37 ++ llvm/test/Transforms/InstSimplify/add-mask.ll | 79 ++- llvm/test/Transforms/InstSimplify/bitreverse.ll | 51 +- llvm/test/Transforms/InstSimplify/bswap.ll | 57 +- llvm/test/Transforms/InstSimplify/or.ll | 108 +-- llvm/test/Transforms/JumpThreading/select.ll | 28 + .../PowerPC/p8-unrolling-legalize-vectors.ll | 198 +++++- llvm/test/Transforms/Reassociate/cse-pairs.ll | 83 +++ .../SCCP/binaryops-range-special-cases.ll | 100 +++ llvm/test/Transforms/SCCP/ip-ranges-binaryops.ll | 134 ++++ llvm/test/Transforms/SCCP/ipsccp-range-crashes.ll | 195 ++++++ llvm/test/Transforms/SCCP/range-and.ll | 36 +- llvm/test/Transforms/SCCP/vector-bitcast.ll | 3 +- .../Transforms/SimplifyCFG/PowerPC/prefer-fma.ll | 5 +- llvm/tools/gold/gold-plugin.cpp | 2 +- .../Transforms/Vectorize/VPlanHCFGTest.cpp | 40 ++ llvm/unittests/Transforms/Vectorize/VPlanTest.cpp | 32 +- llvm/utils/TableGen/CodeGenRegisters.cpp | 4 +- llvm/utils/TableGen/CodeGenRegisters.h | 2 +- llvm/utils/TableGen/RegisterBankEmitter.cpp | 95 ++- .../secondary/clang/include/clang/Basic/BUILD.gn | 15 + llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn | 2 + llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn | 1 + llvm/utils/lit/lit/Test.py | 4 + llvm/utils/lit/lit/TestRunner.py | 39 +- .../allow-retries/does-not-succeed-within-limit.py | 3 + llvm/utils/lit/tests/Inputs/allow-retries/lit.cfg | 9 + .../more-than-one-allow-retries-lines.py | 4 + .../Inputs/allow-retries/not-a-valid-integer.py | 3 + .../Inputs/allow-retries/succeeds-within-limit.py | 24 + .../lit/tests/Inputs/test_retry_attempts/lit.cfg | 10 + .../lit/tests/Inputs/test_retry_attempts/test.py | 22 + .../Inputs/testrunner-custom-parsers/test.txt | 3 + llvm/utils/lit/tests/allow-retries.py | 41 ++ llvm/utils/lit/tests/unit/TestRunner.py | 12 + llvm/utils/vim/syntax/llvm.vim | 1 + llvm/utils/vscode/llvm/syntaxes/ll.tmLanguage.yaml | 2 + mlir/docs/CreatingADialect.md | 2 +- mlir/docs/Dialects/SPIR-V.md | 2 +- mlir/docs/LangRef.md | 2 +- mlir/docs/OpDefinitions.md | 2 +- mlir/docs/RationaleLinalgDialect.md | 4 +- mlir/examples/toy/Ch4/toyc.cpp | 1 - mlir/examples/toy/Ch5/toyc.cpp | 1 - mlir/examples/toy/Ch6/toyc.cpp | 1 - mlir/examples/toy/Ch7/toyc.cpp | 1 - mlir/include/mlir/Analysis/CallGraph.h | 3 + .../StandardToStandard/StandardToStandard.h | 31 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 31 + mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td | 10 - mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVLowering.h | 37 +- mlir/include/mlir/Dialect/SPIRV/SPIRVTypes.h | 10 + mlir/include/mlir/Dialect/SPIRV/TargetAndABI.h | 35 +- mlir/include/mlir/Dialect/SPIRV/TargetAndABI.td | 2 +- mlir/include/mlir/IR/Dialect.h | 31 +- mlir/include/mlir/IR/DialectHooks.h | 57 +- mlir/include/mlir/IR/PatternMatch.h | 22 +- mlir/include/mlir/IR/Types.h | 5 +- mlir/lib/Analysis/CallGraph.cpp | 17 + mlir/lib/Conversion/CMakeLists.txt | 1 + .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 11 +- .../GPUToSPIRV/ConvertGPUToSPIRVPass.cpp | 9 +- .../Conversion/LinalgToSPIRV/LinalgToSPIRVPass.cpp | 10 +- mlir/lib/Conversion/StandardToSPIRV/CMakeLists.txt | 7 - .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 472 +++++++++---- .../StandardToSPIRV/ConvertStandardToSPIRVPass.cpp | 9 +- .../Conversion/StandardToSPIRV/StandardToSPIRV.td | 53 -- .../Conversion/StandardToStandard/CMakeLists.txt | 13 + .../StandardToStandard/StandardToStandard.cpp | 49 ++ .../Dialect/Linalg/Transforms/LinalgToLoops.cpp | 18 +- mlir/lib/Dialect/SPIRV/LayoutUtils.cpp | 2 +- mlir/lib/Dialect/SPIRV/SPIRVCanonicalization.cpp | 23 +- mlir/lib/Dialect/SPIRV/SPIRVDialect.cpp | 91 +-- mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 479 ++++++++++---- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 4 +- mlir/lib/Dialect/SPIRV/SPIRVTypes.cpp | 49 +- mlir/lib/Dialect/SPIRV/TargetAndABI.cpp | 72 +- .../SPIRV/Transforms/LowerABIAttributesPass.cpp | 54 +- .../lib/Dialect/SPIRV/Transforms/UpdateVCEPass.cpp | 62 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 4 + mlir/lib/IR/Dialect.cpp | 34 +- mlir/lib/IR/StandardTypes.cpp | 2 + mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 3 +- mlir/lib/Transforms/Inliner.cpp | 385 ++++++++++- mlir/test/Conversion/GPUToSPIRV/if.mlir | 8 +- mlir/test/Conversion/GPUToSPIRV/load-store.mlir | 14 +- mlir/test/Conversion/GPUToSPIRV/loop.mlir | 8 +- mlir/test/Conversion/GPUToSPIRV/simple.mlir | 2 +- .../Conversion/StandardToSPIRV/std-to-spirv.mlir | 462 +++++++++---- .../StandardToSPIRV/std-types-to-spirv.mlir | 597 +++++++++++++++++ .../StandardToSPIRV/subview-to-spirv.mlir | 9 + .../{abi-simple.mlir => abi-interface.mlir} | 27 +- .../Dialect/SPIRV/Transforms/abi-load-store.mlir | 20 +- mlir/test/Dialect/SPIRV/target-and-abi.mlir | 37 +- mlir/test/Dialect/Vector/invalid.mlir | 7 + mlir/test/Target/llvmir-intrinsics.mlir | 16 + mlir/test/Transforms/inlining-dce.mlir | 53 ++ mlir/test/Transforms/test-legalizer.mlir | 7 + mlir/test/lib/Dialect/SPIRV/TestAvailability.cpp | 7 +- mlir/test/lib/TestDialect/TestPatterns.cpp | 3 + mlir/test/lib/Transforms/CMakeLists.txt | 1 + 358 files changed, 13465 insertions(+), 2596 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/misc-unconventional- [...] create mode 100644 clang/include/clang/Basic/BuiltinsSVE.def create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1_shortform.c create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vqdmlad.c create mode 100644 clang/test/CodeGenCXX/used-decl-visitor.cpp create mode 100644 clang/test/OpenMP/target_device_codegen.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_avx.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_avx512f.cpp create mode 100644 libc/cmake/modules/cpu_features/check_cpu_features.cpp.in delete mode 100644 libc/cmake/modules/cpu_features/check_sse.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_sse2.cpp create mode 100644 libc/src/string/memcpy.cpp create mode 100644 libc/src/string/memcpy.h create mode 100644 libc/src/string/memcpy_arch_specific.h.def create mode 100644 libc/src/string/memory_utils/memcpy_utils.h create mode 100644 libc/src/string/x86/CMakeLists.txt create mode 100644 libc/src/string/x86/memcpy_arch_specific.h.inc create mode 100644 libc/test/src/string/memcpy_test.cpp create mode 100644 libc/test/src/string/memory_utils/memcpy_utils_test.cpp create mode 100644 llvm/test/Analysis/MemorySSA/scalable-vec.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir create mode 100644 llvm/test/CodeGen/AArch64/machine-outliner-iterative.mir create mode 100644 llvm/test/CodeGen/AMDGPU/indirect-call.ll create mode 100644 llvm/test/CodeGen/ARM/ipra-extra-spills-exceptions.ll create mode 100644 llvm/test/CodeGen/ARM/ipra-extra-spills.ll create mode 100644 llvm/test/CodeGen/Generic/csw-debug-assert.ll delete mode 100644 llvm/test/CodeGen/PowerPC/aix-byval-param.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation1.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation2.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation3.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll create mode 100644 llvm/test/CodeGen/PowerPC/ifcvt.mir create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmlad.ll create mode 100644 llvm/test/DebugInfo/AArch64/dbgcall-site-float-entry-value.ll create mode 100644 llvm/test/Transforms/InstCombine/vscale_alloca.ll create mode 100644 llvm/test/Transforms/Reassociate/cse-pairs.ll create mode 100644 llvm/test/Transforms/SCCP/binaryops-range-special-cases.ll create mode 100644 llvm/test/Transforms/SCCP/ip-ranges-binaryops.ll create mode 100644 llvm/test/Transforms/SCCP/ipsccp-range-crashes.ll create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/does-not-succeed-with [...] create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/lit.cfg create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/more-than-one-allow-r [...] create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/not-a-valid-integer.py create mode 100644 llvm/utils/lit/tests/Inputs/allow-retries/succeeds-within-limit.py create mode 100644 llvm/utils/lit/tests/Inputs/test_retry_attempts/lit.cfg create mode 100644 llvm/utils/lit/tests/Inputs/test_retry_attempts/test.py create mode 100644 llvm/utils/lit/tests/allow-retries.py create mode 100644 mlir/include/mlir/Conversion/StandardToStandard/StandardToStandard.h delete mode 100644 mlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.td create mode 100644 mlir/lib/Conversion/StandardToStandard/CMakeLists.txt create mode 100644 mlir/lib/Conversion/StandardToStandard/StandardToStandard.cpp create mode 100644 mlir/test/Conversion/StandardToSPIRV/std-types-to-spirv.mlir rename mlir/test/Dialect/SPIRV/Transforms/{abi-simple.mlir => abi-interface.mlir} (57%) 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