CoreSight April 2018

coresight@lists.linaro.org

11 participants
24 discussions

by Ajith Kurian Issac

Hi, We are trying to us the Open CSD for decoding a onchip trace in our ETB. The trace was enabled and is captured in the ETB. We read the trace back and dumped it into a text file. I am attaching it. How can I use the CSD tool to decode it? Thanks Ajith

6 years, 1 month

Debian packaging - patches

by Wookey

I've been packaging libopenCSD for debian. That has resulted in various changes, largely to the makefiles. Most of those changes should go upstream, rather than exist only in the debian version. I'll post my issues/changes here for discussion so we can decide what is upstreamable. In the meantime anyone interested can try the debian packages here: http://wookware.org/software/repo/ either manually from: http://wookware.org/software/repo/pool/main/libo/libopencsd/ or with deb [ trusted=yes ] http://wookware.org/software/repo unstable main apt update; apt install libopencsd0 (and/or libopencsd-dev libopencsd-doc libopencsd-dbgsym) (for debian unstable, amd64 only) (package is signed, but repo isn't. Sorry) Or get the source and rebuild for a different debian-based distro/release. I've not separated all my changes into proper standalone patches yet, but some are so let's start with those. 1) The doxygen doc build doesn't find all the components because they moved. This fixes that: Index: libopencsd-0.8.0/decoder/docs/doxygen_config.dox =================================================================== --- libopencsd-0.8.0.orig/decoder/docs/doxygen_config.dox +++ libopencsd-0.8.0/decoder/docs/doxygen_config.dox @@ -765,11 +765,11 @@ WARN_LOGFILE = INPUT = ../include \ ../include/interfaces \ - ../include/etmv3 \ - ../include/etmv4 \ - ../include/ptm \ - ../include/c_api \ - ../include/stm \ + ../include/opencsd/etmv3 \ + ../include/opencsd/etmv4 \ + ../include/opencsd/ptm \ + ../include/opencsd/c_api \ + ../include/opencsd/stm \ ../include/mem_acc \ ../../README.md \ . \ 2) The makefile provides no doc-build. The patch below adds that. I didn't include an install-docs target, although if you added one with a variable to set the target dir then I'd use it. Index: libopencsd-0.8.0/decoder/build/linux/makefile =================================================================== --- libopencsd-0.8.0.orig/decoder/build/linux/makefile +++ libopencsd-0.8.0/decoder/build/linux/makefile @@ -155,6 +155,13 @@ tests: libs cd $(OCSD_ROOT)/tests/build/linux/trc_pkt_lister && make cd $(OCSD_ROOT)/tests/build/linux/c_api_pkt_print_test && make +# +# build docs +.PHONY: docs +docs: + (cd $(OCSD_ROOT/docs); doxygen doxygen_config.dox) + + ############################################################# # clean targets # @@ -176,3 +183,4 @@ clean_install: rm -f $(INSTALL_LIB_DIR)/lib$(LIB_BASE_NAME).so rm -f $(INSTALL_LIB_DIR)/lib$(LIB_CAPI_NAME).so rm -rf $(INSTALL_INCLUDE_DIR)/$(LIB_UAPI_INC_DIR) + rm -rf $(OCSD_ROOT)/docs/html 3) The static libraries are built but not installed. Now static libraries aren't much use to anyone these days, but if you build them then you might as well install them. This patch does that: Index: libopencsd-0.8.0/decoder/build/linux/makefile =================================================================== --- libopencsd-0.8.0.orig/decoder/build/linux/makefile +++ libopencsd-0.8.0/decoder/build/linux/makefile @@ -136,6 +136,8 @@ mkdir -p $(INSTALL_LIB_DIR) $(INSTALL_INCLUDE_DIR) $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_BASE_NAME).so $(INSTALL_LIB_DIR)/ $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_CAPI_NAME).so $(INSTALL_LIB_DIR)/ + $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_BASE_NAME).a $(INSTALL_LIB_DIR)/ + $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_CAPI_NAME).a $(INSTALL_LIB_DIR)/ cd $(OCSD_ROOT)/build/linux/rctdl_c_api_lib && make install_inc ################################ @@ -192,6 +194,6 @@ cd $(OCSD_ROOT)/tests/build/linux/c_api_pkt_print_test && make clean clean_install: - rm -f $(INSTALL_LIB_DIR)/lib$(LIB_BASE_NAME).so - rm -f $(INSTALL_LIB_DIR)/lib$(LIB_CAPI_NAME).so + rm -f $(INSTALL_LIB_DIR)/lib$(LIB_BASE_NAME).{so,a} + rm -f $(INSTALL_LIB_DIR)/lib$(LIB_CAPI_NAME).{so,a} rm -rf $(INSTALL_INCLUDE_DIR)/$(LIB_UAPI_INC_DIR) 4) The makefile arbitrarily restricts the build to arm and x86 architectures. The only reason for this is in order to build into a particular named directory, and to set -m32/-m64 flags for x86 which should be defaulted correctly on any sensible toolchain or cross-toolchain anyway. This code can build, and be used, on any arch and the makefile should allow that, so this should be fixed. I don't see the need to build into a host-arch named PLAT_DIR directory. Is there one? It only does one build at a time, whether crossing or not, so I see no reason not to use a fixed name for this dir, such as 'builddir'. This has no effect on the ability to cross or not. If you really want to change the name of PLAT_DIR then find out the HOST triplet and use that. On debian this is dpkg-architecture -q DEB_HOST_GNU_TYPE, (which is also the same prefix as would be used to specify the toolchain prefix for crossing). But like I say, I think a fixed builddir is actually all you need unless I'm missing something. So this patch lets the build work on any arch: Index: libopencsd-0.8.0/decoder/build/linux/makefile =================================================================== --- libopencsd-0.8.0.orig/decoder/build/linux/makefile +++ libopencsd-0.8.0/decoder/build/linux/makefile @@ -92,27 +92,6 @@ BUILD_VARIANT=rel endif -# platform bit size variant -ifeq ($(ARCH),x86) - MFLAG:="-m32" - BIT_VARIANT=32 -else ifeq ($(ARCH),x86_64) - MFLAG:="-m64" - BIT_VARIANT=64 -else ifeq ($(ARCH),arm) - BIT_VARIANT=-arm -else ifeq ($(ARCH),arm64) - BIT_VARIANT=-arm64 -else ifeq ($(ARCH),aarch64) - BIT_VARIANT=-arm64 -else ifeq ($(ARCH),aarch32) - BIT_VARIANT=-arm -endif - -MASTER_CC_FLAGS += $(MFLAG) -MASTER_CPP_FLAGS += $(MFLAG) -MASTER_LINKER_FLAGS += $(MFLAG) - # export build flags export MASTER_CC_FLAGS export MASTER_CPP_FLAGS @@ -120,7 +99,7 @@ export MASTER_LINKER_FLAGS export MASTER_LIB_FLAGS # target directories -export PLAT_DIR=linux$(BIT_VARIANT)/$(BUILD_VARIANT) +export PLAT_DIR=builddir export LIB_TARGET_DIR=$(OCSD_LIB_ROOT)/$(PLAT_DIR) export LIB_TEST_TARGET_DIR=$(OCSD_TESTS)/lib/$(PLAT_DIR) export BIN_TEST_TARGET_DIR=$(OCSD_TESTS)/bin/$(PLAT_DIR) All these patches included as files too. Wookey -- Principal hats: Linaro, Debian, Wookware, ARM http://wookware.org/

6 years, 6 months

Re: Re: Re: OpenCSD on Juno

by marekzmyslowski

Hello Mathieu, Thank for the config file. It works. I was able to build the OpenCSD kernel (form the perf-opencsd-master branch) and install on the USB (I used the ArchLinuxARM-aarch64-latest.tar.gz). I also built the perf tool (make -C tools/perf). Everything is booting but the perf has some issues: [root@alarm home]# ./perf record -vvv -e cs_etm/(a)20070000.etr/u --per-thread uname map_groups__set_modules_path_dir: cannot open /lib/modules/4.13.0-rc1-ge565ad6 dir Problems setting modules path maps, continuing anyway... ------------------------------------------------------------ perf_event_attr: type 8 size 112 { sample_period, sample_freq } 1 sample_type IP|TID|IDENTIFIER read_format ID disabled 1 exclude_kernel 1 exclude_hv 1 enable_on_exec 1 sample_id_all 1 ------------------------------------------------------------ sys_perf_event_open: pid 2242 cpu -1 group_fd -1 flags 0x8 = 4 ------------------------------------------------------------ perf_event_attr: type 1 size 112 config 0x9 { sample_period, sample_freq } 1 sample_type IP|TID|IDENTIFIER read_format ID disabled 1 exclude_kernel 1 exclude_hv 1 mmap 1 comm 1 enable_on_exec 1 task 1 sample_id_all 1 mmap2 1 comm_exec 1 ------------------------------------------------------------ sys_perf_event_open: pid 2242 cpu -1 group_fd -1 flags 0x8 = 5 mmap size 528384B AUX area mmap length 4194304 perf event ring buffer mmapped per thread failed to mmap AUX area failed to mmap with 12 (Cannot allocate memory) I fixed the "map_groups__set_modules_path_dir: cannot open /lib/modules/4.13.0-rc1-ge565ad6 dir" issue by adding appropriate symbolic link but I still have an issue with the mmap. Any idea what can be wrong here (below limits that I have on my Juno)? [root@alarm ~]# ulimit -a core file size (blocks, -c) unlimited data seg size (kbytes, -d) unlimited scheduling priority (-e) 0 file size (blocks, -f) unlimited pending signals (-i) 31798 max locked memory (kbytes, -l) 64 max memory size (kbytes, -m) unlimited open files (-n) 1024 pipe size (512 bytes, -p) 8 POSIX message queues (bytes, -q) 819200 real-time priority (-r) 0 stack size (kbytes, -s) 8192 cpu time (seconds, -t) unlimited max user processes (-u) 31798 virtual memory (kbytes, -v) unlimited file locks (-x) unlimited [root@alarm ~]# Regards Marek W dniu 2017-08-18 16:54:42 użytkownik Mathieu Poirier <mathieu.poirier(a)linaro.org> napisał: > On 18 August 2017 at 04:22, marekzmyslowski > <marekzmyslowski(a)poczta.onet.pl> wrote: > > Hello Mathieu, > > > > I've decided that currently I don't need Android. The Linux is enough. > > That is probably a better place to start. > > > However I have another issue. I've downloaded the perf-opencsd-master branch. I run the config with the ARCH=arm64 and CROSS_COMPLIE=aarch64-linux-gnu- and added support for Versatile board. Then I compiled kernel - everything was OK. Next I built the USB using the following instruction: > > https://archlinuxarm.org/platforms/armv8/arm/juno (it works fine. The linux boot on the Juno). > > Next I copied the Image file and juno.dtb into the USB but it doesn't boot. It hangs here: > > > > initrd: address 0x0 > > initrd: length 0x0 > > PEI 1132 ms > > DXE 1695 ms > > BDS 368934875444 ms > > BDS 368934873448 ms > > BDS 1535 ms > > Total Time = 368934871781 ms > > > > linux: address 0x80080000 > > linux: length 0x1150200 > > fdt: address 0x9FE00000 > > fdt: length 0x5F54 > > > > Any idea what I'm doing wrong? Any help will be appreciated (I'm so close to have Juno + CoreSight + perf :) ) > > I can't help you with booting the board itself. The best I can do is > advise to use u-boot instead of UEFI and give you my kernel .config > file (attached). For the rest there is plenty of documentation out > there. > > > > > Regards > > Marek > > > > W dniu 2017-08-16 23:08:04 użytkownik Mathieu Poirier <mathieu.poirier(a)linaro.org> napisał: > >> Hello Marek, > >> > >> Please CC the CoreSight mailing list when asking questions as someone > >> else may also be able to answer. > >> > >> First and foremost I advise using the official CoreSight kernel found > >> on the openCSD site [1] rather than my personal branch [2] - you > >> never know what you'll get with the latter. > >> > >> That being said the CoreSight kernel on the openCSD site is not an > >> Android kernel - it is simply a mainline kernel supplemented with > >> patches that haven't made their way to mainline yet. You will have to > >> either add the android patches to the CoreSight kernel or the other > >> way around (CoreSight patches on android kernel). > >> > >> Android user space is also different and does not include the > >> perf-tools. You will have to add them manually along with the > >> dependencies they require. I haven't gone through that process and as > >> such can't advise more on that portion. > >> > >> Get back to me with your questions if the above isn't sufficient. > >> > >> Best regards, > >> Mathieu > >> > >> [1]. https://github.com/Linaro/OpenCSD/tree/perf-opencsd-master > >> [2]. https://git.linaro.org/people/mathieu.poirier/coresight.git/ > >> > >> On 16 August 2017 at 14:32, marekzmyslowski > >> <marekzmyslowski(a)poczta.onet.pl> wrote: > >> > Hello Mathieu, > >> > > >> > I'm sorry for bothering but I think you may be person that can help me. I'm trying to install and run Android on Juno Board r0. I tested Android 17.05 from Linaro and it works. Now I'm trying to have a perf using Coresight but I'm little confused. Do I need to build Android from Linaro and the kernel from here https://git.linaro.org/people/mathieu.poirier/coresight.git/ or here https://github.com/Linaro/OpenCSD/tree/perf-opencsd-4.12. > >> > Any help with this will be appreciated :) > >> > > >> > Regards > >> > Marek Zmysłowski > >> > > > > > > >

6 years, 7 months

Re: Upstream support for ETM strobing

by Mathieu Poirier

On 27 April 2018 at 12:24, Robert Walker <Robert.Walker(a)arm.com> wrote: > Hi, > > > > Strobing the ETM to reduce the amount of trace data when collecting profiles > for AutoFDO seems to be working and providing useful optimizations. We’re > currently working with some proof of concept patches (attached for > reference) that add parameters to sysfs to configure the strobe period – > before running perf record, the user must write to these parameters for each > ETM. This isn’t suitable for production use as it has to be done for each > ETM and the values persist after the trace session. To get this into > upstream, we need to have this done by the perf record tool. > > > > I understand there is work planned to enable more complex ETM configurations > (such as strobing) from perf, possibly using a file to load register values > from. Is this still the case, and if so, when is it likely to be done? Hi Robert, I am currently working on supporting CPU-wide trace scenarios where I can start seeing the end of the tunnel. After that my plan was to add support for ETMv3.x/PTM trace decoding followed by support for N:N source/sink topology. Part of the latter is to introduce a way to enable more complex ETM configuration using a configuration file. In fact I already stumbled on how I want to do that and have a (very) small prototype that works. So that is what I had in mind... But it doesn't mean I can't be talked into changing my priorities. In fact I will gladly do so if we, as a group, decide it is more important to introduce support for complex configuration before ETMv3.x/PTM decoding. I personally don't have a preference, it is simply a matter of deciding what we want to do. I have CC'ed the coresight mailing list in order to reach a broader audience. Please speak up if you really have an issue (along with the rational) with supporting ETM complex configurations before ETMv3.x/PTM decoding. Best regards, Mathieu > > > > Thanks > > > > Rob > > IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you.

6 years, 7 months

RE: IBM lotus-accounts

by Chris Samuel

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6 years, 7 months

RE: California Dental Association - Spring - CDA 2018 Attendees list

by Rick Forster

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6 years, 7 months

California Dental Association - Spring - CDA 2018 Attendees list

by Rick Forster

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6 years, 8 months

[PATCH v2 3/4] coresight: allow to build as modules

by Kim Phillips

Allow to build coresight as modules. This greatly enhances developer efficiency by allowing the development to take place exclusively on the target, and without needing to reboot in between changes. - Kconfig bools become tristates, to allow =m - MODULE_* macros added: Please correct me if I'm wrong: - assume LICENSE is "GPL v2" - tried to get as close to original authors for MODULE_AUTHOR - The 'select' Kconfig statements are replaced with 'depends on' clauses, to specify the dependencies between the modules including other fixes, e.g., coresight-stm unconditionally calls stm_register_device, it therefore depends on STM. - use -objs to denote merge object directives in Makefile, adds a coresight-core nomenclature for the base module. - add a coresight_exit() that unregisters the coresight bus, add remove fns for most others. - fix up modules with ID tables for autoloading on boot, add missing __init and __exit attributes - move coresight_vpid_to_pid to an externed, single instance in coresight-core, to be used by all submodules. Signed-off-by: Kim Phillips <kim.phillips(a)arm.com> --- Change(s) from first PATCH series: - added user Kconfig help text with the names of the modules. - Addressed Mathieu's comments: - renamed coresight-link-sink-tmc coresight-tmc-core - prevent ability to crash the system by removing drivers from an active path by adding try_module_get() and module_put() calls in funnel and replicator drivers' enable and disable functions (thanks for figuring that out, Mathieu). Change(s) from RFC: Addressed most of Mathieu's comments: - rm __inits causing linker section mismatch errors - barrier_pkt made static, moved to coresight_priv.h - rm unnecessary tmc_* EXPORT_SYMBOL leftovers - add some missing MODULE_AUTHORs drivers/hwtracing/coresight/Kconfig | 63 +++++++++++++------ drivers/hwtracing/coresight/Makefile | 28 ++++++--- .../hwtracing/coresight/coresight-cpu-debug.c | 2 + .../coresight/coresight-dynamic-replicator.c | 18 +++++- drivers/hwtracing/coresight/coresight-etb10.c | 19 +++++- .../hwtracing/coresight/coresight-etm-cp14.c | 4 ++ .../hwtracing/coresight/coresight-etm-perf.c | 13 +++- .../hwtracing/coresight/coresight-etm-perf.h | 2 +- .../coresight/coresight-etm3x-sysfs.c | 6 ++ drivers/hwtracing/coresight/coresight-etm3x.c | 19 +++++- .../coresight/coresight-etm4x-sysfs.c | 6 ++ drivers/hwtracing/coresight/coresight-etm4x.c | 20 +++++- .../hwtracing/coresight/coresight-funnel.c | 24 ++++++- drivers/hwtracing/coresight/coresight-priv.h | 10 ++- .../coresight/coresight-replicator.c | 25 +++++++- drivers/hwtracing/coresight/coresight-stm.c | 20 +++++- .../hwtracing/coresight/coresight-tmc-etf.c | 2 + .../hwtracing/coresight/coresight-tmc-etr.c | 2 + drivers/hwtracing/coresight/coresight-tmc.c | 19 +++++- drivers/hwtracing/coresight/coresight-tpiu.c | 19 +++++- drivers/hwtracing/coresight/coresight.c | 49 ++++++++++++--- include/linux/coresight.h | 23 +------ 22 files changed, 324 insertions(+), 69 deletions(-) diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index ef9cb3c164e1..09a682013ea2 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -2,8 +2,8 @@ # Coresight configuration # menuconfig CORESIGHT - bool "CoreSight Tracing Support" - select ARM_AMBA + tristate "CoreSight Tracing Support" + depends on ARM_AMBA select PERF_EVENTS help This framework provides a kernel interface for the CoreSight debug @@ -12,17 +12,24 @@ menuconfig CORESIGHT specification and configure the right series of components when a trace source gets enabled. + To compile this code as a module, choose M here: the + module will be called coresight-core. + if CORESIGHT config CORESIGHT_LINKS_AND_SINKS - bool "CoreSight Link and Sink drivers" + tristate "CoreSight Link and Sink drivers" + depends on CORESIGHT help This enables support for CoreSight link and sink drivers that are responsible for transporting and collecting the trace data respectively. Link and sinks are dynamically aggregated with a trace entity at run time to form a complete trace path. + To compile this code as modules, choose M here: the + modules will be called coresight-funnel and coresight-replicator. + config CORESIGHT_LINK_AND_SINK_TMC - bool "Coresight generic TMC driver" + tristate "Coresight generic TMC driver" depends on CORESIGHT_LINKS_AND_SINKS help This enables support for the Trace Memory Controller driver. @@ -31,8 +38,11 @@ config CORESIGHT_LINK_AND_SINK_TMC complies with the generic implementation of the component without special enhancement or added features. + To compile this code as a module, choose M here: the + module will be called coresight-tmc-core. + config CORESIGHT_SINK_TPIU - bool "Coresight generic TPIU driver" + tristate "Coresight generic TPIU driver" depends on CORESIGHT_LINKS_AND_SINKS help This enables support for the Trace Port Interface Unit driver, @@ -42,57 +52,71 @@ config CORESIGHT_SINK_TPIU connected to an external host for use case capturing more traces than the on-board coresight memory can handle. + To compile this code as a module, choose M here: the + module will be called coresight-tpiu. + config CORESIGHT_SINK_ETBV10 - bool "Coresight ETBv1.0 driver" + tristate "Coresight ETBv1.0 driver" depends on CORESIGHT_LINKS_AND_SINKS help This enables support for the Embedded Trace Buffer version 1.0 driver that complies with the generic implementation of the component without special enhancement or added features. + To compile this code as a module, choose M here: the + module will be called coresight-etb10. + config CORESIGHT_SOURCE_ETM3X - bool "CoreSight Embedded Trace Macrocell 3.x driver" - depends on !ARM64 - select CORESIGHT_LINKS_AND_SINKS + tristate "CoreSight Embedded Trace Macrocell 3.x driver" + depends on !ARM64 && CORESIGHT_LINKS_AND_SINKS help This driver provides support for processor ETM3.x and PTM1.x modules, which allows tracing the instructions that a processor is executing This is primarily useful for instruction level tracing. Depending the ETM version data tracing may also be available. + To compile this code as a module, choose M here: the + module will be called coresight-etm3x-core. + config CORESIGHT_SOURCE_ETM4X - bool "CoreSight Embedded Trace Macrocell 4.x driver" - depends on ARM64 - select CORESIGHT_LINKS_AND_SINKS + tristate "CoreSight Embedded Trace Macrocell 4.x driver" + depends on ARM64 && CORESIGHT_LINKS_AND_SINKS help This driver provides support for the ETM4.x tracer module, tracing the instructions that a processor is executing. This is primarily useful for instruction level tracing. Depending on the implemented version data tracing may also be available. + To compile this code as a module, choose M here: the + module will be called coresight-etm4x-core. + config CORESIGHT_DYNAMIC_REPLICATOR - bool "CoreSight Programmable Replicator driver" + tristate "CoreSight Programmable Replicator driver" depends on CORESIGHT_LINKS_AND_SINKS help This enables support for dynamic CoreSight replicator link driver. The programmable ATB replicator allows independent filtering of the trace data based on the traceid. + To compile this code as a module, choose M here: the + module will be called coresight-dynamic-replicator. + config CORESIGHT_STM - bool "CoreSight System Trace Macrocell driver" + tristate "CoreSight System Trace Macrocell driver" depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64 - select CORESIGHT_LINKS_AND_SINKS - select STM + depends on STM && CORESIGHT_LINKS_AND_SINKS help This driver provides support for hardware assisted software instrumentation based tracing. This is primarily used for logging useful software events or data coming from various entities in the system, possibly running different OSs + To compile this code as a module, choose M here: the + module will be called coresight-stm. + config CORESIGHT_CPU_DEBUG tristate "CoreSight CPU Debug driver" - depends on ARM || ARM64 - depends on DEBUG_FS + depends on CORESIGHT && DEBUG_FS help This driver provides support for coresight debugging module. This is primarily used to dump sample-based profiling registers when @@ -103,4 +127,7 @@ config CORESIGHT_CPU_DEBUG properly, please refer Documentation/trace/coresight-cpu-debug.txt for detailed description and the example for usage. + To compile this code as a module, choose M here: the + module will be called coresight-cpu-debug. + endif diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile index 61db9dd0d571..5990710289c2 100644 --- a/drivers/hwtracing/coresight/Makefile +++ b/drivers/hwtracing/coresight/Makefile @@ -2,19 +2,29 @@ # # Makefile for CoreSight drivers. # -obj-$(CONFIG_CORESIGHT) += coresight.o coresight-etm-perf.o -obj-$(CONFIG_OF) += of_coresight.o -obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o \ - coresight-tmc-etf.o \ - coresight-tmc-etr.o +obj-$(CONFIG_CORESIGHT) += coresight-core.o +coresight-core-objs := coresight.o \ + of_coresight.o + +obj-$(CONFIG_CORESIGHT) += coresight-etm-perf.o + +obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc-core.o +coresight-tmc-core-objs := coresight-tmc.o \ + coresight-tmc-etf.o \ + coresight-tmc-etr.o obj-$(CONFIG_CORESIGHT_SINK_TPIU) += coresight-tpiu.o obj-$(CONFIG_CORESIGHT_SINK_ETBV10) += coresight-etb10.o obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \ coresight-replicator.o -obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o \ - coresight-etm3x-sysfs.o -obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o \ - coresight-etm4x-sysfs.o + +obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x-core.o +coresight-etm3x-core-objs := coresight-etm3x.o \ + coresight-etm-cp14.o \ + coresight-etm3x-sysfs.o + +obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x-core.o +coresight-etm4x-core-objs := coresight-etm4x.o coresight-etm4x-sysfs.o + obj-$(CONFIG_CORESIGHT_DYNAMIC_REPLICATOR) += coresight-dynamic-replicator.o obj-$(CONFIG_CORESIGHT_STM) += coresight-stm.o obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hwtracing/coresight/coresight-cpu-debug.c index 9cdb3fbc8c1f..ff6d3be1b13c 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -683,6 +683,8 @@ static const struct amba_id debug_ids[] = { { 0, 0 }, }; +MODULE_DEVICE_TABLE(amba, debug_ids); + static struct amba_driver debug_driver = { .drv = { .name = "coresight-cpu-debug", diff --git a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c index 043da86b0fe9..a7f486a577b0 100644 --- a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c +++ b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c @@ -167,6 +167,15 @@ static int replicator_probe(struct amba_device *adev, const struct amba_id *id) return PTR_ERR_OR_ZERO(drvdata->csdev); } +static int __exit replicator_remove(struct amba_device *adev) +{ + struct replicator_state *drvdata = dev_get_drvdata(&adev->dev); + + coresight_unregister(drvdata->csdev); + + return 0; +} + #ifdef CONFIG_PM static int replicator_runtime_suspend(struct device *dev) { @@ -208,6 +217,8 @@ static const struct amba_id replicator_ids[] = { { 0, 0 }, }; +MODULE_DEVICE_TABLE(amba, replicator_ids); + static struct amba_driver replicator_driver = { .drv = { .name = "coresight-dynamic-replicator", @@ -215,6 +226,11 @@ static struct amba_driver replicator_driver = { .suppress_bind_attrs = true, }, .probe = replicator_probe, + .remove = replicator_remove, .id_table = replicator_ids, }; -builtin_amba_driver(replicator_driver); +module_amba_driver(replicator_driver); + +MODULE_AUTHOR("Suzuki K Poulose <suzuki.poulose(a)arm.com>"); +MODULE_DESCRIPTION("ARM Coresight Dynamic Replicator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 580cd381adf3..f5464556b8e7 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -719,6 +719,15 @@ static int etb_probe(struct amba_device *adev, const struct amba_id *id) return ret; } +static int __exit etb_remove(struct amba_device *adev) +{ + struct etb_drvdata *drvdata = dev_get_drvdata(&adev->dev); + + coresight_unregister(drvdata->csdev); + + return 0; +} + #ifdef CONFIG_PM static int etb_runtime_suspend(struct device *dev) { @@ -753,6 +762,8 @@ static const struct amba_id etb_ids[] = { { 0, 0}, }; +MODULE_DEVICE_TABLE(amba, etb_ids); + static struct amba_driver etb_driver = { .drv = { .name = "coresight-etb10", @@ -762,6 +773,12 @@ static struct amba_driver etb_driver = { }, .probe = etb_probe, + .remove = etb_remove, .id_table = etb_ids, }; -builtin_amba_driver(etb_driver); +module_amba_driver(etb_driver); + +MODULE_AUTHOR("Pratik Patel <pratikp(a)codeaurora.org>"); +MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier(a)linaro.org>"); +MODULE_DESCRIPTION("Arm CoreSight Embedded Trace Buffer driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-etm-cp14.c b/drivers/hwtracing/coresight/coresight-etm-cp14.c index 12a220682117..1e16a6358364 100644 --- a/drivers/hwtracing/coresight/coresight-etm-cp14.c +++ b/drivers/hwtracing/coresight/coresight-etm-cp14.c @@ -589,3 +589,7 @@ int etm_writel_cp14(u32 reg, u32 val) return 0; } + +MODULE_AUTHOR("Pratik Patel <pratikp(a)codeaurora.org>"); +MODULE_DESCRIPTION("Arm CoreSight ETM CP14 driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 4e5ed6597f2f..152f2ae49665 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -477,6 +477,7 @@ int etm_perf_symlink(struct coresight_device *csdev, bool link) return 0; } +EXPORT_SYMBOL_GPL(etm_perf_symlink); static int __init etm_perf_init(void) { @@ -504,4 +505,14 @@ static int __init etm_perf_init(void) return ret; } -device_initcall(etm_perf_init); +module_init(etm_perf_init); + +static void __exit etm_perf_exit(void) +{ + perf_pmu_unregister(&etm_pmu); +} +module_exit(etm_perf_exit); + +MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier(a)linaro.org>"); +MODULE_DESCRIPTION("Arm CoreSight tracer perf driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h index 3ffc9feb2d64..8c49c7b82d84 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.h +++ b/drivers/hwtracing/coresight/coresight-etm-perf.h @@ -54,7 +54,7 @@ struct etm_filters { }; -#ifdef CONFIG_CORESIGHT +#if IS_ENABLED(CONFIG_CORESIGHT) int etm_perf_symlink(struct coresight_device *csdev, bool link); #else diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c index 6e547ec6fead..65cfec6e1749 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c @@ -17,6 +17,7 @@ #include <linux/pm_runtime.h> #include <linux/sysfs.h> +#include <linux/coresight.h> #include "coresight-etm.h" #include "coresight-priv.h" @@ -1274,3 +1275,8 @@ const struct attribute_group *coresight_etm_groups[] = { &coresight_etm_mgmt_group, NULL, }; + +MODULE_AUTHOR("Pratik Patel <pratikp(a)codeaurora.org>"); +MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier(a)linaro.org>"); +MODULE_DESCRIPTION("Arm CoreSight Program Flow Trace sysfs driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index 39f42fdd503d..b1e3fd7ed059 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -873,6 +873,15 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id) return ret; } +static int __exit etm_remove(struct amba_device *adev) +{ + struct etm_drvdata *drvdata = dev_get_drvdata(&adev->dev); + + coresight_unregister(drvdata->csdev); + + return 0; +} + #ifdef CONFIG_PM static int etm_runtime_suspend(struct device *dev) { @@ -933,6 +942,8 @@ static const struct amba_id etm_ids[] = { { 0, 0}, }; +MODULE_DEVICE_TABLE(amba, etm_ids); + static struct amba_driver etm_driver = { .drv = { .name = "coresight-etm3x", @@ -941,6 +952,12 @@ static struct amba_driver etm_driver = { .suppress_bind_attrs = true, }, .probe = etm_probe, + .remove = etm_remove, .id_table = etm_ids, }; -builtin_amba_driver(etm_driver); +module_amba_driver(etm_driver); + +MODULE_AUTHOR("Pratik Patel <pratikp(a)codeaurora.org>"); +MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier(a)linaro.org>"); +MODULE_DESCRIPTION("Arm CoreSight Program Flow Trace driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index d21961710713..04119b963454 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -17,6 +17,7 @@ #include <linux/pm_runtime.h> #include <linux/sysfs.h> +#include <linux/coresight.h> #include "coresight-etm4x.h" #include "coresight-priv.h" @@ -2155,3 +2156,8 @@ const struct attribute_group *coresight_etmv4_groups[] = { &coresight_etmv4_trcidr_group, NULL, }; +EXPORT_SYMBOL_GPL(coresight_etmv4_groups); + +MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier(a)linaro.org>"); +MODULE_DESCRIPTION("Arm CoreSight Program Flow Trace v4 sysfs driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index cf364a514c12..89b6afe46b79 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -1052,6 +1052,15 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id) return ret; } +static int __exit etm4_remove(struct amba_device *adev) +{ + struct etmv4_drvdata *drvdata = dev_get_drvdata(&adev->dev); + + coresight_unregister(drvdata->csdev); + + return 0; +} + static const struct amba_id etm4_ids[] = { { /* ETM 4.0 - Cortex-A53 */ .id = 0x000bb95d, @@ -1071,12 +1080,21 @@ static const struct amba_id etm4_ids[] = { { 0, 0}, }; +MODULE_DEVICE_TABLE(amba, etm4_ids); + static struct amba_driver etm4x_driver = { .drv = { .name = "coresight-etm4x", + .owner = THIS_MODULE, .suppress_bind_attrs = true, }, .probe = etm4_probe, + .remove = etm4_remove, .id_table = etm4_ids, }; -builtin_amba_driver(etm4x_driver); +module_amba_driver(etm4x_driver); + +MODULE_AUTHOR("Pratik Patel <pratikp(a)codeaurora.org>"); +MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier(a)linaro.org>"); +MODULE_DESCRIPTION("Arm CoreSight Program Flow Trace v4 driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c index 9f8ac0bef853..23713c694213 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -69,6 +69,10 @@ static int funnel_enable(struct coresight_device *csdev, int inport, int outport) { struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct module *module = csdev->dev.parent->driver->owner; + + if (!try_module_get(module)) + return -ENODEV; funnel_enable_hw(drvdata, inport); @@ -93,9 +97,11 @@ static void funnel_disable(struct coresight_device *csdev, int inport, int outport) { struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct module *module = csdev->dev.parent->driver->owner; funnel_disable_hw(drvdata, inport); + module_put(module); dev_info(drvdata->dev, "FUNNEL inport %d disabled\n", inport); } @@ -218,6 +224,15 @@ static int funnel_probe(struct amba_device *adev, const struct amba_id *id) return PTR_ERR_OR_ZERO(drvdata->csdev); } +static int __exit funnel_remove(struct amba_device *adev) +{ + struct funnel_drvdata *drvdata = dev_get_drvdata(&adev->dev); + + coresight_unregister(drvdata->csdev); + + return 0; +} + #ifdef CONFIG_PM static int funnel_runtime_suspend(struct device *dev) { @@ -257,6 +272,8 @@ static const struct amba_id funnel_ids[] = { { 0, 0}, }; +MODULE_DEVICE_TABLE(amba, funnel_ids); + static struct amba_driver funnel_driver = { .drv = { .name = "coresight-funnel", @@ -265,6 +282,11 @@ static struct amba_driver funnel_driver = { .suppress_bind_attrs = true, }, .probe = funnel_probe, + .remove = funnel_remove, .id_table = funnel_ids, }; -builtin_amba_driver(funnel_driver); +module_amba_driver(funnel_driver); + +MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier(a)linaro.org>"); +MODULE_DESCRIPTION("ARM Coresight Funnel Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index f1d0e21d8cab..335bca44b42d 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -64,7 +64,13 @@ static DEVICE_ATTR_RO(name) #define coresight_simple_reg64(type, name, lo_off, hi_off) \ __coresight_simple_func(type, NULL, name, lo_off, hi_off) -extern const u32 barrier_pkt[5]; +/* + * When losing synchronisation a new barrier packet needs to be inserted at the + * beginning of the data collected in a buffer. That way the decoder knows that + * it needs to look for another sync sequence. + */ +static const u32 barrier_pkt[5] = {0x7fffffff, 0x7fffffff, + 0x7fffffff, 0x7fffffff, 0x0}; enum etm_addr_type { ETM_ADDR_TYPE_NONE, @@ -143,7 +149,7 @@ struct list_head *coresight_build_path(struct coresight_device *csdev, struct coresight_device *sink); void coresight_release_path(struct list_head *path); -#ifdef CONFIG_CORESIGHT_SOURCE_ETM3X +#if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM3X) extern int etm_readl_cp14(u32 off, unsigned int *val); extern int etm_writel_cp14(u32 off, u32 val); #else diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c index 3756e71cb8f5..21278585b80f 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -41,6 +41,10 @@ static int replicator_enable(struct coresight_device *csdev, int inport, int outport) { struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct module *module = csdev->dev.parent->driver->owner; + + if (!try_module_get(module)) + return -ENODEV; dev_info(drvdata->dev, "REPLICATOR enabled\n"); return 0; @@ -50,7 +54,9 @@ static void replicator_disable(struct coresight_device *csdev, int inport, int outport) { struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct module *module = csdev->dev.parent->driver->owner; + module_put(module); dev_info(drvdata->dev, "REPLICATOR disabled\n"); } @@ -119,6 +125,15 @@ static int replicator_probe(struct platform_device *pdev) return ret; } +static int __exit replicator_remove(struct platform_device *pdev) +{ + struct replicator_drvdata *drvdata = dev_get_drvdata(&pdev->dev); + + coresight_unregister(drvdata->csdev); + + return 0; +} + #ifdef CONFIG_PM static int replicator_runtime_suspend(struct device *dev) { @@ -151,8 +166,11 @@ static const struct of_device_id replicator_match[] = { {} }; +MODULE_DEVICE_TABLE(of, replicator_match); + static struct platform_driver replicator_driver = { .probe = replicator_probe, + .remove = replicator_remove, .driver = { .name = "coresight-replicator", .of_match_table = replicator_match, @@ -160,4 +178,9 @@ static struct platform_driver replicator_driver = { .suppress_bind_attrs = true, }, }; -builtin_platform_driver(replicator_driver); +module_platform_driver(replicator_driver); + +MODULE_AUTHOR("Pratik Patel <pratikp(a)codeaurora.org>"); +MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier(a)linaro.org>"); +MODULE_DESCRIPTION("ARM Coresight Replicator Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c index 15e7ef3891f5..4a4a4e809cef 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -889,6 +889,17 @@ static int stm_probe(struct amba_device *adev, const struct amba_id *id) return ret; } +static int __exit stm_remove(struct amba_device *adev) +{ + struct stm_drvdata *drvdata = dev_get_drvdata(&adev->dev); + + coresight_unregister(drvdata->csdev); + + stm_unregister_device(&drvdata->stm); + + return 0; +} + #ifdef CONFIG_PM static int stm_runtime_suspend(struct device *dev) { @@ -929,6 +940,8 @@ static const struct amba_id stm_ids[] = { { 0, 0}, }; +MODULE_DEVICE_TABLE(amba, stm_ids); + static struct amba_driver stm_driver = { .drv = { .name = "coresight-stm", @@ -937,7 +950,12 @@ static struct amba_driver stm_driver = { .suppress_bind_attrs = true, }, .probe = stm_probe, + .remove = stm_remove, .id_table = stm_ids, }; -builtin_amba_driver(stm_driver); +module_amba_driver(stm_driver); + +MODULE_AUTHOR("Pratik Patel <pratikp(a)codeaurora.org>"); +MODULE_DESCRIPTION("Arm CoreSight System Trace Macrocell driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index e2513b786242..971f04d1a5b4 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -628,3 +628,5 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata) return 0; } + +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 68fbc8f7450e..77793bfce412 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -342,3 +342,5 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata) return 0; } + +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index 0ea04f588de0..553885db2daa 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -437,6 +437,16 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id) return ret; } +static int __exit tmc_remove(struct amba_device *adev) +{ + struct tmc_drvdata *drvdata = dev_get_drvdata(&adev->dev); + + misc_deregister(&drvdata->miscdev); + coresight_unregister(drvdata->csdev); + + return 0; +} + static const struct amba_id tmc_ids[] = { { .id = 0x000bb961, @@ -461,6 +471,8 @@ static const struct amba_id tmc_ids[] = { { 0, 0}, }; +MODULE_DEVICE_TABLE(amba, tmc_ids); + static struct amba_driver tmc_driver = { .drv = { .name = "coresight-tmc", @@ -468,6 +480,11 @@ static struct amba_driver tmc_driver = { .suppress_bind_attrs = true, }, .probe = tmc_probe, + .remove = tmc_remove, .id_table = tmc_ids, }; -builtin_amba_driver(tmc_driver); +module_amba_driver(tmc_driver); + +MODULE_AUTHOR("Pratik Patel <pratikp(a)codeaurora.org>"); +MODULE_DESCRIPTION("Arm CoreSight Trace Memory Controller driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index 805f7c2210fe..6eff26f769a8 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -171,6 +171,15 @@ static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) return PTR_ERR_OR_ZERO(drvdata->csdev); } +static int __exit tpiu_remove(struct amba_device *adev) +{ + struct tpiu_drvdata *drvdata = dev_get_drvdata(&adev->dev); + + coresight_unregister(drvdata->csdev); + + return 0; +} + #ifdef CONFIG_PM static int tpiu_runtime_suspend(struct device *dev) { @@ -214,6 +223,8 @@ static const struct amba_id tpiu_ids[] = { { 0, 0}, }; +MODULE_DEVICE_TABLE(amba, tpiu_ids); + static struct amba_driver tpiu_driver = { .drv = { .name = "coresight-tpiu", @@ -222,6 +233,12 @@ static struct amba_driver tpiu_driver = { .suppress_bind_attrs = true, }, .probe = tpiu_probe, + .remove = tpiu_remove, .id_table = tpiu_ids, }; -builtin_amba_driver(tpiu_driver); +module_amba_driver(tpiu_driver); + +MODULE_AUTHOR("Pratik Patel <pratikp(a)codeaurora.org>"); +MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier(a)linaro.org>"); +MODULE_DESCRIPTION("Arm CoreSight TPIU (Trace Port Interface Unit) driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index 389c4baeca9d..5da8c3daba95 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -24,9 +24,32 @@ #include <linux/of_platform.h> #include <linux/delay.h> #include <linux/pm_runtime.h> +#include <linux/sched.h> #include "coresight-priv.h" +#ifdef CONFIG_PID_NS +unsigned long coresight_vpid_to_pid(unsigned long vpid) +{ + struct task_struct *task = NULL; + unsigned long pid = 0; + + rcu_read_lock(); + task = find_task_by_vpid(vpid); + if (task) + pid = task_pid_nr(task); + rcu_read_unlock(); + + return pid; +} +#else +unsigned long coresight_vpid_to_pid(unsigned long vpid) +{ + return vpid; +} +#endif +EXPORT_SYMBOL_GPL(coresight_vpid_to_pid); + static DEFINE_MUTEX(coresight_mutex); /** @@ -53,14 +76,6 @@ static DEFINE_PER_CPU(struct list_head *, tracer_path); */ static struct list_head *stm_path; -/* - * When losing synchronisation a new barrier packet needs to be inserted at the - * beginning of the data collected in a buffer. That way the decoder knows that - * it needs to look for another sync sequence. - */ -const u32 barrier_pkt[5] = {0x7fffffff, 0x7fffffff, - 0x7fffffff, 0x7fffffff, 0x0}; - static int coresight_id_match(struct device *dev, void *data) { int trace_id, i_trace_id; @@ -317,6 +332,7 @@ void coresight_disable_path(struct list_head *path) } } } +EXPORT_SYMBOL_GPL(coresight_disable_path); int coresight_enable_path(struct list_head *path, u32 mode) { @@ -368,6 +384,7 @@ int coresight_enable_path(struct list_head *path, u32 mode) coresight_disable_path(path); goto out; } +EXPORT_SYMBOL_GPL(coresight_enable_path); struct coresight_device *coresight_get_sink(struct list_head *path) { @@ -383,6 +400,7 @@ struct coresight_device *coresight_get_sink(struct list_head *path) return csdev; } +EXPORT_SYMBOL_GPL(coresight_get_sink); static int coresight_enabled_sink(struct device *dev, void *data) { @@ -407,6 +425,7 @@ static int coresight_enabled_sink(struct device *dev, void *data) return 0; } +EXPORT_SYMBOL_GPL(coresight_enabled_sink); /** * coresight_get_enabled_sink - returns the first enabled sink found on the bus @@ -429,6 +448,7 @@ struct coresight_device *coresight_get_enabled_sink(bool deactivate) return dev ? to_coresight_device(dev) : NULL; } +EXPORT_SYMBOL_GPL(coresight_get_enabled_sink); /** * _coresight_build_path - recursively build a path from a @csdev to a sink. @@ -508,6 +528,7 @@ struct list_head *coresight_build_path(struct coresight_device *source, return path; } +EXPORT_SYMBOL_GPL(coresight_build_path); /** * coresight_release_path - release a previously built path. @@ -532,6 +553,7 @@ void coresight_release_path(struct list_head *path) kfree(path); path = NULL; } +EXPORT_SYMBOL_GPL(coresight_release_path); /** coresight_validate_source - make sure a source has the right credentials * @csdev: the device structure for a source. @@ -948,6 +970,7 @@ int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) return -EAGAIN; } +EXPORT_SYMBOL_GPL(coresight_timeout); struct bus_type coresight_bustype = { .name = "coresight", @@ -959,6 +982,12 @@ static int __init coresight_init(void) } postcore_initcall(coresight_init); +static void __exit coresight_exit(void) +{ + bus_unregister(&coresight_bustype); +} +module_exit(coresight_exit); + struct coresight_device *coresight_register(struct coresight_desc *desc) { int i; @@ -1056,3 +1085,7 @@ void coresight_unregister(struct coresight_device *csdev) device_unregister(&csdev->dev); } EXPORT_SYMBOL_GPL(coresight_unregister); + +MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier(a)linaro.org>"); +MODULE_DESCRIPTION("ARM Coresight Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/coresight.h b/include/linux/coresight.h index d950dad5056a..5863eb1a7335 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -243,7 +243,7 @@ struct coresight_ops { const struct coresight_ops_source *source_ops; }; -#ifdef CONFIG_CORESIGHT +#if IS_ENABLED(CONFIG_CORESIGHT) extern struct coresight_device * coresight_register(struct coresight_desc *desc); extern void coresight_unregister(struct coresight_device *csdev); @@ -274,24 +274,5 @@ static inline struct coresight_platform_data *of_get_coresight_platform_data( struct device *dev, const struct device_node *node) { return NULL; } #endif -#ifdef CONFIG_PID_NS -static inline unsigned long -coresight_vpid_to_pid(unsigned long vpid) -{ - struct task_struct *task = NULL; - unsigned long pid = 0; - - rcu_read_lock(); - task = find_task_by_vpid(vpid); - if (task) - pid = task_pid_nr(task); - rcu_read_unlock(); - - return pid; -} -#else -static inline unsigned long -coresight_vpid_to_pid(unsigned long vpid) { return vpid; } -#endif - +extern unsigned long coresight_vpid_to_pid(unsigned long vpid); #endif -- 2.17.0

6 years, 8 months

Tracing issues

by Muhammad Abdul WAHAB

Hi all, I have been using CoreSight PTM component on Zynq for more than two years. I started out by programming a simple library to program these components on a “bare-metal” system (without OS). Then, I moved on Linux and Mathieu Poirier (I can’t thank him enough) helped me a lot during this phase. So far, I have been tracing small portions of my applications and the amount of trace generated was not that important. I was getting the expected trace i.e. for each branch (direct or indirect), I was getting a branch address packet in my trace. Now, I started tracing the whole .text section of binaries and I am not understanding the obtained trace. Here is how I configure Linux kernel driver (Kernel v4.9): cd /sys/bus/coresight/devices/f889c000.ptm0 echo 1 > addr_idx echo 0 > addr_acctype echo 0 > addr_idx echo 0 > addr_acctype echo 20 > mode echo 100e0 104b4 > addr_range # These two addresses represent the beginning and end of .text section Then, I enable the trace sink component (either ETB or TPIU) and trace source (PTM) component. cd /sys/bus/coresight/devices/ echo 1 > f8801000.etb/enable_sink echo 1 > f889c000.ptm0/enable_source Then, I run my application and stop tracing. ./application.elf ./disable # simply writes 0 to each enabled component (source and sink) Then, I recover the trace using dd. When I trace small portions of my application, the obtained trace gives the right behavior. I check it manually by looking at objdump of the binary. However, when I trace the whole .text section of the application, the amount of obtained trace is very small (even smaller than if I trace only main function of the application) which is quite strange for me. Basically, the obtained trace is going through libc functions that call the main function and it stops while it is in libc. I don’t understand why I am getting this strange behavior. Do you have any ideas about what I am doing wrong. I have attached a binary source code that I am trying to trace. Thank you for your help and time. Best regards, Muhammad PS: Sorry, I formatted my previous mail in markdown rather than HTML. This should be more readable than the previous mail.

6 years, 8 months

[PATCH v2 4/4] coresight: remove CORESIGHT_LINKS_AND_SINKS dependencies

by Kim Phillips

They're not needed anymore. Suggested-by: Mathieu Poirier <mathieu.poirier(a)linaro.org> Signed-off-by: Kim Phillips <kim.phillips(a)arm.com> --- Change(s) from first PATCH series: none. drivers/hwtracing/coresight/Kconfig | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index 09a682013ea2..f1e05fbef257 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -30,7 +30,7 @@ config CORESIGHT_LINKS_AND_SINKS config CORESIGHT_LINK_AND_SINK_TMC tristate "Coresight generic TMC driver" - depends on CORESIGHT_LINKS_AND_SINKS + depends on CORESIGHT help This enables support for the Trace Memory Controller driver. Depending on its configuration the device can act as a link (embedded @@ -43,7 +43,7 @@ config CORESIGHT_LINK_AND_SINK_TMC config CORESIGHT_SINK_TPIU tristate "Coresight generic TPIU driver" - depends on CORESIGHT_LINKS_AND_SINKS + depends on CORESIGHT help This enables support for the Trace Port Interface Unit driver, responsible for bridging the gap between the on-chip coresight @@ -57,7 +57,7 @@ config CORESIGHT_SINK_TPIU config CORESIGHT_SINK_ETBV10 tristate "Coresight ETBv1.0 driver" - depends on CORESIGHT_LINKS_AND_SINKS + depends on CORESIGHT help This enables support for the Embedded Trace Buffer version 1.0 driver that complies with the generic implementation of the component without @@ -68,7 +68,7 @@ config CORESIGHT_SINK_ETBV10 config CORESIGHT_SOURCE_ETM3X tristate "CoreSight Embedded Trace Macrocell 3.x driver" - depends on !ARM64 && CORESIGHT_LINKS_AND_SINKS + depends on CORESIGHT && !ARM64 help This driver provides support for processor ETM3.x and PTM1.x modules, which allows tracing the instructions that a processor is executing @@ -80,7 +80,7 @@ config CORESIGHT_SOURCE_ETM3X config CORESIGHT_SOURCE_ETM4X tristate "CoreSight Embedded Trace Macrocell 4.x driver" - depends on ARM64 && CORESIGHT_LINKS_AND_SINKS + depends on CORESIGHT && ARM64 help This driver provides support for the ETM4.x tracer module, tracing the instructions that a processor is executing. This is primarily useful @@ -92,7 +92,7 @@ config CORESIGHT_SOURCE_ETM4X config CORESIGHT_DYNAMIC_REPLICATOR tristate "CoreSight Programmable Replicator driver" - depends on CORESIGHT_LINKS_AND_SINKS + depends on CORESIGHT help This enables support for dynamic CoreSight replicator link driver. The programmable ATB replicator allows independent filtering of the @@ -104,7 +104,7 @@ config CORESIGHT_DYNAMIC_REPLICATOR config CORESIGHT_STM tristate "CoreSight System Trace Macrocell driver" depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64 - depends on STM && CORESIGHT_LINKS_AND_SINKS + depends on STM help This driver provides support for hardware assisted software instrumentation based tracing. This is primarily used for -- 2.17.0

6 years, 8 months

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CoreSight April 2018