CoreSight September 2024

coresight@lists.linaro.org

7 participants
26 discussions

[PATCH v10 0/8] Coresight for Kernel panic and watchdog reset

by Linu Cherian

This patch series is rebased on coresight-next-v6.12. Changelog from v9: * Add common helper function of_tmc_get_reserved_resource_by_name for better code reuse * Reserved buffer validity and crashdata validity has been separated to avoid interdependence * New fields added to crash metadata: version, ffcr, ffsr, mode * Version checks added for metadata validation * Special file /dev/crash_tmc_xxx would be available only when crash metadata is valid * Removed READ_CRASHDATA mode meant for special casing crashdata reads. Instead, dedicated read function added for crashdata reads from reserved buffer which is common for both ETR and ETF sinks as well. * Documentation added to Documentation/tracing/coresight/panic.rst Changelog from v8: * Added missing exit path on error in __tmc_probe. * Few whitespace fixes, checkpatch fixes. * With perf sessions honouring stop_on_flush sysfs attribute, removed redundant variable stop_on_flush_en. Changelog from v7: * Fixed breakage on perf test -vvvv "arm coresight". No issues seen with and without "resrv" buffer mode * Moved the crashdev registration into a separate function. * Removed redundant variable in tmc_etr_setup_crashdata_buf * Avoided a redundant memcpy in tmc_panic_sync_etf. * Tested kernel panic with trace session started uisng perf. Please see the title "Perf based testing" below for details. For this, stop_on_flush sysfs attribute is taken into consideration while starting perf sessions as well. Changelog from v6: * Added special device files for reading crashdata, so that read_prevboot mode flag is removed. * Added new sysfs TMC device attribute, stop_on_flush. Stop on flush trigger event is disabled by default. User need to explicitly enable this from sysfs for panic stop to work. * Address parameter for panicstop ETM configuration is chosen as kernel "panic" address by default. * Added missing tmc_wait_for_tmcready during panic handling * Few other misc code rearrangements. Changelog from v5: * Fixed issues reported by CONFIG_DEBUG_ATOMIC_SLEEP * Fixed a memory leak while reading data from /dev/tmc_etrx in READ_PREVBOOT mode * Tested reading trace data from crashdump kernel Changelog from v4: * Device tree binding - Description is made more explicit on the usage of reserved memory region - Mismatch in memory region names in dts binding and driver fixed - Removed "mem" suffix from the memory region names * Rename "struct tmc_register_snapshot" -> "struct tmc_crash_metadata", since it contains more than register snapshot. Related variables are named accordingly. * Rename struct tmc_drvdata members resrv_buf -> crash_tbuf metadata -> crash_mdata * Size field in metadata refers to RSZ register and hence indicates the size in 32 bit words. ETR metadata follows this convention, the same has been extended to ETF metadata as well. * Added crc32 for more robust metadata and tracedata validation. * Added/modified dev_dbg messages during metadata validation * Fixed a typo in patch 5 commit description Changelog from v3: * Converted the Coresight ETM driver change to a named configuration. RFC tag has been removed with this change. * Fixed yaml issues reported by "make dt_binding_check" * Added names for reserved memory regions 0 and 1 * Added prevalidation checks for metadata processing * Fixed a regression introduced in RFC v3 - TMC Status register was getting saved wrongly * Reverted memremap attribute changes from _WB to _WC to match with the dma map attributes * Introduced reserved buffer mode specific .sync op. This fixes a possible crash when reserved buffer mode was used in normal trace capture, due to unwanted dma maintenance operations. *** SUBJECT HERE *** *** BLURB HERE *** Linu Cherian (8): dt-bindings: arm: coresight-tmc: Add "memory-region" property coresight: tmc-etr: Add support to use reserved trace memory coresight: core: Add provision for panic callbacks coresight: tmc: Enable panic sync handling coresight: tmc: Add support for reading crash data coresight: tmc: Stop trace capture on FlIn coresight: config: Add preloaded configuration Documentation: coresight: Panic support .../bindings/arm/arm,coresight-tmc.yaml | 26 ++ Documentation/trace/coresight/panic.rst | 356 ++++++++++++++++++ drivers/hwtracing/coresight/Makefile | 2 +- .../coresight/coresight-cfg-preload.c | 2 + .../coresight/coresight-cfg-preload.h | 2 + .../hwtracing/coresight/coresight-cfg-pstop.c | 83 ++++ drivers/hwtracing/coresight/coresight-core.c | 42 +++ .../hwtracing/coresight/coresight-tmc-core.c | 296 ++++++++++++++- .../hwtracing/coresight/coresight-tmc-etf.c | 124 +++++- .../hwtracing/coresight/coresight-tmc-etr.c | 231 +++++++++++- drivers/hwtracing/coresight/coresight-tmc.h | 106 ++++++ include/linux/coresight.h | 24 ++ 12 files changed, 1282 insertions(+), 12 deletions(-) create mode 100644 Documentation/trace/coresight/panic.rst create mode 100644 drivers/hwtracing/coresight/coresight-cfg-pstop.c -- 2.34.1

3 days, 20 hours

[PATCH v5 0/2] arm64: dts: qcom: sm8450: Add coresight nodes

by Mao Jinlong

Change since V4: 1. Use ^ete(-[0-9]+)?$ for the pattern of node name -- comments from Krzysztof Kozlowski <krzk(a)kernel.org> 2. Update commit message --- comments from Rob Herring <robh(a)kernel.org> Change since V3: 1. Use ^ete-[0-9]+$ for the pattern of node name -- comments from Rob Herring Change since V2: 1. Change the name in binding as 'ete'. Change since V1: 1. Remove the pattern match of ETE node name. 2. Update the tmc-etr node name in DT. Mao Jinlong (2): dt-bindings: arm: coresight: Update the pattern of ete node name arm64: dts: qcom: sm8450: Add coresight nodes .../arm/arm,embedded-trace-extension.yaml | 6 +- arch/arm64/boot/dts/qcom/sm8450.dtsi | 726 ++++++++++++++++++ 2 files changed, 729 insertions(+), 3 deletions(-) -- 2.46.0

1 week, 3 days

Re: [PATCH] perf: cs-etm: Fix the assert() to handle captured and unprocessed cpu trace

by James Clark

On 25/09/2024 12:39 am, Ilkka Koskinen wrote: > If one builds perf with DEBUG=1, captures data on multiple CPUs and > finally runs 'perf report -C <cpu>' for only one of the cpus, assert() > aborts the program. This happens because there are empty queues with > format set. This patch changes the condition to abort only if a queue > is not empty and if the format is unset. > > $ make -C tools/perf DEBUG=1 CORESIGHT=1 CSLIBS=/usr/lib CSINCLUDES=/usr/include install > $ perf record -o kcore --kcore -e cs_etm/timestamp/k -s -C 0-1 dd if=/dev/zero of=/dev/null bs=1M count=1 > $ perf report --input kcore/data --vmlinux=/home/ikoskine/projects/linux/vmlinux -C 1 > Aborted (core dumped) > > Fixes: 57880a7966be ("perf: cs-etm: Allocate queues for all CPUs") > Signed-off-by: Ilkka Koskinen <ilkka(a)os.amperecomputing.com> > --- > tools/perf/util/cs-etm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c > index 90f32f327b9b..40f047baef81 100644 > --- a/tools/perf/util/cs-etm.c > +++ b/tools/perf/util/cs-etm.c > @@ -3323,7 +3323,7 @@ static int cs_etm__create_decoders(struct cs_etm_auxtrace *etm) > * Don't create decoders for empty queues, mainly because > * etmq->format is unknown for empty queues. > */ > - assert(empty == (etmq->format == UNSET)); > + assert(empty || etmq->format != UNSET); > if (empty) > continue; > Oops I didn't realize you could filter on CPU in report mode. Thanks for the fix. Adding a test to the end of test_arm_coresight.sh might be quite useful. Either way: Reviewed-by: James Clark <james.clark(a)linaro.org>

1 week, 5 days

Re: [PATCH v3 0/7] perf: cs-etm: Coresight decode and disassembly improvements

by James Clark

On 18/09/2024 12:23 pm, Ganapatrao Kulkarni wrote: > > Hi James, > > On 16-09-2024 07:27 pm, James Clark wrote: >> A set of changes that came out of the issues reported here [1]. >> >> * First 2 patches fix a decode bug in Perf and add support for new >> consistency checks in OpenCSD >> * The remaining ones make the disassembly script easier to test >> and use. This also involves adding a new Python binding to >> Perf to get a config value (perf_config_get()) >> >> [1]: >> https://lore.kernel.org/linux-arm-kernel/20240719092619.274730-1-gankulkarn… >> > > Tried this series with below commands and issue is not seen as reported > in [1]. > > record: > timeout 8s ./perf record -e cs_etm// -C 1 -o kcore --kcore dd > if=/dev/zero of=/dev/null > > decode: > ./perf script -i ./kcore -s scripts/python/arm-cs-trace-disasm.py -- -d > objdump -k kcore/kcore_dir/kcore > > ./perf script -i ./kcore -s scripts/python/arm-cs-trace-disasm.py -F > cpu,event,ip,addr,sym -- -d objdump -k kcore/kcore_dir/kcore > > Feel free to add for 1/7 and 2/7. > Tested-by: Ganapatrao Kulkarni <gankulkarni(a)os.amperecomputing.com> > Thanks for testing!

2 weeks, 3 days

Re: [PATCH v10 8/8] Documentation: coresight: Panic support

by Linu Cherian

Hi, On 2024-09-17 at 07:16:46, Bagas Sanjaya (bagasdotme(a)gmail.com) wrote: > On Mon, Sep 16, 2024 at 04:04:37PM +0530, Linu Cherian wrote: > > +3. On a kernel panic, all coresight blocks are disabled, necessary > > + metadata is synced by kernel panic handler. > "... and necessary metadata ..." > > + > > + System would eventually reboot or boot a crashdump kernel. > > + > > +4. For platforms that supports crashdump kernel, raw trace data can be > > + dumped using the coresight sysfs interface from the crashdump kernel > > + itself. Persistent RAM is not a requirement in this case. > > + > > +5. For platforms that supports persistent RAM, trace data can be dumped > > + using the coresight sysfs interface in the subsequent Linux boot. > > + Crashdump kernel is not a requirement in this case. Persistent RAM > > + ensures that trace data is intact across reboot. > > + > > +Coresight trace during Watchdog reset > > +------------------------------------- > > +The main difference between addressing the watchdog reset and kernel panic > > +case are below, > "... are:" > > +Sample commands for testing a Kernel panic case with ETR sink > > +------------------------------------------------------------- > > + > > +1. Boot Linux kernel with "crash_kexec_post_notifiers" added to the kernel > > + bootargs. This is mandatory if the user would like to read the tracedata > > + from the crashdump kernel. > > + > > +2. Enable the preloaded ETM configuration > > + > > + #echo 1 > /sys/kernel/config/cs-syscfg/configurations/panicstop/enable > > + > > +3. Configure CTI using sysfs interface:: > > + > > + #./cti_setup.sh > > + > > + #cat cti_setup.sh > > + > > + > > + cd /sys/bus/coresight/devices/ > > + > > + ap_cti_config () { > > + #ETM trig out[0] trigger to Channel 0 > > + echo 0 4 > channels/trigin_attach > > + } > > + > > + etf_cti_config () { > > + #ETF Flush in trigger from Channel 0 > > + echo 0 1 > channels/trigout_attach > > + echo 1 > channels/trig_filter_enable > > + } > > + > > + etr_cti_config () { > > + #ETR Flush in from Channel 0 > > + echo 0 1 > channels/trigout_attach > > + echo 1 > channels/trig_filter_enable > > + } > > + > > + ctidevs=`find . -name "cti*"` > > + > > + for i in $ctidevs > > + do > > + cd $i > > + > > + connection=`find . -name "ete*"` > > + if [ ! -z "$connection" ] > > + then > > + echo "AP CTI config for $i" > > + ap_cti_config > > + fi > > + > > + connection=`find . -name "tmc_etf*"` > > + if [ ! -z "$connection" ] > > + then > > + echo "ETF CTI config for $i" > > + etf_cti_config > > + fi > > + > > + connection=`find . -name "tmc_etr*"` > > + if [ ! -z "$connection" ] > > + then > > + echo "ETR CTI config for $i" > > + etr_cti_config > > + fi > > + > > + cd .. > > + done > > + > > +Note: CTI connections are SOC specific and hence the above script is > > +added just for reference. > > + > > +4. Choose reserved buffer mode for ETR buffer > > + #echo "resrv" > /sys/bus/coresight/devices/tmc_etr0/buf_mode_preferred > > + > > +5. Enable stop on flush trigger configuration > > + #echo 1 > /sys/bus/coresight/devices/tmc_etr0/stop_on_flush > > + > > +6. Start Coresight tracing on cores 1 and 2 using sysfs interface > > + > > +7. Run some application on core 1 > > + #taskset -c 1 dd if=/dev/urandom of=/dev/null & > > + > > +8. Invoke kernel panic on core 2 > > + #echo 1 > /proc/sys/kernel/panic > > + #taskset -c 2 echo c > /proc/sysrq-trigger > > + > > +9. From rebooted kernel or crashdump kernel, read crashdata > > + > > + #dd if=/dev/crash_tmc_etr0 of=/trace/cstrace.bin > > + > > +10. Run opencsd decoder tools/scripts to generate the instruction trace. > > Format all command lines as literal code blocks to be consistent: > > ---- >8 ---- > diff --git a/Documentation/trace/coresight/panic.rst b/Documentation/trace/coresight/panic.rst > index 3b53d91cace8fd..864f6c05b3f7af 100644 > --- a/Documentation/trace/coresight/panic.rst > +++ b/Documentation/trace/coresight/panic.rst > @@ -113,7 +113,7 @@ Sample commands for testing a Kernel panic case with ETR sink > bootargs. This is mandatory if the user would like to read the tracedata > from the crashdump kernel. > > -2. Enable the preloaded ETM configuration > +2. Enable the preloaded ETM configuration:: > > #echo 1 > /sys/kernel/config/cs-syscfg/configurations/panicstop/enable > > @@ -176,22 +176,26 @@ Sample commands for testing a Kernel panic case with ETR sink > Note: CTI connections are SOC specific and hence the above script is > added just for reference. > > -4. Choose reserved buffer mode for ETR buffer > +4. Choose reserved buffer mode for ETR buffer:: > + > #echo "resrv" > /sys/bus/coresight/devices/tmc_etr0/buf_mode_preferred > > -5. Enable stop on flush trigger configuration > +5. Enable stop on flush trigger configuration:: > + > #echo 1 > /sys/bus/coresight/devices/tmc_etr0/stop_on_flush > > 6. Start Coresight tracing on cores 1 and 2 using sysfs interface > > -7. Run some application on core 1 > +7. Run some application on core 1:: > + > #taskset -c 1 dd if=/dev/urandom of=/dev/null & > > -8. Invoke kernel panic on core 2 > +8. Invoke kernel panic on core 2:: > + > #echo 1 > /proc/sys/kernel/panic > #taskset -c 2 echo c > /proc/sysrq-trigger > > -9. From rebooted kernel or crashdump kernel, read crashdata > +9. From rebooted kernel or crashdump kernel, read crashdata:: > > #dd if=/dev/crash_tmc_etr0 of=/trace/cstrace.bin Ack. > > Thanks. > > -- > An old man doll... just what I always wanted! - Clara Linu Cherian.

2 weeks, 4 days

[PATCH] coresight: Fixes device's owner field for registered using coresight_init_driver()

by Junhao He

The coresight_init_driver() of the coresight-core module is called from the sub coresgiht device (such as tmc/stm/funnle/...) module. It calls amba_driver_register() and Platform_driver_register(), which are macro functions that use the coresight-core's module to initialize the caller's owner field. Therefore, when the sub coresight device calls coresight_init_driver(), an incorrect THIS_MODULE value is captured. The sub coesgiht modules can be removed while their callbacks are running, resulting in a general protection failure. Add module parameter to coresight_init_driver() so can be called with the module of the callback. Fixes: 075b7cd7ad7d ("coresight: Add helpers registering/removing both AMBA and platform drivers") Signed-off-by: Junhao He <hejunhao3(a)huawei.com> --- drivers/hwtracing/coresight/coresight-catu.c | 2 +- drivers/hwtracing/coresight/coresight-core.c | 6 +++--- drivers/hwtracing/coresight/coresight-cpu-debug.c | 3 ++- drivers/hwtracing/coresight/coresight-funnel.c | 3 ++- drivers/hwtracing/coresight/coresight-replicator.c | 3 ++- drivers/hwtracing/coresight/coresight-stm.c | 2 +- drivers/hwtracing/coresight/coresight-tmc-core.c | 2 +- drivers/hwtracing/coresight/coresight-tpiu.c | 2 +- include/linux/coresight.h | 2 +- 9 files changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c index bfea880d6dfb..337668f9cfd4 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -702,7 +702,7 @@ static int __init catu_init(void) { int ret; - ret = coresight_init_driver("catu", &catu_driver, &catu_platform_driver); + ret = coresight_init_driver("catu", &catu_driver, &catu_platform_driver, THIS_MODULE); tmc_etr_set_catu_ops(&etr_catu_buf_ops); return ret; } diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 9fc6f6b863e0..c546a417836c 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -1399,17 +1399,17 @@ module_init(coresight_init); module_exit(coresight_exit); int coresight_init_driver(const char *drv, struct amba_driver *amba_drv, - struct platform_driver *pdev_drv) + struct platform_driver *pdev_drv, struct module *owner) { int ret; - ret = amba_driver_register(amba_drv); + ret = __amba_driver_register(amba_drv, owner); if (ret) { pr_err("%s: error registering AMBA driver\n", drv); return ret; } - ret = platform_driver_register(pdev_drv); + ret = __platform_driver_register(pdev_drv, owner); if (!ret) return 0; diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hwtracing/coresight/coresight-cpu-debug.c index 75962dae9aa1..cc599c5ef4b2 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -774,7 +774,8 @@ static struct platform_driver debug_platform_driver = { static int __init debug_init(void) { - return coresight_init_driver("debug", &debug_driver, &debug_platform_driver); + return coresight_init_driver("debug", &debug_driver, &debug_platform_driver, + THIS_MODULE); } static void __exit debug_exit(void) diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c index 5a819c8970fb..8f451b051ddc 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -433,7 +433,8 @@ static struct amba_driver dynamic_funnel_driver = { static int __init funnel_init(void) { - return coresight_init_driver("funnel", &dynamic_funnel_driver, &funnel_driver); + return coresight_init_driver("funnel", &dynamic_funnel_driver, &funnel_driver, + THIS_MODULE); } static void __exit funnel_exit(void) diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c index 3e55be9c8418..f7607c72857c 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -438,7 +438,8 @@ static struct amba_driver dynamic_replicator_driver = { static int __init replicator_init(void) { - return coresight_init_driver("replicator", &dynamic_replicator_driver, &replicator_driver); + return coresight_init_driver("replicator", &dynamic_replicator_driver, &replicator_driver, + THIS_MODULE); } static void __exit replicator_exit(void) diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c index 117dbb484543..403eea8f95d4 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -1046,7 +1046,7 @@ static struct platform_driver stm_platform_driver = { static int __init stm_init(void) { - return coresight_init_driver("stm", &stm_driver, &stm_platform_driver); + return coresight_init_driver("stm", &stm_driver, &stm_platform_driver, THIS_MODULE); } static void __exit stm_exit(void) diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwtracing/coresight/coresight-tmc-core.c index b54562f392f3..e31e36635394 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -742,7 +742,7 @@ static struct platform_driver tmc_platform_driver = { static int __init tmc_init(void) { - return coresight_init_driver("tmc", &tmc_driver, &tmc_platform_driver); + return coresight_init_driver("tmc", &tmc_driver, &tmc_platform_driver, THIS_MODULE); } static void __exit tmc_exit(void) diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index b048e146fbb1..f9ecd05cbe5c 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -318,7 +318,7 @@ static struct platform_driver tpiu_platform_driver = { static int __init tpiu_init(void) { - return coresight_init_driver("tpiu", &tpiu_driver, &tpiu_platform_driver); + return coresight_init_driver("tpiu", &tpiu_driver, &tpiu_platform_driver, THIS_MODULE); } static void __exit tpiu_exit(void) diff --git a/include/linux/coresight.h b/include/linux/coresight.h index f09ace92176e..e6c26952ddc2 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -660,7 +660,7 @@ coresight_find_output_type(struct coresight_platform_data *pdata, union coresight_dev_subtype subtype); int coresight_init_driver(const char *drv, struct amba_driver *amba_drv, - struct platform_driver *pdev_drv); + struct platform_driver *pdev_drv, struct module *owner); void coresight_remove_driver(struct amba_driver *amba_drv, struct platform_driver *pdev_drv); -- 2.33.0

2 weeks, 5 days

[PATCH v2 0/7] perf: cs-etm: Coresight decode and disassembly improvements

by James Clark

A set of changes that came out of the issues reported here [1]. * First 2 patches fix a decode bug in Perf and add support for new consistency checks in OpenCSD * The remaining ones make the disassembly script easier to test and use. This also involves adding a new Python binding to Perf to get a config value (perf_config_get()) [1]: https://lore.kernel.org/linux-arm-kernel/20240719092619.274730-1-gankulkarn… Changes since V1: * Keep the flush function for discontinuities * Still remove the flush when the buffer fills, but now add cs_etm__end_block() for the end trace. That way we won't drop the last branch stack if the instruction sample period wasn't hit at the very end. James Clark (7): perf cs-etm: Don't flush when packet_queue fills up perf cs-etm: Use new OpenCSD consistency checks perf scripting python: Add function to get a config value perf scripts python cs-etm: Update to use argparse perf scripts python cs-etm: Improve arguments perf scripts python cs-etm: Add start and stop arguments perf test: cs-etm: Test Coresight disassembly script .../perf/Documentation/perf-script-python.txt | 2 +- .../scripts/python/Perf-Trace-Util/Context.c | 11 ++ .../scripts/python/arm-cs-trace-disasm.py | 109 +++++++++++++----- .../tests/shell/test_arm_coresight_disasm.sh | 63 ++++++++++ tools/perf/util/config.c | 22 ++++ tools/perf/util/config.h | 1 + .../perf/util/cs-etm-decoder/cs-etm-decoder.c | 7 +- tools/perf/util/cs-etm.c | 25 ++-- 8 files changed, 205 insertions(+), 35 deletions(-) create mode 100755 tools/perf/tests/shell/test_arm_coresight_disasm.sh -- 2.34.1

2 weeks, 6 days

[PATCH v3 0/7] perf: cs-etm: Coresight decode and disassembly improvements

by James Clark

A set of changes that came out of the issues reported here [1]. * First 2 patches fix a decode bug in Perf and add support for new consistency checks in OpenCSD * The remaining ones make the disassembly script easier to test and use. This also involves adding a new Python binding to Perf to get a config value (perf_config_get()) [1]: https://lore.kernel.org/linux-arm-kernel/20240719092619.274730-1-gankulkarn… Changes since V2: * Check validity of start stop arguments * Make test work if Perf was installed * Document that start and stop time are monotonic clock values Changes since V1: * Keep the flush function for discontinuities * Still remove the flush when the buffer fills, but now add cs_etm__end_block() for the end trace. That way we won't drop the last branch stack if the instruction sample period wasn't hit at the very end. James Clark (7): perf cs-etm: Don't flush when packet_queue fills up perf cs-etm: Use new OpenCSD consistency checks perf scripting python: Add function to get a config value perf scripts python cs-etm: Update to use argparse perf scripts python cs-etm: Improve arguments perf scripts python cs-etm: Add start and stop arguments perf test: cs-etm: Test Coresight disassembly script .../perf/Documentation/perf-script-python.txt | 2 +- .../scripts/python/Perf-Trace-Util/Context.c | 11 ++ .../scripts/python/arm-cs-trace-disasm.py | 127 ++++++++++++++---- .../tests/shell/test_arm_coresight_disasm.sh | 65 +++++++++ tools/perf/util/config.c | 22 +++ tools/perf/util/config.h | 1 + .../perf/util/cs-etm-decoder/cs-etm-decoder.c | 7 +- tools/perf/util/cs-etm.c | 25 +++- 8 files changed, 225 insertions(+), 35 deletions(-) create mode 100755 tools/perf/tests/shell/test_arm_coresight_disasm.sh -- 2.34.1

2 weeks, 6 days

Re: [PATCH v2 7/7] perf test: cs-etm: Test Coresight disassembly script

by James Clark

On 13/09/2024 14:35, Leo Yan wrote: > > > On 9/12/24 16:11, James Clark wrote: >> >> Run a few samples through the disassembly script and check to see that >> at least one branch instruction is printed. >> >> Signed-off-by: James Clark <james.clark(a)linaro.org> >> --- >> .../tests/shell/test_arm_coresight_disasm.sh | 63 +++++++++++++++++++ >> 1 file changed, 63 insertions(+) >> create mode 100755 tools/perf/tests/shell/test_arm_coresight_disasm.sh >> >> diff --git a/tools/perf/tests/shell/test_arm_coresight_disasm.sh >> b/tools/perf/tests/shell/test_arm_coresight_disasm.sh >> new file mode 100755 >> index 000000000000..6d004bf29f80 >> --- /dev/null >> +++ b/tools/perf/tests/shell/test_arm_coresight_disasm.sh >> @@ -0,0 +1,63 @@ >> +#!/bin/sh >> +# Check Arm CoreSight disassembly script completes without errors >> +# SPDX-License-Identifier: GPL-2.0 >> + >> +# The disassembly script reconstructs ranges of instructions and >> gives these to objdump to >> +# decode. objdump doesn't like ranges that go backwards, but these >> are a good indication >> +# that decoding has gone wrong either in OpenCSD, Perf or in the >> range reconstruction in >> +# the script. Test all 3 parts are working correctly by running the >> script. >> + >> +skip_if_no_cs_etm_event() { >> + perf list | grep -q 'cs_etm//' && return 0 >> + >> + # cs_etm event doesn't exist >> + return 2 >> +} >> + >> +skip_if_no_cs_etm_event || exit 2 >> + >> +# Assume an error unless we reach the very end >> +set -e >> +glb_err=1 >> + >> +perfdata_dir=$(mktemp -d /tmp/__perf_test.perf.data.XXXXX) >> +perfdata=${perfdata_dir}/perf.data >> +file=$(mktemp /tmp/temporary_file.XXXXX) >> + >> +cleanup_files() >> +{ >> + set +e >> + rm -rf ${perfdata_dir} >> + rm -f ${file} >> + trap - EXIT TERM INT >> + exit $glb_err >> +} >> + >> +trap cleanup_files EXIT TERM INT >> + >> +# Ranges start and end on branches, so check for some likely branch >> instructions >> +sep="\s\|\s" >> +branch_search="\sbl${sep}b${sep}b.ne${sep}b.eq${sep}cbz\s" >> + >> +## Test kernel ## >> +if [ -e /proc/kcore ]; then >> + echo "Testing kernel disassembly" >> + perf record -o ${perfdata} -e cs_etm//k --kcore -- touch $file >> > /dev/null 2>&1 >> + perf script -i ${perfdata} -s >> python:tools/perf/scripts/python/arm-cs-trace-disasm.py -- \ >> + -d --stop-sample=30 2> /dev/null > ${file} > > This is fine for self test. But for a CI test in a distro, will it fail to > find script with prefix 'tools/perf/...'? > > Thanks, > Leo > Nice catch, it should be this: # Relative path works whether it's installed or running from repo script_path=$(dirname "$0")/../../scripts/python/arm-cs-trace\ -disasm.py

2 weeks, 6 days

Re: [PATCH v2 6/7] perf scripts python cs-etm: Add start and stop arguments

by James Clark

On 13/09/2024 14:20, Leo Yan wrote: > On 9/12/24 16:11, James Clark wrote:> >> Make it possible to only disassemble a range of timestamps or sample >> indexes. This will be used by the test to limit the runtime, but it's >> also useful for users. >> >> Signed-off-by: James Clark <james.clark(a)linaro.org> >> --- >> .../scripts/python/arm-cs-trace-disasm.py | 22 +++++++++++++++++-- >> 1 file changed, 20 insertions(+), 2 deletions(-) >> >> diff --git a/tools/perf/scripts/python/arm-cs-trace-disasm.py >> b/tools/perf/scripts/python/arm-cs-trace-disasm.py >> index 02e957d037ea..a097995d8e7b 100755 >> --- a/tools/perf/scripts/python/arm-cs-trace-disasm.py >> +++ b/tools/perf/scripts/python/arm-cs-trace-disasm.py >> @@ -55,6 +55,11 @@ args.add_argument("-k", "--vmlinux", >> args.add_argument("-d", "--objdump", nargs="?", >> const=default_objdump(), >> help="Show disassembly. Can also be used to change >> the objdump path"), >> args.add_argument("-v", "--verbose", action="store_true", >> help="Enable debugging log") >> +args.add_argument("--start-time", type=int, help="Time of sample to >> start from") >> +args.add_argument("--stop-time", type=int, help="Time of sample to >> stop at") >> +args.add_argument("--start-sample", type=int, help="Index of sample >> to start from") >> +args.add_argument("--stop-sample", type=int, help="Index of sample to >> stop at") >> + > > It is good to validate the ranges for time and sample indexes, in case > the user passes unexpected values and can directly report the error. > > BTW, I think it is good to clarify the time is based on monotonic clock > but not wall-clock time. > > With above changes, LGTM: > > Reviewed-by: Leo Yan <leo.yan(a)arm.com> > Yep makes sense, I can add that >> options = args.parse_args() >> >> # Initialize global dicts and regular expression >> @@ -63,6 +68,7 @@ cpu_data = dict() >> disasm_re = re.compile(r"^\s*([0-9a-fA-F]+):") >> disasm_func_re = re.compile(r"^\s*([0-9a-fA-F]+)\s.*:") >> cache_size = 64*1024 >> +sample_idx = -1 >> >> glb_source_file_name = None >> glb_line_number = None >> @@ -151,10 +157,10 @@ def print_disam(dso_fname, dso_start, >> start_addr, stop_addr): >> >> def print_sample(sample): >> print("Sample = { cpu: %04d addr: 0x%016x phys_addr: 0x%016x >> ip: 0x%016x " \ >> - "pid: %d tid: %d period: %d time: %d }" % \ >> + "pid: %d tid: %d period: %d time: %d index: %d}" % \ >> (sample['cpu'], sample['addr'], sample['phys_addr'], \ >> sample['ip'], sample['pid'], sample['tid'], \ >> - sample['period'], sample['time'])) >> + sample['period'], sample['time'], sample_idx)) >> >> def trace_begin(): >> print('ARM CoreSight Trace Data Assembler Dump') >> @@ -216,6 +222,7 @@ def print_srccode(comm, param_dict, sample, >> symbol, dso): >> def process_event(param_dict): >> global cache_size >> global options >> + global sample_idx >> >> sample = param_dict["sample"] >> comm = param_dict["comm"] >> @@ -231,6 +238,17 @@ def process_event(param_dict): >> ip = sample["ip"] >> addr = sample["addr"] >> >> + sample_idx += 1 >> + >> + if (options.start_time and sample["time"] < options.start_time): >> + return >> + if (options.stop_time and sample["time"] > options.stop_time): >> + exit(0) >> + if (options.start_sample and sample_idx < options.start_sample): >> + return >> + if (options.stop_sample and sample_idx > options.stop_sample): >> + exit(0) >> + >> if (options.verbose == True): >> print("Event type: %s" % name) >> print_sample(sample) >> -- >> 2.34.1 >>

2 weeks, 6 days

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

CoreSight September 2024