CoreSight May 2018

coresight@lists.linaro.org

11 participants
17 discussions

by Ajith Kurian Issac

Hi, We are trying to us the Open CSD for decoding a onchip trace in our ETB. The trace was enabled and is captured in the ETB. We read the trace back and dumped it into a text file. I am attaching it. How can I use the CSD tool to decode it? Thanks Ajith

6 years, 2 months

Debian packaging - patches

by Wookey

I've been packaging libopenCSD for debian. That has resulted in various changes, largely to the makefiles. Most of those changes should go upstream, rather than exist only in the debian version. I'll post my issues/changes here for discussion so we can decide what is upstreamable. In the meantime anyone interested can try the debian packages here: http://wookware.org/software/repo/ either manually from: http://wookware.org/software/repo/pool/main/libo/libopencsd/ or with deb [ trusted=yes ] http://wookware.org/software/repo unstable main apt update; apt install libopencsd0 (and/or libopencsd-dev libopencsd-doc libopencsd-dbgsym) (for debian unstable, amd64 only) (package is signed, but repo isn't. Sorry) Or get the source and rebuild for a different debian-based distro/release. I've not separated all my changes into proper standalone patches yet, but some are so let's start with those. 1) The doxygen doc build doesn't find all the components because they moved. This fixes that: Index: libopencsd-0.8.0/decoder/docs/doxygen_config.dox =================================================================== --- libopencsd-0.8.0.orig/decoder/docs/doxygen_config.dox +++ libopencsd-0.8.0/decoder/docs/doxygen_config.dox @@ -765,11 +765,11 @@ WARN_LOGFILE = INPUT = ../include \ ../include/interfaces \ - ../include/etmv3 \ - ../include/etmv4 \ - ../include/ptm \ - ../include/c_api \ - ../include/stm \ + ../include/opencsd/etmv3 \ + ../include/opencsd/etmv4 \ + ../include/opencsd/ptm \ + ../include/opencsd/c_api \ + ../include/opencsd/stm \ ../include/mem_acc \ ../../README.md \ . \ 2) The makefile provides no doc-build. The patch below adds that. I didn't include an install-docs target, although if you added one with a variable to set the target dir then I'd use it. Index: libopencsd-0.8.0/decoder/build/linux/makefile =================================================================== --- libopencsd-0.8.0.orig/decoder/build/linux/makefile +++ libopencsd-0.8.0/decoder/build/linux/makefile @@ -155,6 +155,13 @@ tests: libs cd $(OCSD_ROOT)/tests/build/linux/trc_pkt_lister && make cd $(OCSD_ROOT)/tests/build/linux/c_api_pkt_print_test && make +# +# build docs +.PHONY: docs +docs: + (cd $(OCSD_ROOT/docs); doxygen doxygen_config.dox) + + ############################################################# # clean targets # @@ -176,3 +183,4 @@ clean_install: rm -f $(INSTALL_LIB_DIR)/lib$(LIB_BASE_NAME).so rm -f $(INSTALL_LIB_DIR)/lib$(LIB_CAPI_NAME).so rm -rf $(INSTALL_INCLUDE_DIR)/$(LIB_UAPI_INC_DIR) + rm -rf $(OCSD_ROOT)/docs/html 3) The static libraries are built but not installed. Now static libraries aren't much use to anyone these days, but if you build them then you might as well install them. This patch does that: Index: libopencsd-0.8.0/decoder/build/linux/makefile =================================================================== --- libopencsd-0.8.0.orig/decoder/build/linux/makefile +++ libopencsd-0.8.0/decoder/build/linux/makefile @@ -136,6 +136,8 @@ mkdir -p $(INSTALL_LIB_DIR) $(INSTALL_INCLUDE_DIR) $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_BASE_NAME).so $(INSTALL_LIB_DIR)/ $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_CAPI_NAME).so $(INSTALL_LIB_DIR)/ + $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_BASE_NAME).a $(INSTALL_LIB_DIR)/ + $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_CAPI_NAME).a $(INSTALL_LIB_DIR)/ cd $(OCSD_ROOT)/build/linux/rctdl_c_api_lib && make install_inc ################################ @@ -192,6 +194,6 @@ cd $(OCSD_ROOT)/tests/build/linux/c_api_pkt_print_test && make clean clean_install: - rm -f $(INSTALL_LIB_DIR)/lib$(LIB_BASE_NAME).so - rm -f $(INSTALL_LIB_DIR)/lib$(LIB_CAPI_NAME).so + rm -f $(INSTALL_LIB_DIR)/lib$(LIB_BASE_NAME).{so,a} + rm -f $(INSTALL_LIB_DIR)/lib$(LIB_CAPI_NAME).{so,a} rm -rf $(INSTALL_INCLUDE_DIR)/$(LIB_UAPI_INC_DIR) 4) The makefile arbitrarily restricts the build to arm and x86 architectures. The only reason for this is in order to build into a particular named directory, and to set -m32/-m64 flags for x86 which should be defaulted correctly on any sensible toolchain or cross-toolchain anyway. This code can build, and be used, on any arch and the makefile should allow that, so this should be fixed. I don't see the need to build into a host-arch named PLAT_DIR directory. Is there one? It only does one build at a time, whether crossing or not, so I see no reason not to use a fixed name for this dir, such as 'builddir'. This has no effect on the ability to cross or not. If you really want to change the name of PLAT_DIR then find out the HOST triplet and use that. On debian this is dpkg-architecture -q DEB_HOST_GNU_TYPE, (which is also the same prefix as would be used to specify the toolchain prefix for crossing). But like I say, I think a fixed builddir is actually all you need unless I'm missing something. So this patch lets the build work on any arch: Index: libopencsd-0.8.0/decoder/build/linux/makefile =================================================================== --- libopencsd-0.8.0.orig/decoder/build/linux/makefile +++ libopencsd-0.8.0/decoder/build/linux/makefile @@ -92,27 +92,6 @@ BUILD_VARIANT=rel endif -# platform bit size variant -ifeq ($(ARCH),x86) - MFLAG:="-m32" - BIT_VARIANT=32 -else ifeq ($(ARCH),x86_64) - MFLAG:="-m64" - BIT_VARIANT=64 -else ifeq ($(ARCH),arm) - BIT_VARIANT=-arm -else ifeq ($(ARCH),arm64) - BIT_VARIANT=-arm64 -else ifeq ($(ARCH),aarch64) - BIT_VARIANT=-arm64 -else ifeq ($(ARCH),aarch32) - BIT_VARIANT=-arm -endif - -MASTER_CC_FLAGS += $(MFLAG) -MASTER_CPP_FLAGS += $(MFLAG) -MASTER_LINKER_FLAGS += $(MFLAG) - # export build flags export MASTER_CC_FLAGS export MASTER_CPP_FLAGS @@ -120,7 +99,7 @@ export MASTER_LINKER_FLAGS export MASTER_LIB_FLAGS # target directories -export PLAT_DIR=linux$(BIT_VARIANT)/$(BUILD_VARIANT) +export PLAT_DIR=builddir export LIB_TARGET_DIR=$(OCSD_LIB_ROOT)/$(PLAT_DIR) export LIB_TEST_TARGET_DIR=$(OCSD_TESTS)/lib/$(PLAT_DIR) export BIN_TEST_TARGET_DIR=$(OCSD_TESTS)/bin/$(PLAT_DIR) All these patches included as files too. Wookey -- Principal hats: Linaro, Debian, Wookware, ARM http://wookware.org/

6 years, 6 months

[RFT v4 0/6] Perf script: Add python script for CoreSight trace disassembler

by Leo Yan

This patch series is to support for using 'perf script' for CoreSight trace disassembler, for this purpose this patch series adds a new python script to parse CoreSight tracing event and use command 'objdump' for disassembled lines, finally this can generate readable program execution flow for reviewing tracing data. Patches 0001 ~ 0003 are to generate samples for the start packet, CS_ETM_TRACE_ON packet and exception packets. Patch 0004 is to introduce invalid address macro. Patch 0005 is to add python script for trace disassembler. Patch 0006 is to add doc to explain python script usage and give example for it. This patch series has been rebased on acme git tree [1] with the latest commit e9175538c04f ("perf script python: Add addr into perf sample dict") and tested on Hikey (ARM64 octa CA53 cores). In this version the script has no dependency on ARM64 platform and is expected to support ARM32 platform, but I am lacking ARM32 platform for testing on it, so firstly upstream to support ARM64 platform. This patch series is firstly to support 'per-thread' recording tracing data, and it has been verified for kernel panic kdump tracing data. Please note, this patch series (v4) is ONLY used for discussion for packet handling, after we get solid result I will send to LKML for reviewing and merging into mainline kernel. Changes from v3: * Split packet handling for three patches, one is for start tracing packet, one is for CS_ETM_TRACE_ON packet and the last one patch is for exception packet; * Introduce invalid address macro. Changes from v2: * Synced with Rob for handling CS_ETM_TRACE_ON packet, so refined 0001 patch according to dicussion; * Minor cleanup and fixes in 0003 patch for python script: remove 'svc' checking. Changes from v1: * According to Mike and Rob suggestion, add the fixing to generate samples for the start packet and exception packets. * Simplify the python script to remove the exception prediction algorithm, we can rely on the sane exception packets for disassembler. Leo Yan (6): perf cs-etm: Fix start tracing packet handling perf cs-etm: Generate branch sample for CS_ETM_TRACE_ON packet perf cs-etm: Generate branch sample for exception packet perf cs-etm: Introduce invalid address macro perf script python: Add script for CoreSight trace disassembler coresight: Document for CoreSight trace disassembler Documentation/trace/coresight.txt | 52 +++++ tools/perf/scripts/python/arm-cs-trace-disasm.py | 235 +++++++++++++++++++++++ tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 19 +- tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 11 +- tools/perf/util/cs-etm.c | 101 ++++++++-- 5 files changed, 390 insertions(+), 28 deletions(-) create mode 100644 tools/perf/scripts/python/arm-cs-trace-disasm.py -- 2.7.4

6 years, 7 months

[PATCH v2 00/12] coresight: tmc-etr Transparent buffer management

by Suzuki K Poulose

This series is split of the Coresight ETR perf support patches posted here [0]. The CATU support and perf backend support will be posted as separate series for better management and review of the patches. This series adds the support for TMC ETR Scatter-Gather mode to allow using physical non-contiguous buffer for holding the trace data. It also adds a layer to handle the buffer management in a transparent manner, independent of the underlying mode used by the TMC ETR. The layer chooses the ETR mode based on different parameters (size, re-using a set of pages, presence of an SMMU etc.). Finally we add a sysfs parameter to tune the buffer size for ETR in sysfs-mode. During the testing, we found out that if the TMC ETR is not properly connected to the memory subsystem, the ETR could lock-up the system while waiting for the "read" transactions to complete in scatter-gather mode. So, we do not use the mode on a system unless it is safe to do so. This is specified by a DT property "arm,scatter-gather". Applies on coreisght-next tree from Mathieu Changes since previous version [1]: - Rebased to Mathieu's coresight-next tree to resolve a conflict. - Added tags for DT changes from Rob and Mathieu - Split the SG mode backend support patch from the ETR-BUF patch. - Address other comments from Mathieu Changes since splitted series [0] : - Split the series in [0] - Address comments on v2 - Rename DT property "scatter-gather" to "arm,scatter-gather" - Add ETM PID for Cortex-A35, use macros to make the listing easier [0] - http://lists.infradead.org/pipermail/linux-arm-kernel/2018-May/574875.html [1] - http://lists.infradead.org/pipermail/linux-arm-kernel/2018-May/579135.html Suzuki K Poulose (12): coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35 coresight: tmc: Hide trace buffer handling for file read coresight: tmc-etr: Do not clean trace buffer coresight: tmc-etr: Disallow perf mode coresight: Add helper for inserting synchronization packets dts: bindings: Restrict coresight tmc-etr scatter-gather mode dts: juno: Add scatter-gather support for all revisions coresight: Add generic TMC sg table framework coresight: Add support for TMC ETR SG unit coresight: tmc-etr: Add transparent buffer management coresight: tmc-etr buf: Add TMC scatter gather mode backend coresight: tmc: Add configuration support for trace buffer size .../ABI/testing/sysfs-bus-coresight-devices-tmc | 8 + .../devicetree/bindings/arm/coresight.txt | 5 +- arch/arm64/boot/dts/arm/juno-base.dtsi | 1 + drivers/hwtracing/coresight/coresight-etb10.c | 12 +- drivers/hwtracing/coresight/coresight-etm4x.c | 31 +- drivers/hwtracing/coresight/coresight-priv.h | 10 +- drivers/hwtracing/coresight/coresight-tmc-etf.c | 45 +- drivers/hwtracing/coresight/coresight-tmc-etr.c | 1010 ++++++++++++++++++-- drivers/hwtracing/coresight/coresight-tmc.c | 83 +- drivers/hwtracing/coresight/coresight-tmc.h | 110 ++- drivers/hwtracing/coresight/coresight.c | 3 +- 11 files changed, 1144 insertions(+), 174 deletions(-) -- 2.7.4

6 years, 7 months

[PATCH 6/7] perf script python: Add addr into perf sample dict

by Arnaldo Carvalho de Melo

From: Leo Yan <leo.yan(a)linaro.org> ARM CoreSight auxtrace uses 'sample->addr' to record the target address for branch instructions, so the data of 'sample->addr' is required for tracing data analysis. This commit collects data of 'sample->addr' into perf sample dict, finally can be used for python script for parsing event. Signed-off-by: Leo Yan <leo.yan(a)linaro.org> Cc: Alexander Shishkin <alexander.shishkin(a)linux.intel.com> Cc: Jiri Olsa <jolsa(a)redhat.com> Cc: Jonathan Corbet <corbet(a)lwn.net> Cc: Mathieu Poirier <mathieu.poirier(a)linaro.org> Cc: Mike Leach <mike.leach(a)linaro.org> Cc: Namhyung Kim <namhyung(a)kernel.org> Cc: Peter Zijlstra <peterz(a)infradead.org> Cc: Robert Walker <robert.walker(a)arm.com> Cc: Tor Jeremiassen <tor(a)ti.com> Cc: coresight(a)lists.linaro.org Cc: kim.phillips(a)arm.co Cc: linux-arm-kernel(a)lists.infradead.org Cc: linux-doc(a)vger.kernel.org Link: http://lkml.kernel.org/r/1527497103-3593-3-git-send-email-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme(a)redhat.com> --- tools/perf/util/scripting-engines/trace-event-python.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/perf/util/scripting-engines/trace-event-python.c b/tools/perf/util/scripting-engines/trace-event-python.c index 10dd5fce082b..7f8afacd08ee 100644 --- a/tools/perf/util/scripting-engines/trace-event-python.c +++ b/tools/perf/util/scripting-engines/trace-event-python.c @@ -531,6 +531,8 @@ static PyObject *get_perf_sample_dict(struct perf_sample *sample, PyLong_FromUnsignedLongLong(sample->period)); pydict_set_item_string_decref(dict_sample, "phys_addr", PyLong_FromUnsignedLongLong(sample->phys_addr)); + pydict_set_item_string_decref(dict_sample, "addr", + PyLong_FromUnsignedLongLong(sample->addr)); set_sample_read_in_dict(dict_sample, sample, evsel); pydict_set_item_string_decref(dict, "sample", dict_sample); -- 2.14.3

6 years, 7 months

[RFT v3 0/4] Perf script: Add python script for CoreSight trace disassembler

by Leo Yan

This patch series is to support for using 'perf script' for CoreSight trace disassembler, for this purpose this patch series adds a new python script to parse CoreSight tracing event and use command 'objdump' for disassembled lines, finally this can generate readable program execution flow for reviewing tracing data. Patch 0001 is one fixing patch to generate samples for the start packet and exception packets. Patch 0002 is the prerequisite to add addr into sample dict, so this value can be used by python script to analyze instruction range. Patch 0003 is to add python script for trace disassembler. Patch 0004 is to add doc to explain python script usage and give example for it. This patch series has been rebased on acme git tree [1] with the commit 19422a9f2a3b ("perf tools: Fix kernel_start for PTI on x86") and tested on Hikey (ARM64 octa CA53 cores). In this version the script has no dependency on ARM64 platform and is expected to support ARM32 platform, but I am lacking ARM32 platform for testing on it, so firstly upstream to support ARM64 platform. This patch series is firstly to support 'per-thread' recording tracing data, but we also need to verify the script can dump trace disassembler CPU wide tracing and kernel panic kdump tracing data. I also verified this patch series which can work with kernel panic kdump tracing data, because Mathieu is working on CPU wide tracing related work, so after this we need to retest for CPU wide tracing and kdump tracing to ensure the python script can handle well for all cases. You are very welcome to test the script in this patch series, your testing result and suggestion are very valuable to perfect this script to cover more cases. Changes from v2: * Synced with Rob for handling CS_ETM_TRACE_ON packet, so refined 0001 patch according to dicussion; * Minor cleanup and fixes in 0003 patch for python script: remove 'svc' checking. Changes from v1: * According to Mike and Rob suggestion, add the fixing to generate samples for the start packet and exception packets. * Simplify the python script to remove the exception prediction algorithm, we can rely on the sane exception packets for disassembler. Leo Yan (4): perf cs-etm: Generate branch sample for missed packets perf script python: Add addr into perf sample dict perf script python: Add script for CoreSight trace disassembler coresight: Document for CoreSight trace disassembler Documentation/trace/coresight.txt | 52 +++++ tools/perf/scripts/python/arm-cs-trace-disasm.py | 235 +++++++++++++++++++++ tools/perf/util/cs-etm.c | 93 ++++++-- .../util/scripting-engines/trace-event-python.c | 2 + 4 files changed, 362 insertions(+), 20 deletions(-) create mode 100644 tools/perf/scripts/python/arm-cs-trace-disasm.py -- 2.7.4

6 years, 7 months

[PATCH 00/11] coresight: tmc-etr Transparent buffer management

by Suzuki K Poulose

This series is split of the Coresight ETR perf support patches posted here [0]. The CATU support and perf backend support will be posted as separate series for better management and review of the patches. This series adds the support for TMC ETR Scatter-Gather mode to allow using physical non-contiguous buffer for holding the trace data. It also adds a layer to handle the buffer management in a transparent manner, independent of the underlying mode used by the TMC ETR. The layer chooses the ETR mode based on different parameters (size, re-using a set of pages, presence of an SMMU etc.). Finally we add a sysfs parameter to tune the buffer size for ETR in sysfs-mode. During the testing, we found out that if the TMC ETR is not properly connected to the memory subsystem, the ETR could lock-up the system while waiting for the "read" transactions to complete in scatter-gather mode. So, we do not use the mode on a system unless it is safe to do so. This is specified by a DT property "arm,scatter-gather". Applies on v4.17-rc4 Changes since v2 in [0] : - Split the series in [0] - Address comments on v2 - Rename DT property "scatter-gather" to "arm,scatter-gather" - Add ETM PID for Cortex-A35, use macros to make the listing easier [0] - http://lists.infradead.org/pipermail/linux-arm-kernel/2018-May/574875.html Suzuki K Poulose (11): coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35 coresight: tmc: Hide trace buffer handling for file read coresight: tmc-etr: Do not clean trace buffer coresight: tmc-etr: Disallow perf mode coresight: Add helper for inserting synchronization packets dts: bindings: Restrict coresight tmc-etr scatter-gather mode dts: juno: Add scatter-gather support for all revisions coresight: Add generic TMC sg table framework coresight: Add support for TMC ETR SG unit coresight: tmc-etr: Add transparent buffer management coresight: tmc: Add configuration support for trace buffer size .../ABI/testing/sysfs-bus-coresight-devices-tmc | 8 + .../devicetree/bindings/arm/coresight.txt | 5 +- arch/arm64/boot/dts/arm/juno-base.dtsi | 1 + drivers/hwtracing/coresight/coresight-etb10.c | 12 +- drivers/hwtracing/coresight/coresight-etm4x.c | 32 +- drivers/hwtracing/coresight/coresight-priv.h | 10 +- drivers/hwtracing/coresight/coresight-tmc-etf.c | 45 +- drivers/hwtracing/coresight/coresight-tmc-etr.c | 1032 ++++++++++++++++++-- drivers/hwtracing/coresight/coresight-tmc.c | 83 +- drivers/hwtracing/coresight/coresight-tmc.h | 111 ++- drivers/hwtracing/coresight/coresight.c | 3 +- 11 files changed, 1169 insertions(+), 173 deletions(-) -- 2.7.4

6 years, 7 months

[RFT v2 0/4] Perf script: Add python script for CoreSight trace disassembler

by Leo Yan

This patch series is to support for using 'perf script' for CoreSight trace disassembler, for this purpose this patch series adds a new python script to parse CoreSight tracing event and use command 'objdump' for disassembled lines, finally this can generate readable program execution flow for reviewing tracing data. Patch 0001 is one fixing patch to generate samples for the start packet and exception packets. Patch 0002 is the prerequisite to add addr into sample dict, so this value can be used by python script to analyze instruction range. Patch 0003 is to add python script for trace disassembler. Patch 0004 is to add doc to explain python script usage and give example for it. This patch series has been rebased on acme git tree [1] with the last commit 19422a9f2a3b ("perf tools: Fix kernel_start for PTI on x86") and tested on Hikey (ARM64 octa CA53 cores). In this version the script has no dependency on ARM64 platform and is expected to support ARM32 platform, but I am lacking ARM32 platform for testing on it, so firstly upstream to support ARM64 platform. This patch series is firstly to support 'per-thread' recording tracing data, but we also need to verify the script can dump trace disassembler CPU wide tracing and kernel panic kdump tracing data. I also verified this patch series which can work with kernel panic kdump tracing data, because Mathieu is working on CPU wide tracing related work, so after this we need to retest for CPU wide tracing and kdump tracing to ensure the python script can handle well for all cases. You are very welcome to test the script in this patch series, your testing result and suggestion are very valuable to perfect this script to cover more cases. Changes from v1: * According to Mike and Rob suggestion, add the fixing to generate samples for the start packet and exception packets. * Simplify the python script to remove the exception prediction algorithm, we can rely on the sane exception packets for disassembler. [1] https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git Leo Yan (4): perf cs-etm: Generate sample for missed packets perf script python: Add addr into perf sample dict perf script python: Add script for CoreSight trace disassembler coresight: Document for CoreSight trace disassembler Documentation/trace/coresight.txt | 52 +++++ tools/perf/scripts/python/arm-cs-trace-disasm.py | 234 +++++++++++++++++++++ tools/perf/util/cs-etm.c | 35 ++- .../util/scripting-engines/trace-event-python.c | 2 + 4 files changed, 316 insertions(+), 7 deletions(-) create mode 100644 tools/perf/scripts/python/arm-cs-trace-disasm.py -- 2.7.4

6 years, 7 months

Displaying processor type in kernel boot logs

by Mathieu Poirier

Good morning Al, Suzuki sent me this patch [1] that has the effect of printing the following [2] in the kernel boot log at initialisation time. I think it is quite useful since one can correlate CPU information and ETM engine without having to go back to the DT or having to look at all the tracers in sysFS. On the flip side I'm a little weary (since peripheral numbers are implementation specific) that at one point we may end up with say, a Cortex-A53 with different peripheral IDs or another CPU type advertising a peripheral ID that is already taken. As I said I think this is a good idea but before applying a change that will be very public I'd like to make sure there aren't any ramification we haven't thought about. Please let me know what you think. Best regards, Mathieu [1]. https://www.spinics.net/lists/arm-kernel/msg653904.html [2]. https://pastebin.com/gbiLaJHJ

6 years, 7 months

[RFT 0/3] Perf script: Add python script for CoreSight trace disassembler

by Leo Yan

6 years, 7 months

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CoreSight May 2018