Hi James & Mike,
Here is the change I want to make for this issue. Please help to review. If it is ok for you, I will push the patch to linux mainline.
diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hwtracing/coresight/coresight-cti-sysfs.c index 6d59c815ecf5..513f133de415 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -108,10 +108,18 @@ static ssize_t enable_store(struct device *dev, if (ret) return ret;
- if (val) + if (val) { + ret = pm_runtime_get_sync(dev->parent); + if (ret) { + pm_runtime_put_noidle(dev->parent); + return ret; + } ret = cti_enable(drvdata->csdev); - else + } else { ret = cti_disable(drvdata->csdev); + pm_runtime_put(dev->parent); + } + if (ret) return ret; return size;
Thanks Jinlong Mao
On 12/17/2022 10:58 PM, Jinlong Mao wrote:
Hi James & Mike,
With this patch "[PATCH] coresight: cti: Fix hang in cti_disable_hw()", runtime PM calls are removed in cti_enable_hw/cti_disable_hw. There will be register access issue when write 1 to enable sysfs node of CTI directly as clock is not enabled for accessing CTI registers.
echo 1 > cti0/enable static ssize_t enable_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
Is there fix for the enable_store case ?
Thanks Jinlong Mao