Hi,

You do not have the cs_etm// event listed in your version of perf - which indicates that you have not built a version that has the correct updates to work with OpenCSD. You say you are building a 4.2 kernel - this does not have the additional patches required.

You really need to build both the kernel and perf based on the kernel trees provided in the OpenCSD project.

I recommend using latest stable one based on the 4.12 kernel - this is the perf-opencsd-4.12 branch in the OpenCSD github project, which will work correctly with the latest OpenCSD libary. These branches contain additional patches not yet upstreamed that build perf versions that work with the OpenCSD library.

As perf and the kernel often change in sync, then it is not likely that a perf based on a later kernel will work correctly on an earlier kernel.

Regards

Mike

On 9 August 2017 at 14:54, yoma sophian sophian.yoma@gmail.com wrote:

hi MIke:

2017-08-07 18:25 GMT+08:00 Mike Leach mike.leach@linaro.org:

...

Hi,

Can you confirm that the event is listed if you run 'perf list' e.g. on my Juno board running the perf list command results as follows:-

sure and below is the output of perf list on my platform:

#perf list List of pre-defined events (to be used in -e):

branch-instructions OR branches [Hardware event] branch-misses [Hardware event] bus-cycles [Hardware event] cache-misses [Hardware event] cache-references [Hardware event] cpu-cycles OR cycles [Hardware event] instructions [Hardware event]

alignment-faults [Software event] context-switches OR cs [Software event] cpu-clock [Software event] cpu-migrations OR migrations [Software event] dummy [Software event] emulation-faults [Software event] major-faults [Software event] minor-faults [Software event] page-faults OR faults [Software event] task-clock [Software event]

L1-dcache-load-misses [Hardware cache event] L1-dcache-loads [Hardware cache event] L1-dcache-store-misses [Hardware cache event] L1-dcache-stores [Hardware cache event] L1-icache-load-misses [Hardware cache event] L1-icache-loads [Hardware cache event] LLC-load-misses [Hardware cache event] LLC-loads [Hardware cache event] LLC-store-misses [Hardware cache event] LLC-stores [Hardware cache event] branch-load-misses [Hardware cache event] branch-loads [Hardware cache event] dTLB-load-misses [Hardware cache event] dTLB-store-misses [Hardware cache event] iTLB-load-misses [Hardware cache event]

rNNN [Raw hardware event descriptor] cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware event descriptor] (see 'man perf-list' on how to encode it)

mem:<addr>[/len][:access] [Hardware breakpoint]

We use linux4.2 and add related coresight dts based on our SOC's setting. And we can indeed see related coresight device as below. Did that mean we still miss something to enable perf record while porting related component? =========================================================== # ls /sys/bus/coresight/devices/ f0101000.etr f0106000.etf f013d000.etm f0104000.funnel f013c000.etm

#

Appreciate your friendly reminders,