On Wed, Apr 03, 2019 at 06:25:34PM +0800, Leo Yan wrote:
On Wed, Mar 06, 2019 at 03:59:39PM -0700, Mathieu Poirier wrote:
When operating in CPU-wide trace mode with a source/sink topology of N:1 packets with multiple traceID will end up in the same cs_etm_queue. In order to properly decode packets they need to be split in different queues, i.e one queue per traceID.
As such add support for multiple traceID per cs_etm_queue by adding a new cs_etm_traceid_queue every time a new traceID is discovered in the trace stream.
Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org
[...]
@@ -1284,8 +1365,9 @@ static bool cs_etm__is_svc_instr(struct cs_etm_queue *etmq, u8 trace_chan_id, struct cs_etm_packet *packet, u64 end_addr) {
- u16 instr16;
- u32 instr32;
- /* Initialise to keep compiler happy */
- u16 instr16 = 0;
- u32 instr32 = 0;
Use one saperate patch for this?
I thought about it but:
1) The patch would have consisted on only those changes. 2) The code was fine and the compiler not complaining until I touched function cs_etm__mem_access(), hence putting all the changes in the same file. Let me know if you really think we need two patches.
Mathieu
Except this, other changes in this patch looks good to me.
u64 addr; switch (packet->isa) { -- 2.17.1