Re: Coresight with Perf need ETR ?

Hi Christophe,

On 3 September 2018 at 14:06, Christophe ROULLIER christophe.roullier@st.com wrote:

Hi,

I have followed procedure to integrate libopenCSD in perf tool in target ARM. (based on kernel 4.18rc1)

I’ve seen in documentation that perf record need parameters cs_etm/@xxxxx.etr/u …

I would like to know if ETR device is mandatory to use coresight trace with perf ?

In my architecture, I’ve :

1 .funnel

1 .tpiu

2 .etm

1 .etf

1 .stm

1 replicator but no ETR L

If possible without ETR, do you have examples of perf record cmd usage ?

perf can be used with any trace sink, simply replace the @xxxxx.etr with @xxxxx.etf for example.

I’ve configured my coresight register as followed :

echo 1 > /sys/bus/coresight/devices/xxxx.stm/hwevent_select

echo 2 > /sys/bus/coresight/devices/xxxx.stm/hwevent_extmux_select

// Need to track IRQ up of UART

echo 0x200000 > /sys/bus/coresight/devices/xxxx.stm/hwevent_enable

echo 1 > /sys/bus/coresight/devices/yyyy.etf/enable_sink

echo 1 > /sys/bus/coresight/devices/xxxx.stm/enable_source

Which perf record cmd I must enter to catch my STM event ?

Perf does not control the STM, so will not initiate capture of STM data.

You will need to use sysfs to start, stop and read out the STM event data from the ETF.

In theory if the STM is programmed via sysfs to be active while perf is collecting data using the ETM, then any data from the STM will be collected if using the same sink, but this may be overwritten if the buffer in the sink wraps. STM data is low bandwidth compared to ETM trace data so can easily be overwhelmed.

Regards

Mike

Thanks for your help.

Christophe.

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