On Wed, 3 Oct 2018 at 16:24, Al Grant Al.Grant@arm.com wrote:
if it's return branch instruction (OCSD_S_INSTR_V8_RET), then it's return instruction;
True for v8 - but other ISAs (A32 / T32) there is no explicit marking of "ret" - these can be simply mov PC. [rX] or any other instruction that updates the PC.
In A32 / T32, we define some specific instructions as being returns for the purpose of incrementing the return perf event (0x0E, perf stat -e re):
- BX R14
- MOV PC, LR
- POP {…, PC}
- LDR PC, [SP], #offset
Generally, CPU implementations will take this as the list of instructions that should use a special stack-based return predictor instead of the regular branch predictor. This in turn means that compilers are careful to use these instructions when they want a return and some other instruction when they want some other indirect branch.
So this is the appropriate list to flag as returns in A32 / T32. Hopefully you then find the count of returns in the trace matches what's counted by perf stat -e re.
So from an opencsd point of view we could have another instr type to flag these to perf as with the others when we are in decode phase.
Mike
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