Re: [RFC v3 1/2] perf: Support for Arm A32/T32 instruction sets in CoreSight trace

Hi Mike,

On Tue, Oct 23, 2018 at 01:13:40PM +0100, Mike Leach wrote:

HI,

Looks like the ETMv4 decoder is not tracking the ISA change as Al says. This will need a mod and I'll need to generate a test case unless the raw trace and images can be supplied from any of the above tests.

Have uploaded the tar file which includes elf/.so lib/perf.data, if I miss something just let me know. You could fetch from [1].

Thanks, Leo Yan

[1] http://people.linaro.org/~leo.yan/opencsd_juno/coresight_test.tgz