== Progress ==
* Zero/sign extension elimination (TCWG-15) (10/10)
- Posted two patches for review and gone through few iterations
- Looked at flag_wrapv and !flag_strict_overflow regressions
* ARM (and possibly some other targets) truncates negative values and
this makes them incompatible with the value range in SSA. One solution
is to ignore any gimple statements that load negative constants when
eliminating zero/sign extension elimination.
* We also loose the OVF(INF) information in tree when they are
converted to wide_int and propagated to SSA.
- Testing on a target that support PTR_EXTEND
* Trying to set-up x86_64-linux with -mx32. Still not able to compile
as I am getting various errors in glibc. Looking into it,
== Plan ==
* Upstream zero/sign extension elimination activities
== Week of June 23rd ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Various cleanups and improvements to cbuild2.
-- Troubleshooting of Jenkins stability problems.
-- Increasing test coverage for arm big-endian toolchains.
- Various meetings and discussions (3/10)
--
Maxim Kuvyrkov
www.linaro.org
== Week of June 16th ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Refactored cbuild2's schroot support after Rob's review
-- Posted updated patches
- Started moving TCWG dev environment master vm to Linaro's AWS (1/10)
-- This the the VM from where toolchain64.lava.schroot and maximk.schroot are synchronized.
-- Once migrated, all TCWG admins can access it, not just me.
- Various meetings and discussions (2/10)
--
Maxim Kuvyrkov
www.linaro.org
== Week of June 9th ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Added support for native testing inside schroot
-- Troubleshooting of various problems
-- Assisted Yvan in testing of the 2014.06 source release and general fire-fighting
- Various meetings and discussions (2/10)
- Interviewed 2 potential assignees (1/10)
--
Maxim Kuvyrkov
www.linaro.org
== Progress ==
* Patch review, testing and follow-up (4/10, CARD-341)
- glibc 2.20 freeze upcoming
- submit some warning fix patches
* Add support for ARM HWCAP2 to glibc (2/10, TCWG-499)
* Submit a patch for increasing ld max page size on ARM (1/10)
* Reformatted backports spreadsheet for glibc, binutils and gdb (1/10)
* Investigated language runtimes (1/10)
* Meetings (1/10)
== Issues ==
* None
== Plan ==
* More glibc patch work for the freeze (1st July)
* malloc benchmarking
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* GCC trunk cross-validation (CARD-647) (6/10)
- email robot is now working
- added list of "ignored" tests when reporting regressions, mainly
because they are unstable when run under qemu (threads...)
- a57+crypto FPU config looks OK
- tried to use "contrib/test_summry" to send results, but that would
flood gcc-testresults mailing-list
- looked at impact of using CFLAGS/CFLAGS_FOR_TARGET etc upon
libstdc++ tests. Needs deeper investigation
- robustified scripts to handle more compute farm errors (random
"interrupted system call")
* AArch64 libsanitizer: no progress this week
* Neon intrinsic tests: review started
* Misc (meetings, conf-calls, ...) 4/10
- 4.7-2014.06 release done, benchmarks on-going
== Next ==
* GCC cross-validation
- look more deeply at the impact of the various CFLAGS (on testsuites results)
* Neon intrinsic tests:
- handle feedback
* AArch64 libsanitzer: resume work
* Publish 4.7-2014.06 release
== Progress ==
* Toolchain (CARD-862 1/10)
- Testing Compiler-RT on autoconf/ARM
- Checking LLD
* Automation Framework (CARD-1378 6/10)
- Writing script to manage TCWG rack
- Testing D01 with new kernel
- Testing Chromebook 2 vs. 1 vs. D01 for LLVM
- Cleaning up failed Chromebooks
- Pointlessly working on beagle bones
* Background (3/10)
- Code review, meetings, discussions, etc.
- Starting the GCC + LLVM presentation
== Plan ==
* continue trying to build compiler-rt with autoconf on ARM
* continue working on the LLVM + GCC presentation
* initial investigations on lld and MCLinker
The Linaro Toolchain Working Group (TCWG) announces the 2014.06-1 release of
the Linaro GCC 4.9 source package. This is a respin of the 2014.06 release which
fixes some issues on AArch64 big-endian and in AArch64 libjava.
Changes in this GCC source package release include:
* Updates to GCC 4.9.1-pre+svn211964
* Revert backport of [AArch64] Define TARGET_FLAGS_REGNUM.
* Backport of [AArch64] Cost model improvements.
Please find the original 2014.06 release notes below:
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.06
stable release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2014.06 is the third Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.1-pre+svn211054 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler approaches version 4.9.1.
The Linaro TCWG will provide monthly stable[1] source package releases until
FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in
FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of
stable quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.9.1-pre+svn211054
* Backport of [AArch32] PR rtl-optimization/60663
* Backport of [AArch32] Suppress Redundant Flag Setting for Cortex-A15.
* Backport of [AArch32] Support ORN for DIMode.
* Backport of [AArch32] Optimise NotDI AND/OR ZeroExtendSI for ARMv7A.
* Backport of [AArch32] Allow any register for DImode values in Thumb2.
* Backport of [AArch32] Initialize new tune_params values.
* Backport of [AArch32] Initialise T16-related fields in Cortex-A8
tuning struct.
* Backport of [AArch32] Enable tail call optimization for long call.
* Backport of [AArch64] TRY_EMPTY_VM_SPACE Change for ILP32.
* Backport of [AArch64] Fix TLS for ILP32.
* Backport of [AArch64] vrnd<*>_f64 patch.
* Backport of [AArch64] Fix possible wrong code generation when
comparing DImode values.
* Backport of [AArch64] Add a space to memory asm code between base
register and offset.
* Backport of [AArch64] Fix aarch64_initial_elimination_offset calculation.
* Backport of [AArch64] vqneg and vqabs intrinsics implementation.
* Backport of [AArch64] Vreinterpret re-implemention.
* Backport of [AArch64] Define TARGET_FLAGS_REGNUM.
* Backport of [AArch64] Merge longlong.h from glibc tree.
* Backport of [AArch64] add, sub, mul in TImode.
* Backport of [AArch64] Add handling of bswap operations in rtx costs.
* Backport of [AArch64] Fully support rotate on logical operations.
* Backport of [AArch64] Use standard patterns for stack protection.
* Backport of [AArch64] VDUP Testcases.
* Backport of [AArch64] Vectorise bswap[16,32,64].
* Backport of [AArch64] Enable TBL for big-endian.
* Backport of [AArch64] Reverse TBL indices for big-endian.
* Backport of [AArch64] Relax modes_tieable_p and cannot_change_mode_class.
* Backport of [AArch64] Improve vst4_lane intrinsics.
* Backport of [AArch64] Rewrite and tests ZIP Intrinsics.
* Backport of [AArch64] libitm Enabled.
* Backport of [AArch64] Support full addressing modes for ldr/str in
vectorization scenarios
* Backport of [AArch32/AArch64] rtx costs (FMA, Cortex-A8, ...).
* Backport of Fix warning in libgfortran configure script.
* Backport of Remove PUSH_ARGS_REVERSED from the RTL expander
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
