== Progress ==
* Rewrite llvm-projs in Python [TCWG-833] [2/10]
- Investigated clitest for testing the scripts
- It seems to be a bit unwieldy for our purposes, so in the end it's
probably a better idea to abuse Python's unittest module even for higher
level tests (they'll be in a different directory though)
* [ARM GlobalISel] Select add instructions [TCWG-925] [6/10]
- Committed a patch upstream with all the plumbing necessary for enabling
GlobalISel for ARM
- Working towards selecting an add instruction on i32 types - currently
have some naive support for lowering arguments and selecting return and
copy instructions
* Misc [2/10]
- Meetings, mailing lists, buildbot monitoring
- Python trainings
== Plan ==
* [ARM GlobalISel] Select add instructions [TCWG-925]
- Brush it up and send it upstream
* Rewrite llvm-projs in Python [TCWG-833]
- Start a discussion on the interface / repo layout etc
# Progress #
* TCWG-547. Change software_single_step interface to return a vector of address
Patches are pushed in. Done. [1/10]
* TCWG-923, Use regcache instead of frame in software_single_step. [3/10]
Patches are finished. Tests are needed.
* TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. [4/10]
Clean up val_print, remove one redundant parameter. Patches are
committed.
Deep diving in the gdb value objects. Much cleanup work should be
done first. Ongoing.
* More patches review, [2/10]
** C++ 11 patches, and learn C++ 11 in parallel,
** Review arm tracepoint patches. Insist that they (Ericsson) have to
fix underlining bugs (intermittent fails) before getting patches
in,
** Discuss on MIPS reconfigurable FP registers. Proposed two ways in
public gdb mail list, MIPS people think the first one is a little
better
** Hold Intel's fortran patch until a bug we found in gfortran is
confirmed.
# Plan #
* TCWG-923,
* Training from Tue to Friday.
--
Yao Qi
o 1 day off (2/10)
== Progress ==
o Linaro GCC/Validation (3/10)
* ABE and validation jobs reviews
* Binary tarballs size reduction:
- testing patch
* BZ #2575:
- Investigate and open bug upstream (PR78201)
- Testing current fix and investigating bugzilla feedbacks
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Continue on tarball size reduction and BZ
== This Week ==
* ipa mod/ref analysis (2/10)
- Prototype patch now detects modifications to reference parameters
- Working on mod/ref analysis of global variables.
* PR35691 (2/10)
- Patch iterations based on upstream review
* PR35503 (2/10)
- Patch approved by Jason
- Building kernel with patch resulted in two warnings.
* Public Holidays (4/10)
== Next Week ==
- IPA mod/ref prototype
- Bugs
-- Activity --
[TCWG-683] Branch to undefined weak on aarch64 and arm
Fix in upstream review, looks pretty close to being accepted.
[TCWG-828] TLS support for static linking
In upstream review but no comments as yet
[TCWG-829] IFunc support
In upstream review, but will probably need to be rewritten after some
upstream refactoring has finished
[TCWG-911] eglibc requires a SHT_ARM_ATTRIBUTES section for dlopen to work
I have a quick hack to work round this on my Chromebook but a full fix
will take some time as lld doesn't understand build attributes right
now.
[TCWG-901] Investigate lld as a system linker
With downstream fixes, using lld as the system linker on a Chromebook I can :
- Build llvm, lld and run the regression tests successfully
- Use lld as the linker in the lnt tests successfully
- Using lld to build the shared objects used by lnt's python C
extensions was less successful. I have some interesting debugging to
do.
-- Plan --
Debug the python extension problems
Respond to upstream review comments
More use of lld as system linker
== Progress ==
* [ARM] Investigate switching from itineraries to schedule models
[TCWG-824] [4/10]
- Looked at the sched model as well as the old instruction itinerary
interfaces
- There aren't many tests that are specifically testing the scheduler,
but lots of tests break if you make enough changes to it (it's unclear
which of these are breaking intentionally and which are just poorly written)
- First step is probably to try and complete the sched model (TCWG-543),
then hunt down any differences between what we get using itineraries and
what we get with the new model
* Rewrite llvm-projs in Python [TCWG-833] [3/10]
- Reorganized the repo so we can have a separate tests directory
- Added support for parsing command line options
- Almost ready for review
* Misc [2/10]
- Catching up after vacation
- LLVM GitHub move survey
== Plan ==
* Wrap up TCWG-833
* Migrate scripts to Python 3 (TCWG-896)
* Maybe start TCWG-543 as the first step in TCWG-824
# Progress #
* TCWG-547, Change software_single_step interface to return a vector
of address. [3/10]
Patches are reviewed. V2 are posted and committed. Follow-up
patches are being tested.
* TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. [3/10]
Clean up val_print, remove one redundant parameter. Patches are
being tested.
* Maintain upstream GDB, patches review, [2/10]
* OpenOCD. [2/10] Various IRC chats with maintainer about
** multi-thread support in RTOS, and multi-thread debugging,
** Release 0.10.0 and aarch64 patches merging,
** Understand aarch64 OpenOCD reads DSPSR (32-bit), so don't have to
update GDB target description now.
* Short chat with Peter Griffin on thread ids in linux-kthread.
# Plan #
TCWG-547, TCWG-333.
--
Yao Qi
